1. Move channel to the first row of the table.
2. Remove the condition of HT20/HT40 for they are determined by
secondary channel.
3. Clean up the CSI table.
Fixed the error division on zero.
Also fixed range CONFIG_ESP32_RTC_CLK_CAL_CYCLES in Kconfig.
Fixed a overflow error by TIMG in the function rtc_clk_cal_internal. This error was due to a limit in values TIMG_RTC_CALI_MAX=0x7FFF (to write the slowclk_cycles) and TIMG_RTC_CALI_VALUE=0x1FFFFFF (to read xtal_cycles). Added assert finctions.
Closes https://github.com/espressif/esp-idf/issues/2147
1. Add reading psram EID.
2. Configure different clock mode for different EID.
3. add API to get psram size and voltage.
4. Remove unnecessary VSPI claim.
For 32MBit@1.8V and 64MBit@3.3V psram, there should be 2 extra clock cycles after CS get high level.
For 64MBit@1.8 psram, we can just use standard SPI protocol to drive the psram. We also need to increase the HOLD time for CS in this case.
EID for psram:
32MBit 1.8v: 0x20
64MBit 1.8v: 0x26
64MBit 3.3v: 0x46
Since 94250e42a0, UART output is suspended when entering sleep mode
(deep or light sleep). This makes sense for light sleep, where sleep
normally takes small amount of time, and flushing the UART would add
a lot of latency. But this breaks existing behaviour for deep sleep,
where UART output was previously sent out before entering sleep mode.
Closes https://github.com/espressif/esp-idf/issues/2145
remote_ip was declared to be a pointer to an address that was
overwritten in later stage thus changing the address pointed by remote_ip
esp_smartconfig.h : Fixed a typo. station_config to wifi_config_t
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
components/esp32/ipc.c: In function 'esp_ipc_init':
components/esp32/ipc.c:82:31: error: '%d' directive writing between 1 and 11 bytes into a region of size 5 [-Werror=format-overflow=]
sprintf(task_name,"ipc%d",i);
^~
components/esp32/ipc.c:82:27: note: directive argument in the range [-2147483648, 1]
sprintf(task_name,"ipc%d",i);
^~~~~~~
components/esp32/ipc.c:82:9: note: 'sprintf' output between 5 and 15 bytes into a destination of size 8
sprintf(task_name,"ipc%d",i);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~
INTERRUPT and CCOUNT registers will change outside of program control.
Making the inline assembly used to read these registers volatile
indicates this fact to the compiler.
Fixes https://github.com/espressif/esp-idf/issues/2127
1. fix BLE connection missing in coex mode
2. modify other parameters to make coex priority more reasonable
3. fix modem sleep procedure trap cause Wifi disable RF when BT is
working. Such cause that BR/EDR is difficult to be connected, BLE
connection stability decrease and so on.
4. modify BR/EDR coexist duration to imrove BR/EDR connect success
ratio.
5. Due to the hardware coexist bug, BLE scan interval/window should
be less than 0x100(about 160ms). Therefore, it will cause BLE cannot
scan any advertising packet while WiFi have higher priority
behaviour(such like RX beacon, scan, TX/RX VO packets and etc.).
1. add APIs to set/get announce interval values.
2. add API to enable/disable the min rate to 6Mbps for data packages.
3. add APIs to set/get RSSI threshold values.
4. fix ap_loss.
Since commit 94250e4, EXT0 wakeup mechanism, when wakeup level was set
to 0, started waking up chip immediately after entering deep sleep.
This failure was triggered in that commit by a change of
RTC_CNTL_MIN_SLP_VAL (i.e. minimum time in sleep mode until wakeup
can happen) from 128 cycles to 2 cycles.
The reason for this behaviour is related to the way input enable (IE)
signal going into an RTC pad is obtained:
PAD_IE = (SLP_SEL) ? SLP_IE & CHIP_SLEEP : IE,
where SLP_IE, SLP_SEL, and IE are bits of an RTC_IO register related
to the given pad. CHIP_SLEEP is the signal indicating that chip has
entered sleep mode.
The code in prepare_ext{0,1}_wakeup did not enable IE, but did enable
SLP_SEL and SLP_IE. This meant that until CHIP_SLEEP went high, PAD_IE
was 0, hence the input from the pad read 0 even if external signal
was 1. CHIP_SLEEP went high on the 2nd cycle of sleep. So when
RTC_CNTL_MIN_SLP_VAL was set to 2, the input signal from the pad was
latched as 0 at the moment when CHIP_SLEEP went high, causing EXT0
wakeup with level 0 to trigger.
This commit changes the way PAD_IE is enabled: SLP_SEL and SLP_IE are
no longer used, and IE is set to 1. If EXT0 wakeup is used, RTC_IO is
not powered down, so IE signal stays 1 both before CHIP_SLEEP goes
high and after. If EXT1 wakeup is used, RTC_IO may be powered down.
However prepare_ext1_wakeup enables Hold on the pad, locking states
of all the control signals, including IE.
Closes https://github.com/espressif/esp-idf/issues/1931
Closes https://github.com/espressif/esp-idf/issues/2043
Previously the loop in esp_timer_impl_set_alarm was necessary to catch
the case when timer count wraps around (goes from 2^32 - 1 to 0).
Since ALARM_OVERFLOW_VAL was reduced from 2^32 - 1 to 0xefffffff,
this is no longer necessary.
Fixes https://github.com/espressif/esp-idf/issues/1891
Allows you to move the partition table, it gives more space for the bootloader.
Added a new utility - parttool.py. This utility can search for the offset and/or size of the partitions by name and type/subtype. Use for getting APP_OFFSET and PHY_DATA_OFFSET.
The linker(esp32.bootloader.ld) made changes that allow you to write a custom bootloader code more.
TW14125
Before entering the deep sleep, the RTC and FRC counters are synchronized. Updating the boot_time.
Added a unit test for this case.
Fixed warnings for MULTIPLE_STAGES
Closes https://github.com/espressif/esp-idf/issues/1840
1. Fix the WiFi/BT coexist bug
2. Fix WPA2 enterprise example crash bug
3. Add size and version check for crypto type struct
4. Add MD5 check for crypto type header file
1. add mesh_assoc_t to esp_mesh_internal.h file.
2. rename "node" to "device" in esp_mesh.h.
3. add MESH_EVENT_SCAN_DONE event.
4. add APIs esp_mesh_scan_get_ap_record() and esp_mesh_scan_get_ap_ie_len() to get scan results.
5. modify API esp_mesh_set_self_organized() by adding parameter "select_parent".
6. modify API esp_mesh_set_parent() by adding parameter "parent_mesh_id"
7. add manual networking example.
1. Store the calibration data to NVS if PHY does full calibration because of calibration data checksum failure
2. Pass the station's mac to PHY for checksum calculation
A new method of workaround an error with DPORT is to ensure that the APB is read and followed by the DPORT register without interruptions and pauses. This fix places this implementation in the IRAM to exclude errors associated with the cache miss.
Add error handling for http client
set ssid password correct with Example_WIFI test, and clear password before free
Fixed the CI failure due to HTTP errror names
1. provide options for bluetooth low power mode
2. provide two options for bluetooth low power clock: main XTAL and external 32kHz XTAL
3. provide function and callbacks to control bluetooth low power mode, including enable/disable sleep, software wakeup request, low power clock settings, check power state, etc
4. modify vhci API vhci_host_send_packet to use blocking mode
5. note that DFS and bluetooth modem sleep can not be used together currently.
Added .rtc_noinit and .noinit section definitions into linker file /esp32/ld/esp32.common.ld.
The macro __NOINIT_ATTR, RTC_NOINIT_ATTR declared in esp32/esp_attr.h file.
Added unit test file to test added behavior for noinit variables and its attributes.
Added documentation changes for new added attributes.
Make some corrections after code review:
The linker file has been corrected to place noinit section before bss_start to make it safer.
Documentation file has been modified to clarify reset behavior of allocated data .
Corrected typos in test_noinit.c and removed assertion of noinit variable to avoid possible issues with ROM boot loader memory allocation.
The linker file has been corrected to place noinit section before bss_start to make it safer.
Documentation file has been modified to clarify reset behavior of allocated data .
Corrected typos in test_noinit.c and removed assertion of noinit variable to avoid possible issues with ROM boot loader memory allocation.
Update test_noinit.c file to address RTCWDT_RTC_RESET reset reason instead of POWERON_RESET.
Test optimized to pass automated unit testing.
esp32: Add .noinit and .rtc_noinit sections to the linker script
Update of general-notes.rst documentation to fomat examples as code and attributes as identifiers.
Test test_noinit.c corrected to pass automated testing (support ofTEST_CASE_MULTIPLE_STAGES())
https://ezredmine.espressif.cn:8765/issues/15878
1. remove rc when ap not found
closes issue: https://github.com/espressif/esp-idf/issues/1797
2. allocate mimo packet to internal memory
3. use FRC2 timer instead of WDEV_NOW() for modem sleep to calculate
TBTT time.
It fixes the bug that TBTT will be incorrect if beacon is lost.
If the RTC crystal is bad or has no matched capacitance, then you do not need to start such the crystal. It is necessary to determine this case, output an error (about impossibility to start from the oscillator) and start from the internal RC of the chain.
Reduced the default value of the number of bootstrap cycles. Because we can oscillating the oscillator which then stops. (in Kconfig). Changed from 100 to 5.
The number of calibration cycles has been increased. It is the main criterion for estimating the launch of an oscillator. A large increase leads to an increase in the load time, as well as the stability of recognition of this case. (in Kconfig).
Changed from 1024 to 3000.
When two CPUs read the area of the DPORT and the area of the APB, the result is corrupted for the CPU that read the APB area.
And another CPU has valid data.
The method of eliminating this error.
Before reading the registers of the DPORT, make a preliminary reading of the APB register.
In this case, the joint access of the two CPUs to the registers of the APB and the DPORT is successful.
If the allocated interrupt list is not empty and the new item will be inserted
as the header of the list, insert_vector_desc() causes crash because pre is
null. This commit fix this issue.
change some API function to throw event:
esp_wifi_deauth_sta
esp_wifi_get_country
esp_wifi_ap_get_sta_list
esp_wifi_sta_get_ap_info
esp_wifi_stop
esp_wifi_get_channel
esp_wifi_get_protocol
esp_wifi_get_bandwidth
When light sleep is started, the other CPU gets halted using DPORT
stall mechanism. This can happen while it is inside an esp_timer
critical section, which may lead to a deadlock. This change adds
functions to take and release esp_timer lock before entering
DPORT critical section, preventing the deadlock.
1. Add error log if failed to store calibration version/mac/data
2. Change the NVS calibration version/mac/data store sequence
3. Pass the init_data instead of NULL to esp_phy_rf_init() in esp_phy_load_cal_and_init()
* Philosophical: "explicit is better than implicit".
* Practical: Allows useful errors if invalid directories given in components as the defaults aren't
always used. Also trims the -I path from a number of components that have no actual include
directory.
* Simplifies knowing which components will be header-only and which won't
1. Bootloader reads SPI configuration from bin header, so that the burning configuration can be different with compiling configuration.
2. Psram mode init will overwrite original flash speed mode, so that users can change psram and flash speed after OTA. 3. Flash read mode(QIO/DIO…) will not be changed in app bin. It is decided by bootloader, OTA can not change this mode.
4. Add read flash ID function, and save flash ID in g_rom_flashchip
5. Set drive ability for all related GPIOs
6. Check raise VDDSDIO voltage in 80Mhz mode
7. Add check flash ID and update settings in bootloader
8. Read flash ID once and keep in global variable
9. Read flash image header once and reuse the result
Tested cases:
1. Test new and old version of bootloader
boot Flash 20M —> app Flash 80M + Psram 80M
boot Flash 40M —> app Flash 80M + Psram 80M
boot Flash 80M —> app Flash 80M + Psram 80M
boot Flash 20M —> app Flash 80M + Psram 40M
boot Flash 40M —> app Flash 80M + Psram 40M
boot Flash 80M —> app Flash 80M + Psram 40M
boot Flash 20M —> app Flash 40M + Psram 40M
boot Flash 40M —> app Flash 40M + Psram 40M
boot Flash 80M —> app Flash 40M + Psram 40M 2. Working after esp_restart reboot.
* Move smartconfig to its component directory, it should be possible to override
this as whole component
* Fix few header includes related to lwIP networking stack
Signed-off-by: Mahavir Jain <mahavir@espressif.com>
1. fix issues on sending beacon caused by too much tx retries on other packets.
2. modify not to scan if rc exists when connect.
3. modify scan dwell time to default 120ms fo root.
1. fix a bug in initliazing map beacon interval.
2. fix not send MESH_EVENT_ROUTING_TABLE_REMOVE when MESH_NWK_CHILD_DISCONNECTED.
3. fix a bug in returning roots ie len.
The files updated according to code review discussions.
In the sleep_modes.c removed immidiate disable of ULP mode and leave just trigger deactivation.
The esp_sleep.h is updated to have the same defines for source as esp_sleep_wakeup_cause_t.
Updated documentation in sleep_modes.rst file to include cross references and address esp_sleep_wakeup_cause_t type.
The get_time_ms() is updated to explicitly use fabs(dt) instead of abs(dt) in test_sleep.c.
Some other minor changes in test_sleep.c unit test.
(TW#18952)
Closes https://github.com/espressif/esp-idf/issues/1677
It is not possible to generate 1 MHz REF_TICK from 2 MHz APB clock
(this is a limitation of REF_TICK divider circuit). Since switching
REF_TICK frequency is something we would like to avoid (to maintain
UART output even with DFS), 2 MHz frequency has been marked as
unsupported.
The issue would manifest itself in cases when switching from PM
configuration like {active=160MHz, idle=80MHz} to {active=80MHz,
idle=80Mhz}. After the configuration was changed, PM logic would
think that current frequency was 80MHz and would not do any further
switching. In fact, frequency was still 160MHz.
The old code calculated MAX() of two enum values, but CPU frequency
enum values are not ordered (2MHz goes after 240MHz). This caused
incorrect configuration to be set.
1. External 32kHz crystal is started for too long or it may not start at all. It is often observed at the first start.
2. At the first start, it is possible that the crystal did not start. And the recorded period was recorded as 0. Which led to a division error by zero during the transition to the deep sleep mode (Maybe somewhere else).
3. Added a unit test to test a new method of oscillation an external crystal.
4. Added a new method of oscillating of an external crystal. The legs of the crystal are fed with a 32 kHz frequency.
The new method eliminates these errors.
Added unit test: `\esp-idf\components\soc\esp32\test\test_rtc_clk.c`: `make TEST_COMPONENTS=soc`
- 8 Test starting external RTC crystal. Will pass.
`Bootstrap cycles for external 32kHz crystal` - is specified in the file Kconfig by default 100.
QA tested a new method of oscillation the crystal on 25 boards. The supply of square waves on the crystal showed a 100% result in contrast to the previous method of launching the crystal. After the tests, the old method was deleted.
Closes TW19143
- separate mode stats from lock stats by an extra comment line
- add CPU frequency column to the mode stats
- don’t print a row for light sleep if light sleep is not enabled
s_cpu_freq_by_mode array was statically initialised with 80MHz CPU
frequency in CPU_MAX and APB_MAX modes, but sdkconfig setting for the
CPU frequency could have been different. For the case of 240MHz CPU
frequency, this would cause a frequency switch between 240MHz and
80MHz to happen, even though such switch is not supported in the fast
path switching functions used by the DFS implementation.
This fixes the issue by moving initialisation into esp_pm_impl_init,
which is called at startup before the first mode switch can happen.
Fixes https://github.com/espressif/esp-idf/issues/1729.
The files updated according to code review discussions.
In the sleep_modes.c removed immidiate disable of ULP mode and leave just trigger deactivation.
The esp_sleep.h is updated to have the same defines for source as esp_sleep_wakeup_cause_t.
Updated documentation in sleep_modes.rst file to include cross references.
Some minor changes in test_sleep.c unit test.
(TW#18952)
Closes https://github.com/espressif/esp-idf/issues/1677
Added function esp_sleep_disable_wakeup_source() to deactivate wakeup trigger for selected source.
Updated documentation for this function in sleep_modes.rst file.
Updated unit test to check this functionality for light sleep.
The test_sleep.c unit test is updated to add reliability for unit testing.
(TW#18952)
Closes https://github.com/espressif/esp-idf/issues/1677
The timer wakeup function once activated cannot be disabled later using existing api. If user wants to use different wakeup sources after first sleep but it does not work. This change disables timer wakeup trigger in configuration that will be set into appropriate RTC registers in esp_light_sleep_start() function.
Added function esp_sleep_disable_wakeup_source() to deactivate wakeup trigger for selected source.
Updated documentation for this function in sleep_modes.rst file to pass make html.
Updated unit test to check this functionality for light sleep.
The test_sleep.c unit test is updated to add reliability for auto unit testing.
(TW#18952)
Closes https://github.com/espressif/esp-idf/issues/1677
tools/gen_esp_err_to_name.py generates
components/esp32/esp_err_to_name.c for lookup of the error codes from
all of the IDF project and easily identify all codes in one place
1. Put some lwip udp rx/tx relating functions to IRAM
2. Put some wifi rx/tx relating functions to IRAMa
3. Reduce wifi dynamic malloc from 4 to 1 for each ebuf
4. Update iperf example accordingly
5. Update libphy.a to v383
close github issue#1037 WiFi Promiscuous filter breaks w/
WIFI_PROMIS_FILTER_MASK_ALL and issue#1404
esp_wifi_set_promiscuous_filter set WIFI_PROMIS_FILTER_MASK_ALL error
When INT WDT fires, panicHandler is invoked. In OCD mode, panicHandler
sets a breakpoint on the PC from the exception frame and returns.
However in case of INT WDT, interrupt flag is still set in TIMERG1
peripheral, which causes INT WDT to trigger again. This causes an
endless stream of "Core 0 panic'ed (Interrupt wdt timeout on CPU1)"
messages. OpenOCD also gets terribly confused at this point.
Disable watchdogs when exiting panic handler in OCD mode.
Clear TIMERG1 WDT interrupt flag to prevent re-entry into panic handler.
libc time function now rely on esp_timer_get_time as the source of
high-resolution time, rather than FRC1 timer. Internally, on the ESP32
esp_timer implementation uses FRC2 timer.
- Change help text and labels in Kconfig to use "high-resolution timer"
instead of FRC1. Keep existing Kconfig option name to be backwards
compatible.
- Change references to "FRC1" in the source code to "FRC".
A function to change "in IRAM" status for an existing interrupt handle, without going through free/allocate of the interrupt.
mOS HW timer implementation requires this to make HW timers safe to re-set from an IRAM ISR.
1. Add a hide API for station to receive and process probe request
frame.
2. Fix an issue that wifi/bt coexistence crashes in PSRAM version.
3. Fix an issue that the API for clearing vendor ie can not work.
4. Fix an issue that wifi stop and reboot leads watchdog.
Timer callback can delete the timer. If CONFIG_ESP_TIMER_PROFILING was
enabled, this caused an access to invalid (freed) memory.
This fix adds a pointer to track the timer while executing the callback.
This is needed so that we can check if callback deletes the timer,
in which case we won't try updating profiling counters for this timer
after the callback is done.
Renamed the internal rc to __err_rc to avoid clashes with local variables.
This code would not do the expected thing with the original ESP_ERROR_CHECK macro:
esp_err_t my_func(esp_err_t x)
{
assert(x == 23);
}
esp_err_t rc = 23; //some value that is important fo the user
ESP_ERROR_CHECK(my_func(rc));
The macro will expand to:
esp_err_t rc = (my_func(rc));
And the code will assert, as my_func will receive a random value - whatever is in the internal macro rc temp variable. This is due to the C weirdness of allowing this code:
int x = x; //x has a random value.
This commit reverts the revert on the new task watchdog API. It also
fixes the following bug which caused the reversion.
- sdkconfig TASK_WDT_TIMEOUT_S has been reverted from the unit of ms back to the
unit of seconds. Fixes bug where projects using the new API without rebuilding sdkconfig
would cause the old default value of 5 to be interpreted in ms.
This commit also adds the following features to the task watchdog
- Updated idle hook registration to be compatible with dual core hooks
- Updated dual core hooks to support deregistration for cpu
- Legacy mode has been removed and esp_task_wdt_feed() is now replaced by
esp_task_wdt_reset(). esp_task_wdt_feed() is deprecated
- Idle hooks to reset are now registered/deregistered when the idle tasks are
added/deleted from the Task Watchdog instead of at Task Watchdog init/deinit
- Updated example
1. V366, fix a problem which initialize current can reach 800mA.
2. V365, fix a problem for pll_cap tracking in Coexist (BT & WIFI)
mode. The problem will make Coexist (BT & WIFI) WIFI AP mode TX
Fail in high temperature(>70).
3. V364, fix a bug of BT and Wifi coexist (hung in function of
force_wifi_mode())
1. move settings of WIFI_CLK_EN_REG for bluetooth into controller init/deinit APIs
2. modify the bit mask used in phy_rf init/deinit to use WIFI-BT shared bits
Previously esp_restart would stall the other CPU before enabling RTC_WDT.
If the other CPU was executing an s32c1i instruction, the lock signal
from CPU to the arbiter would still be held after CPU was stalled. If
the CPU running esp_restart would then try to access the same locked
memory pool, it would be stuck, because lock signal would never be
released.
With this change, esp_restart resets the other CPU before stalling it.
Ideally, we would want to reset the CPU and keep it in reset, but the
hardware doesn't have such feature for PRO_CPU (it is possible to hold
APP_CPU in reset using DPORT register). Given that ROM code will not use
s32c1i in the first few hundred cycles, doing reset and then stall seems
to be safe.
In addition to than, RTC_WDT initialization is moved to the beginning of
the function, to prevent possible lock-up if CPU stalling still has any
issue.
1. Fix WiFi timer enable twice issue
2. Fix a softAP compatibility issue
3. Fix ebuf alloc counter issue
4. remove nvs_flash_init() in esp_wifi_init()
5. Fix scan only find few APs after set bssid
6. Fix can not connect to hidden SoftAP
7. Remove group key entry before connecting ot AP
Moves the ets_timer_arm() / ets_timer_disarm() code paths to RAM
Overhead is 740 bytes of IRAM, 0 bytes DRAM
(For comparison: If all of esp_timer.c is moved to RAM, overhead is 1068 bytes IRAM and 480 bytes DRAM.)
Some frameworks based on ESP-IDF need to be able to decide whether to
initialize SPI RAM after the application has started. This change splits
out part of esp_spiram_init which manipulate cache MMU into a separate
function. Applications can disable cache, call esp_spiram_init_cache,
re-enable cache, and then call esp_spiram_init.
Disabling and re-enabling the cache can be achieved using functions
provided in esp_spi_flash.h.
This commit fixes bugs with the dual core changes to freeRTOS tick and idle hooks.
Interrupt watchdog now registers tick hooks to both cores.
API for cross core tick and idle hook registration were also added
The way these hooks are implemented at the moment, once you register a tick or idle task hook, it is run by both cores, leading to intermittent crashes that are difficult to explain (and debug). One solution is to register the hook with the core that is currently running, which is what this patch attempts to do.
Merges https://github.com/espressif/esp-idf/pull/781
Legacy API of task watchdog used the same function esp_task_wdt_feed() to add
and feed a task. This caused issues of implicitly adding a task to the wdt list
if the function was used in shared code.
The new API introduces init, adding, feeding, deleting, deinit functions. Tasks
must now be explicitly added to the task watchdog using their handles. Deletion
must also be explicit using task handles. This resolves the issue of implicit
task additions to the task watchdog due to shared code calling
esp_task_wdt_feed().
Task watchdog is now fully configurable at runtime by calling the init and
deinit functions.
Also added functions to get the handles of idle tasks of the other core. This
helps when adding idle tasks to the watchdog at run time.
Configuring the task watchdog using menu config is still available, however
menu config will only result in calling the init and add functions for idle
tasks shortly after the scheduler starts.
Menu config also allows for using legacy behavior, however the legacy behavior
willcall the new API functions but with slight variations to make them legacy
compatible.
Documentation and example have also been updated
gcov_rtio.c headers updated to prevent error of freertos header files being
included in the wrong order.
Resolves issue TW#13265
The two task watchdog timer bugs are as follows...
1) If only a single task existed on the wdt task list, and esp_task_wdt_feed()
was only called once, the watchdog triggers but fails to print task name
2) If a single task already exists on the task wdt list, and another task calls
esp_task_wdt_feed() once, the watchdog fails to trigger
Problem stemmed from the loop responsible for resetting the watchdog timer
having incorrect loop parameters. The loop failed to traverse the full length
of the task wdt list
In release mode, switches in rtc_clk_bbpll_set would be converted to
jump tables. These tables would be placed into .rodata, which caused
rtc_clk_cpu_freq_set to be unusable while cache is disabled. This
manifested itself in crashes when exiting from light sleep:
https://esp32.com/posting.php?mode=reply&f=13&t=3089#pr14590
1. add adc2 coexistence
2. change NOW() to WDEV_NOW()
3. call ets_timer_done() before calling ets_timer_setfn()
4. fix the bug that api lock is not unlocked when call esp_wifi_stop()
twice
5. more hmac tx buffer limit from 32 to 64.
1. Support built-in ADC for I2S.
2. Modify code of ADC, made no change to the original APIs.
3. Add APIs in I2S:
esp_err_t i2s_set_adc_mode(adc_unit_t adc_unit, adc1_channel_t adc_channel);
4. Add I2S ADC/DAC example code.
5. add old-fashion definition to make it more compatible
6. replase spi_flash_ APIs with esp_partition_ APIs
7. add example of generating audio table from wav
8. change example sound
1. Occupy conn[9] for adv. The max connection number of bluetooth controller decrease to 9. (Previously, it is 10)
2. modify the enum of setting BLE TX power corresponding to connection's.
3. fix libbtdm_app.a cwitch jump table
ESPNOW is a kind of WiFi communication bettween WiFi devices, no
matter they are connected to each other or not. Once two WiFi
devices are paired, they can send data to or receive data from
each other. The data is transmitted in action frame which can
be encrypted with CCMP method. ESPNOW also support mutilcast frame
transmitting.
Fix warnings where undefined vars are used.
Make Kconfig emit "FOO=" for unset bool options
To ensure make variables are always defined, even if empty.
When writing auto.conf, include symbols disabled by dependency to make sure all make variables are always defined.
Fixesespressif/esp-idf#137
Cherry-picked from https://github.com/espressif/esp-idf/pull/138
Since timestamps are 64-bit, loosing one bit of range due to sign does
not present an issue, however for applications doing calculations on
timestamps, signed return type is more convenient.
The implementation of esp_timer_get_time used a critical section, which
resulted in a call time of ~1.8us. To make esp_timer_get_time more
useable as a high-resolution time source, this change replaces the lock
with polling. Call time is reduced to ~0.7us.
All peripheral clocks are default enabled after chip is powered on.
When CPU starts, if reset reason is CPU reset, disable those clocks
that are not enabled before reset. Otherwise, disable all those
useless clocks.
These peripheral clocks must be enabled when the peripherals are
initialized and disabled when they are deinitialized.
If two different types of SHA hashes were active in the hardware
concurrently, a race condition meant the SHA unit could be incorrectly
reset leading to all-zero results.
If scheduler switches cores in narrow window during esp_dport_access_stall_other_cpu_start(), could cause the stall
interrupt to occur on the running CPU - halting the CPU until WDT cleans up.
Related to https://github.com/espressif/esp-idf/issues/630
1. add sens_struct.h
2. add definition of RTCCNTL and RTCIO
3. modify touch pad examples
4. update example code.
5. add comments add option in menuconfig
6. fix issue that pad index 8 and 9 are mismatched
7. add touch_pad_read_filtered() api to get value filtered by iir filter
8. modify touch pad isr func
9. Make the items in perihperal.ld in the sequence of address
10. delete Kconfig for touch pad
11. add touchpad filter APIs to adjust the filter
12. add touch_pad into index.rst
13. add touch_pad in Doxyfile
14. add touch_pad.rst
Previously VFS driver for UART could only use simple non-blocking
functions to read from and write to the UART. UART driver provides more
complex blocking and interrupt-driven functions, which can be used
instead.
This commit adds optional support for using UART driver's functions.
Also added is a more flexible mechanism for configuring newline
conversion rules on input and output.
This commit also fixes a bug that all UARTs shared one static variable
used as a character buffer in newline conversion code. This variable is
changed to be per-UART.
1. Hello World application shows no footprint difference before and
after this change
2. examples/ethernet/ethernet application compiles properly (can't
test with my board)
This is no longer required since the functions automatically get
pulled in based on the usage. A quick summary of footprint
comparisions before and after these set of patches is shown below:
Hello-World: (simplified for readability)
old Total image size:~ 104902 bytes (.bin may be padded larger)
old Total image size:~ 105254 bytes (.bin may be padded larger)
Per-archive contributions to ELF file:
Archive File DRAM .data & .bss IRAM Flash code & rodata Total
old libesp32.a 1973 177 4445 3939 2267 12801
new libesp32.a 1973 185 4473 3939 2267 12837
new libnvs_flash.a 0 92 0 274 8 374
new libstdc++.a 0 0 0 24 0 24
For some reason, nvs_flash.a (~400bytes) gets pulled in (particularly
the nvs_flash_init() function).
Power-Save: (simplified for readability)
old Total image size:~ 421347 bytes (.bin may be padded larger)
old Total image size:~ 421235 bytes (.bin may be padded larger)
old libtcpip_adapter.a 0 81 0 1947 115 2143
new libtcpip_adapter.a 0 69 0 1897 115 2081
The size actually shrinks a bit, since the AP interface function
doesn't get pulled in.
Since only the used interface's start function gets called, it pulls
in only the functions that are required in the current application,
thereby saving footprint.
Restart being a lower-layer system-level function, needn't depend on
the higher level Wi-Fi libraries.
This also enables us to get rid of one more WIFI_ENABLED ifdef check
For config-only components, component.mk should now contain "COMPONENT_CONFIG_ONLY := 1"
Also refactored some of the generation of linker paths, library list. This required cleaning up the way the bootloader
project works, it's now mostly independent from the parent.
NVS is used to store PHY calibration data, WiFi configuration, and BT
configuration. Previously BT examples did not call nvs_flash_init,
relying on the fact that it is called during PHY init. However PHY init
did not handle possible NVS initialization errors.
This change moves PHY init procedure into the application, and adds
diagnostic messages to BT config management routines if NVS is not
initialized.
Currently the last 128KB of DRAM is reserved for the bootloader & early boot stacks. This means if >192KB of static DRAM
is allocated, the only available heap is this region - which is disabled until the scheduler starts. As a result, you
get either heap corruption on early boot if the static data overlaps startup heap (leading to very weird errors), or
FreeRTOS will fail to start when it can't malloc() anything.
Long term fix is to move the stacks & bootloader data to the very end of RAM, and only reserve that part for early
boot. This is a little fiddly because of also wanting to make sure this memory is not preemptively fragmented when it
gets reintroduced to the heap. This will become more important if/when we have more static allocation options in the
future.
For now, these errors make it clear why the boot has failed.
Ref TW13909
Because of errata related to BOD reset function, brownout is handled as follows:
- attach an ISR to brownout interrupt
- when ISR happens, print a message and do a software restart
- esp_restart_nonos enables RTC watchdog, so if restart fails,
there will be one more attempt to restart (using the RTC
watchdog)
RTC watchdog didn’t have any actions configured for any of the stages.
This change configures it to use SW_SYSTEM_RESET at stage 0 and a
full reset at stage 1. The timeout is now calculated based on
RTC_SLOW_CLK frequency.
Specifying -fexceptions for the compiler is not enough.
- add necessary zero padding after .eh_frame section
- link .gcc_except_table_table in a way flash script does not complain
- call __registrer_frame_info before global constructors
Kudos jcmvbkbc for the necessary help.
Implements support for system level traces compatible with SEGGER
SystemView tool on top of ESP32 application tracing module.
That kind of traces can help to analyse program's behaviour.
SystemView can show timeline of tasks/ISRs execution, context switches,
statistics related to the CPUs' load distribution etc.
Also this commit adds useful feature to ESP32 application tracing module:
- Trace data buffering is implemented to handle temporary peaks of events load
Bug occurs when core dump destination in menuconfig is set to flash. When
programme crashes, xt_unhandled_exception or panicHandler will both trigger
commonErrorHandler. commonErrorHandler calls esp_core_dump_to_flash which
will attempt to use DPORT functions and hang due to trying to a stall and already
stalled processor (already stalled in xt_unhandled_exception and panicHandler).
Program will eventually be rebooted when wdt expires.
Added esp_dport_access_int_deinit after calls to haltOtherCore() so that DPORT
functions don't try to halt and already halted cpu hence preventing hang.
Fixes TW#12944 https://github.com/espressif/esp-idf/issues/646
Small changes to clock calibration value will cause increasing errors
the longer the device runs. Consider the case of deep sleep, assuming
that RTC counter is used for timekeeping:
- before sleep:
time_before = rtc_counter * calibration_val
- after sleep:
time_after = (rtc_counter + sleep_count) * (calibration_val + epsilon)
where 'epsilon' is a small estimation error of 'calibration_val'.
The apparent sleep duration thus will be:
time_after - time_before = sleep_count * (calibration_val + epsilon)
+ rtc_counter * epsilon
Second term on the right hand side is the error in time difference
estimation, it is proportional to the total system runtime (rtc_counter).
To avoid this issue, this change makes RTC_SLOW_CLK calibration value
persistent across restarts. This allows the calibration value update to
be preformed, while keeping time after update same as before the update.
This fixes a bug introduced by !848, where APP CPU would not be reset
during esp_restart, if esp_restart was called from a task running on APP
CPU, and wouldn’t be reset by PRO CPU on startup.
This change replaces stalling APP CPU with resetting it.
Also adds a non-automated esp_restart tests.
DPORT access protection can not work when the other CPU is stalled.
Writes to DPORT registers in esp_restart caused the program to hang due
to access protection, and the reset happened due to RTC_WDT, not SW_RST.
This change adds esp_dport_access_int_deinit function and calls it from
esp_restart once the other core is stalled.
This seems to clean up some of the more wrong addr2line output results (not
sure why, something to do with optimisations I think - perhaps the return
address may also be a jump target from some earlier line of the code.)
Previously, this resulted in task stack frames turning up incorrectly in the backtrace, ie
Backtrace: 0x400d22a0:0x3ffb0fa0 0x40085a3c:0x3ffb0fc0 0x400f32c4:0x3ffb0fe0 0x40081965:0x3ffb1010
0x400d22a0: esp_vApplicationIdleHook at /home/esp/esp-idf/components/esp32/./freertos_hooks.c:
52
0x40085a3c: prvIdleTask at /home/esp/esp-idf/components/freertos/./tasks.c:4431
0x400f32c4: i2c_isr_handler_default at /home/esp/esp-idf/components/driver/./i2c.c:598
0x40081965: _xt_lowint1 at xtensa_vectors.o:?
Fix is to implement abort() via an unhandled exception rather than a breakpoint, I think
because of relative priority of exception types.
Another approach would be to assign a software-only INUM to abort()ing and defined a
PANIC_RSN_ABORTED, but this is more complex and interrupt numbers are more scarce than RAM!
When ‘reset halt’ command is executed, OpenOCD will take the APP CPU
out of reset and enable the clock. At this point, user can set a
breakpoint on code which will run on APP CPU. Previously, app startup
code would do another reset of APP CPU, thereby removing any breakpoints
which may have been set. This change makes APP CPU reset conditional on
DPORT_APPCPU_CLKGATE_EN bit, which is 0 by default but is set to 1 by
OpenOCD after reset.
To increase the chances that the examples work out of the box, this
change is raising the default deep sleep wakeup delay to 1ms.
If GPIO15 is low at startup, ROM code takes less time to execute
(because no logging is performed), so more time may be needed to allow
flash chip to become ready.
Fix Dport access in interrupts
Dport accesses would re-enable interrupts unconditionally, breaking things when called in an ISR. This saves and restores the interrupt status, fixing this.
This fixes a crash in the SPI slave driver, and possibly other things.
See merge request !772
1. Name change from chopper to carrier, block diagram update, minor changes to example codes
2. mcpwm_reg.h changed, brought uniformity in comments, worked on suggestions, duty to accept float. Some name changes!
3. Minor readme changes and Indetation
4. Minor change: move mcpwm_reg.h and mcpwm_struct.h to new path
5. Minor change: addition of BLDC example code and Readme
6. Name changed from epwm to mcpwm
7. Improve the reg name in mcpwm_struct.h
8. Name change chopper>carrier, deadband>deadtime
1. Enlarge wifi task stack size by 512Bytes to fix potential stack overflow issue
2. Modify wifi hmac tx queue size from 12 to 32 because we already limit the buffer number in ebuf
management module
add API to get chip info
This change adds an API to get chip info, such as chip model, enabled capabilities, size of embedded flash, silicon revision.
Hello_world example is modified to print out the information about the chip. The example is also simplified by moving all code into the main task.
Ref TW12031.
See merge request !549
esp32: update wifi lib for some bugfix
1. Fix wifi ebuf free twice issue
2. Fix wifi internal assert issue
3. Fix a bug in esp_wifi_stop
4. Fix wifi crash issue
5. Fix wifi run out of memory when 10 udp connection stability test
See merge request !745
Optimize configuration of base MAC address
Application developer can call APIs to configure base MAC address
instead of using menuconfig.
See merge request !744
component/esp32 : fix dualcore bug
1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
See merge request !742
1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
SPI: Various fixes (examples, mem leak, arg check)
- Fix SPI master example to use DMA-capable memory for display initialization. Fixes https://github.com/espressif/esp-idf/issues/551
- SPI master: Do not leak DMA descriptor pointer array on free
- SPI Master/Slave: Check if DMA'ed buffers actually live in DMA-capable memory
See merge request !735
component/bt: fix some bugs related to bluetooth sniff mode in controller
1. fix some bugs in bluetooth sniff mode in controller
2. export some symbols to esp32.rom.ld including functions and global variables in ROM code
3. update libbtdm.a which includes "IRAM_ATTR" addition or removal for some functions
See merge request !729
1. fix some bugs in bluetooth sniff mode in controller
2. export some symbols to esp32.rom.ld including functions and global variables in ROM code
3. update libbtdm.a which includes "IRAM_ATTR" addition or removal for some functions
esp32: select 8M clock as RTC_FAST_CLK on startup
Even though RTC_CLK_CONFIG_DEFAULT correctly had RTC_FAST_FREQ_8M as the
fast clock, the bootloader modified fast_freq field to the currently
selected RTC_FAST_CLK (so that the clock choice is not affected by the
bootloader). The application startup code never switched to 8M clock,
which caused the default (XTAL/4) to be used as RTC_FAST_CLK. This had
caused a number of issues, such as touch pads not working in deep sleep.
Fixes https://github.com/espressif/esp-idf/issues/542.
Ref TW12053.
See merge request !709
optimize scan before station connecting to AP
1. Store the information of AP(ssid, password, bssid, channel, etc)
into nvs when station connects to AP successfully. If station
connects to the same AP next time, it will scan the stored channel of the AP
first.
2. Add a parameter of channel for scanning before connecting to AP.
If the channel is set to 0, station will scan full channels. If it
is set to 1~13, station will only scan the channel.
See merge request !704
1. Store the information of AP(ssid, password, bssid, channel, etc)
into nvs when station connects to AP successfully. If station
connects to the same AP next time, it will scan the stored channel of the AP
first.
2. Add a parameter of channel for scanning before connecting to AP.
If it is set to 1~13, station will scan starting from the channel.
If the channel of AP is unknown, set it to 0.
Even though RTC_CLK_CONFIG_DEFAULT correctly had RTC_FAST_FREQ_8M as the
fast clock, the bootloader modified fast_freq field to the currently
selected RTC_FAST_CLK (so that the clock choice is not affected by the
bootloader). The application startup code never switched to 8M clock,
which caused the default (XTAL/4) to be used as RTC_FAST_CLK. This had
caused a number of issues, such as touch pads not working in deep sleep.
Fixes https://github.com/espressif/esp-idf/issues/542.
Ref TW12053.
esp32: Core dump sanity checks
Adds sanity checks when doing core dump to flash
- CRC for core dump flash partition config
- Tasks with corrupted TCBs are skipped
- Assertions to check that nothing is written beyond core dump flash partition
Ref TW11879
See merge request !686
- CRC for core dump flash partition config
- Tasks with corrupted TCBs are skipped
- Assertions to check that nothing is written beyond core dump flash partition
- RTC_CNTL_SLOWCLK_FREQ define is removed; rtc_clk_slow_freq_get_hz
function can be used instead to get an approximate RTC_SLOW_CLK
frequency
- Clock calibration is performed at startup. The value is saved and used
for timekeeping and when entering deep sleep.
- When using the 32k XTAL, startup code will wait for the oscillator to
start up. This can be possibly optimized by starting a separate task
to wait for oscillator startup, and performing clock switch in that
task.
- Fix a bug that 32k XTAL would be disabled in rtc_clk_init.
- Fix a rounding error in rtc_clk_cal, which caused systematic frequency
error.
- Fix an overflow bug which caused rtc_clk_cal to timeout early if the
slow_clk_cycles argument would exceed certain value
- Improve 32k XTAL oscillator startup time by introducing bootstrapping
code, which uses internal pullup/pulldown resistors on 32K_N/32K_P
pins to set better initial conditions for the oscillator.
XTAL frequency detection, support for selecting XTAL frequency
This MR adds more robust XTAL frequency detection code (which gets run in the bootloader) and an option to set XTAL frequency in Kconfig. By default we still use autodetection, since it is more reliable than the one used in ROM code.
This will help with issues about XTAL frequency detection in high ambient temperature conditions.
Ref TW12008
See merge request !694
esp32: update wifi lib for limitting dynamic wifi buffer
Add limit for all dynamic wifi ebuf to avoid wifi run out of memory in some extreme scanrio.
The default max allocated dynamic tx buffer is 32
The default max allocated dynamic rx buffer is 64, make default value is bigger because when all packets we received are small packets, e.g. the length is 64Bytes, then 64K can hold 1000 packets, so 64 maybe a good candidate default value, anyway the customer can configure it via menuconfig.
The default dynamic wifi internal long/long-long mgmt is 32, generally 32 is enough for mgmt packet (beacon/auth/assoc/probe/null etc). Generally when all the 32 mgmt buffer is run out of memory, it means internal wifi state machine may has problem, we need to debug it.
See merge request !683
There are some RODATAs of libphy.a that are called in ISR. So need
to put them into DRAM to avoid access them when R/W SPI flash. Due
to the RODATAs which are called in ISR haven't been picked out to
put into DRAM, put all of the RODATA of libphy.a into DRAM. This
will be optimized in the future.
Base MAC address can be stored in default manufacture-defined or customer
pre-defined place in EFUSE and other place e.g. flash or EEPROM.
If choose to use base MAC address which is stored in other place, please
call esp_base_mac_addr_set_external() before initializing WiFi/BT/Ehternet.
