soc: release interrupts which are not reserved by timers any more

This commit is contained in:
Ivan Grokhotkov 2017-08-21 22:29:50 +08:00
parent 42e9d49bb1
commit d8b66e5088
2 changed files with 4 additions and 4 deletions

View file

@ -100,8 +100,8 @@ const static int_desc_t int_desc[32]={
{ 1, INTTP_NA, {INT6RES, INT6RES } }, //6
{ 1, INTTP_NA, {INTDESC_SPECIAL,INTDESC_SPECIAL}}, //7
{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //8
{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //9 //FRC1
{ 1, INTTP_EDGE , {INTDESC_RESVD, INTDESC_RESVD } }, //10 //FRC2
{ 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //9
{ 1, INTTP_EDGE , {INTDESC_NORMAL, INTDESC_NORMAL} }, //10
{ 3, INTTP_NA, {INTDESC_SPECIAL,INTDESC_SPECIAL}}, //11
{ 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //12
{ 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //13

View file

@ -376,7 +376,7 @@
* 7 1 software BT/BLE VHCI BT/BLE VHCI
* 8 1 extern level BT/BLE BB(RX/TX) BT/BLE BB(RX/TX)
* 9 1 extern level
* 10 1 extern edge Internal Timer
* 10 1 extern edge
* 11 3 profiling
* 12 1 extern level
* 13 1 extern level
@ -388,7 +388,7 @@
* 19 2 extern level
* 20 2 extern level
* 21 2 extern level
* 22 3 extern edge FRC1 timer
* 22 3 extern edge
* 23 3 extern level
* 24 4 extern level TG1_WDT
* 25 4 extern level CACHEERR