esp32: fix incorrect clock enable bit name for UART0

Closes https://github.com/espressif/esp-idf/issues/1301
2017-12-08 13:14:36 +08:00 · 2017-12-08 13:14:36 +08:00 · a705221492
parent 7e3ac34704
commit a705221492
1 changed files with 1 additions and 1 deletions
--- a/components/esp32/clk.c
+++ b/components/esp32/clk.c
@ -187,7 +187,7 @@ void esp_perip_clk_init(void)
        common_perip_clk = DPORT_WDG_CLK_EN |
                              DPORT_I2S0_CLK_EN |
 #if CONFIG_CONSOLE_UART_NUM != 0
-                              DPORT_UART0_CLK_EN |
+                              DPORT_UART_CLK_EN |
 #endif
 #if CONFIG_CONSOLE_UART_NUM != 1
                              DPORT_UART1_CLK_EN |