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hwcrypto
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hwcrypto: Fix bug with concurrent SHA access
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2017-08-25 16:08:03 +10:00 |
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include
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Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
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2017-09-04 12:05:49 +08:00 |
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ld
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Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
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2017-09-04 12:05:49 +08:00 |
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lib@fc2118052e
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esp32: Update wifi lib to use new spinlock implementation
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2017-09-04 19:11:51 +10:00 |
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test
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Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
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2017-09-04 12:05:49 +08:00 |
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brownout.c
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brownout detector: enable by default
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2017-07-10 17:25:55 +08:00 |
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cache_err_int.c
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component/soc : move dport access header files to soc
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2017-05-09 18:06:00 +08:00 |
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clk.c
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Disable some peripheral clocks when cpu starts
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2017-08-29 11:18:42 +08:00 |
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component.mk
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Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
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2017-09-04 12:05:49 +08:00 |
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core_dump.c
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esp32: Core dump sanity checks were added
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2017-04-26 21:13:02 +03:00 |
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cpu_start.c
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Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
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2017-09-04 12:05:49 +08:00 |
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crosscore_int.c
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component/soc : move dport access header files to soc
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2017-05-09 18:06:00 +08:00 |
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dport_access.c
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dport access: introduce pause/resume instead of deinit
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2017-09-01 10:36:14 +08:00 |
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dport_panic_highint_hdl.S
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Merge panic and dport high level interrupt code to both use int level 4
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2017-07-07 12:51:33 +08:00 |
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esp_timer.c
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esp_timer: return signed timestamp (int64_t)
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2017-09-01 10:34:36 +08:00 |
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esp_timer.h
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esp_timer: return signed timestamp (int64_t)
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2017-09-01 10:34:36 +08:00 |
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esp_timer_esp32.c
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esp_timer: lock-free implementation of esp_timer_get_time
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2017-09-01 10:34:36 +08:00 |
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esp_timer_impl.h
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esp_timer: add high resolution software timer API
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2017-08-28 11:35:26 +08:00 |
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ets_timer_legacy.c
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esp_timer: add high resolution software timer API
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2017-08-28 11:35:26 +08:00 |
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event_default_handlers.c
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tcpip_adapter/lwip: optimize wifi/ip event
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2017-08-21 14:36:44 +08:00 |
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event_loop.c
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esp_event_send: check if the event loop is initialized
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2017-06-05 11:01:26 +08:00 |
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fast_crypto_ops.c
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Add the fast crypto function in supplicant
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2017-08-09 21:36:13 +08:00 |
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freertos_hooks.c
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Add comments/headers according to merge request comments
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2016-11-15 12:10:02 +08:00 |
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gdbstub.c
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Fix small bug in gdbstub where it sometimes would not return a valid stop reason, timing out gdb. Also clean up the code a bit.
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2016-12-02 17:42:11 +08:00 |
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hw_random.c
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esp_random: Add some documentation about using before RF subsystem is on
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2017-07-11 14:27:20 +08:00 |
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int_wdt.c
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driver: timer
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2016-11-23 17:23:21 +08:00 |
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intr_alloc.c
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soc: release interrupts which are not reserved by timers any more
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2017-08-28 11:35:27 +08:00 |
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ipc.c
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startup: Add assertion checks around various initialisation sequences
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2017-07-12 13:06:56 +08:00 |
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Kconfig
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Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
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2017-09-04 12:05:49 +08:00 |
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lib_printf.c
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uart_tx_wait_idle: fix issue with last character not transmitted
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2016-12-08 01:42:37 +08:00 |
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libhal.a
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Initial public version
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2016-08-17 23:08:22 +08:00 |
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libstdcc++-cache-workaround.a
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Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
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2017-09-04 12:05:49 +08:00 |
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Makefile.projbuild
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Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
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2017-09-04 12:05:49 +08:00 |
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panic.c
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esp32: Fixes infinite loop caused by exception during core dumping
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2017-09-05 11:15:27 +08:00 |
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phy.h
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soc: add source code of rtc_clk, rtc_pm
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2017-04-11 15:45:54 +08:00 |
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phy_init.c
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kconfig: Remove Wi-Fi on/off as a menuconfig option
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2017-08-16 15:55:28 +05:30 |
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phy_init_data.h
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phy init data update
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2016-12-19 14:23:39 +08:00 |
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restore.c
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esp_system: remove link time dependency on WiFi stack
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2017-06-15 18:15:36 +08:00 |
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sleep_modes.c
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deep sleep: don't use protected DPORT access in wake stub
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2017-09-01 18:35:42 +08:00 |
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spiram.c
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Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
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2017-09-04 12:05:49 +08:00 |
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spiram_psram.c
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Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
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2017-09-04 12:05:49 +08:00 |
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spiram_psram.h
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Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
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2017-09-04 12:05:49 +08:00 |
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system_api.c
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dport access: introduce pause/resume instead of deinit
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2017-09-01 10:36:14 +08:00 |
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task_wdt.c
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startup: Add assertion checks around various initialisation sequences
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2017-07-12 13:06:56 +08:00 |
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wifi_init.c
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wifi: refactor code to match ethernet's init function structure
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2017-08-18 08:33:02 +05:30 |
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