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component/soc : move dport access header files to soc 

1. move dport access header files to soc
2. reduce dport register write protection. Only protect read operation
This commit is contained in:
Tian Hao 2017-05-09 18:06:00 +08:00
parent f7e8856520
commit 26a3cb93c7
26 changed files with 135 additions and 110 deletions
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1
components/bootloader/src/main/bootloader_start.c
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@ -18,7 +18,6 @@
#include "esp_attr.h"
#include "esp_log.h"
#include "esp_dport_access.h"
#include "rom/cache.h"
#include "rom/efuse.h"

1
components/bootloader_support/src/bootloader_random.c
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@ -20,7 +20,6 @@
#include "soc/dport_reg.h"
#include "soc/i2s_reg.h"
#include "esp_log.h"
#include "esp_dport_access.h"
#ifndef BOOTLOADER_BUILD
#include "esp_system.h"

1
components/driver/periph_ctrl.c
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@ -13,7 +13,6 @@
// limitations under the License.
#include <esp_types.h>
#include "esp_intr.h"
#include "esp_dport_access.h"
#include "freertos/FreeRTOS.h"
#include "freertos/semphr.h"
#include "freertos/xtensa_api.h"

1
components/driver/spi_common.c
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@ -24,7 +24,6 @@
#include "esp_attr.h"
#include "esp_intr.h"
#include "esp_intr_alloc.h"
#include "esp_dport_access.h"
#include "esp_log.h"
#include "esp_err.h"
#include "soc/soc.h"

1
components/esp32/app_trace.c
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@ -149,7 +149,6 @@
#include "soc/timer_group_struct.h"
#include "soc/timer_group_reg.h"
#include "esp_app_trace.h"
#include "esp_dport_access.h"
#if CONFIG_ESP32_APPTRACE_ENABLE
#define ESP_APPTRACE_DEBUG_STATS_ENABLE 0

1
components/esp32/cache_err_int.c
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@ -27,7 +27,6 @@
#include "esp_err.h"
#include "esp_intr.h"
#include "esp_attr.h"
#include "esp_dport_access.h"
#include "soc/dport_reg.h"
#include "sdkconfig.h"

1
components/esp32/crosscore_int.c
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@ -18,7 +18,6 @@
#include "esp_err.h"
#include "esp_intr.h"
#include "esp_intr_alloc.h"
#include "esp_dport_access.h"
#include "rom/ets_sys.h"
#include "rom/uart.h"

1
components/esp32/deep_sleep.c
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@ -16,7 +16,6 @@
#include <sys/lock.h>
#include "esp_attr.h"
#include "esp_deep_sleep.h"
#include "esp_dport_access.h"
#include "esp_log.h"
#include "esp_clk.h"
#include "rom/cache.h"

1
components/esp32/dport_access.c
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@ -25,7 +25,6 @@
#include "esp_attr.h"
#include "esp_err.h"
#include "esp_intr.h"
#include "esp_dport_access.h"
#include "rom/ets_sys.h"
#include "rom/uart.h"

1
components/esp32/hwcrypto/aes.c
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@ -29,7 +29,6 @@
#include "hwcrypto/aes.h"
#include "rom/aes.h"
#include "soc/dport_reg.h"
#include "esp_dport_access.h"
#include <sys/lock.h>
static _lock_t aes_lock;

1
components/esp32/hwcrypto/sha.c
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@ -35,7 +35,6 @@
#include "rom/ets_sys.h"
#include "soc/dport_reg.h"
#include "soc/hwcrypto_reg.h"
#include "esp_dport_access.h"
inline static uint32_t SHA_LOAD_REG(esp_sha_type sha_type) {
return SHA_1_LOAD_REG + sha_type * 0x10;

87
components/esp32/include/esp_dport_access.h
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@ -15,95 +15,8 @@
#ifndef _ESP_DPORT_ACCESS_H_
#define _ESP_DPORT_ACCESS_H_
#include <stdint.h>
void esp_dport_access_stall_other_cpu_start(void);
void esp_dport_access_stall_other_cpu_end(void);
void esp_dport_access_int_init(void);
#if defined(BOOTLOADER_BUILD) || defined(CONFIG_FREERTOS_UNICORE)
#define DPORT_STAL_OTHER_CPU_START()
#define DPORT_STAL_OTHER_CPU_END()
#else
#define DPORT_STAL_OTHER_CPU_START() esp_dport_access_stall_other_cpu_start()
#define DPORT_STAL_OTHER_CPU_END() esp_dport_access_stall_other_cpu_end()
#endif
#define IS_DPORT_REG(_r) (((_r) >= DR_REG_DPORT_BASE) && (_r) <= DPORT_DATE_REG)
//Registers Operation {{
#define _REG_WRITE(_r, _v) (*(volatile uint32_t *)(_r)) = (_v)
#define _REG_READ(_r) (*(volatile uint32_t *)(_r))
//write value to register
#define DPORT_REG_WRITE(_r, _v) {DPORT_STAL_OTHER_CPU_START(); (*(volatile uint32_t *)(_r)) = (_v); DPORT_STAL_OTHER_CPU_END();}
//read value from register
#define DPORT_REG_READ(_r) ({uint32_t val; DPORT_STAL_OTHER_CPU_START(); val = (*(volatile uint32_t *)(_r)); DPORT_STAL_OTHER_CPU_END(); val;})
//get bit or get bits from register
#define DPORT_REG_GET_BIT(_r, _b) ({uint32_t val; DPORT_STAL_OTHER_CPU_START(); val = (*(volatile uint32_t*)(_r) & (_b)); DPORT_STAL_OTHER_CPU_END(); val;})
//set bit or set bits to register
#define DPORT_REG_SET_BIT(_r, _b) {DPORT_STAL_OTHER_CPU_START(); (*(volatile uint32_t*)(_r) |= (_b)); DPORT_STAL_OTHER_CPU_END();}
//clear bit or clear bits of register
#define DPORT_REG_CLR_BIT(_r, _b) {DPORT_STAL_OTHER_CPU_START(); (*(volatile uint32_t*)(_r) &= ~(_b)); DPORT_STAL_OTHER_CPU_END();}
//set bits of register controlled by mask
#define DPORT_REG_SET_BITS(_r, _b, _m) {DPORT_STAL_OTHER_CPU_START(); (*(volatile uint32_t*)(_r) = (*(volatile uint32_t*)(_r) & ~(_m)) | ((_b) & (_m))); DPORT_STAL_OTHER_CPU_END();}
//get field from register, uses field _S & _V to determine mask
#define DPORT_REG_GET_FIELD(_r, _f) ({uint32_t val; DPORT_STAL_OTHER_CPU_START(); val = ((_REG_READ(_r) >> (_f##_S)) & (_f##_V)); DPORT_STAL_OTHER_CPU_END(); val;})
//set field to register, used when _f is not left shifted by _f##_S
#define DPORT_REG_SET_FIELD(_r, _f, _v) {DPORT_STAL_OTHER_CPU_START(); (_REG_WRITE((_r),((_REG_READ(_r) & ~((_f) << (_f##_S)))|(((_v) & (_f))<<(_f##_S))))); DPORT_STAL_OTHER_CPU_END();}
//get field value from a variable, used when _f is not left shifted by _f##_S
#define DPORT_VALUE_GET_FIELD(_r, _f) ({uint32_t val; DPORT_STAL_OTHER_CPU_START(); val = (((_r) >> (_f##_S)) & (_f)); DPORT_STAL_OTHER_CPU_END(); val;})
//get field value from a variable, used when _f is left shifted by _f##_S
#define DPORT_VALUE_GET_FIELD2(_r, _f) ({uint32_t val; DPORT_STAL_OTHER_CPU_START(); val = (((_r) & (_f))>> (_f##_S)); DPORT_STAL_OTHER_CPU_END(); val;})
//set field value to a variable, used when _f is not left shifted by _f##_S
#define DPORT_VALUE_SET_FIELD(_r, _f, _v) {DPORT_STAL_OTHER_CPU_START(); ((_r)=(((_r) & ~((_f) << (_f##_S)))|((_v)<<(_f##_S)))); DPORT_STAL_OTHER_CPU_END();}
//set field value to a variable, used when _f is left shifted by _f##_S
#define DPORT_VALUE_SET_FIELD2(_r, _f, _v) {DPORT_STAL_OTHER_CPU_START(); ((_r)=(((_r) & ~(_f))|((_v)<<(_f##_S)))); DPORT_STAL_OTHER_CPU_END();}
//generate a value from a field value, used when _f is not left shifted by _f##_S
#define DPORT_FIELD_TO_VALUE(_f, _v) ({uint32_t val; DPORT_STAL_OTHER_CPU_START(); val = (((_v)&(_f))<<_f##_S); DPORT_STAL_OTHER_CPU_END(); val;})
//generate a value from a field value, used when _f is left shifted by _f##_S
#define DPORT_FIELD_TO_VALUE2(_f, _v) ({uint32_t val; DPORT_STAL_OTHER_CPU_START(); val = (((_v)<<_f##_S) & (_f)); DPORT_STAL_OTHER_CPU_END(); val;})
#define _READ_PERI_REG(addr) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr)))
#define _WRITE_PERI_REG(addr, val) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) = (uint32_t)(val)
//read value from register
#define DPORT_READ_PERI_REG(addr) ({uint32_t val; DPORT_STAL_OTHER_CPU_START(); val = (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))); DPORT_STAL_OTHER_CPU_END(); val;})
//write value to register
#define DPORT_WRITE_PERI_REG(addr, val) {DPORT_STAL_OTHER_CPU_START(); (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) = (uint32_t)(val); DPORT_STAL_OTHER_CPU_END();}
//clear bits of register controlled by mask
#define DPORT_CLEAR_PERI_REG_MASK(reg, mask) {DPORT_STAL_OTHER_CPU_START(); _WRITE_PERI_REG((reg), (_READ_PERI_REG(reg)&(~(mask)))); DPORT_STAL_OTHER_CPU_END();}
//set bits of register controlled by mask
#define DPORT_SET_PERI_REG_MASK(reg, mask) {DPORT_STAL_OTHER_CPU_START(); _WRITE_PERI_REG((reg), (_READ_PERI_REG(reg)|(mask))); DPORT_STAL_OTHER_CPU_END();}
//get bits of register controlled by mask
#define DPORT_GET_PERI_REG_MASK(reg, mask) ({uint32_t val; DPORT_STAL_OTHER_CPU_START(); val = (_READ_PERI_REG(reg) & (mask)); DPORT_STAL_OTHER_CPU_END(); val;})
//get bits of register controlled by highest bit and lowest bit
#define DPORT_GET_PERI_REG_BITS(reg, hipos,lowpos) ({uint32_t val; DPORT_STAL_OTHER_CPU_START(); val = ((_READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1)); DPORT_STAL_OTHER_CPU_END(); val;})
//set bits of register controlled by mask and shift
#define DPORT_SET_PERI_REG_BITS(reg,bit_map,value,shift) {DPORT_STAL_OTHER_CPU_START(); (_WRITE_PERI_REG((reg),(_READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|(((value) & bit_map)<<(shift)) )); DPORT_STAL_OTHER_CPU_END();}
//get field of register
#define DPORT_GET_PERI_REG_BITS2(reg, mask,shift) ({uint32_t val; DPORT_STAL_OTHER_CPU_START(); val = ((_READ_PERI_REG(reg)>>(shift))&(mask)); DPORT_STAL_OTHER_CPU_END(); val;})
//}}
#endif /* _ESP_DPORT_ACCESS_H_ */

1
components/esp32/phy_init.c
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@ -26,7 +26,6 @@
#include "esp_err.h"
#include "esp_phy_init.h"
#include "esp_dport_access.h"
#include "esp_system.h"
#include "esp_log.h"
#include "nvs.h"

1
components/esp32/system_api.c
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@ -19,7 +19,6 @@
#include "esp_wifi.h"
#include "esp_wifi_internal.h"
#include "esp_log.h"
#include "esp_dport_access.h"
#include "sdkconfig.h"
#include "rom/efuse.h"
#include "rom/cache.h"

1
components/esp32/test/test_ahb_arb.c
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@ -21,7 +21,6 @@
#include "soc/gpio_reg.h"
#include "soc/i2s_reg.h"
#include "esp_dport_access.h"
#define DPORT_I2S0_CLK_EN (BIT(4))

1
components/esp32/test/test_unal_dma.c
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@ -21,7 +21,6 @@
#include "soc/gpio_reg.h"
#include "soc/i2s_reg.h"
#include "esp_dport_access.h"
#define DPORT_I2S0_CLK_EN (BIT(4))
#define DPORT_I2S0_RST (BIT(4))

1
components/freertos/test/test_freertos.c
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@ -15,7 +15,6 @@
#include "soc/uart_reg.h"
#include "soc/dport_reg.h"
#include "soc/io_mux_reg.h"
#include "esp_dport_access.h"
void ets_isr_unmask(uint32_t unmask);

1
components/freertos/test/test_ringbuf.c
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@ -16,7 +16,6 @@
#include "soc/uart_reg.h"
#include "soc/dport_reg.h"
#include "soc/io_mux_reg.h"
#include "esp_dport_access.h"
#include <string.h>
#include <stdio.h>

1
components/mbedtls/port/esp_bignum.c
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@ -34,7 +34,6 @@
#include "esp_intr.h"
#include "esp_intr_alloc.h"
#include "esp_attr.h"
#include "esp_dport_access.h"
#include "soc/dport_reg.h"

127
components/soc/esp32/include/soc/dport_access.h Normal file
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@ -0,0 +1,127 @@
// Copyright 2010-2017 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _DPORT_ACCESS_H_
#define _DPORT_ACCESS_H_
#include <stdint.h>
#include "esp_attr.h"
void esp_dport_access_stall_other_cpu_start(void);
void esp_dport_access_stall_other_cpu_end(void);
#if defined(BOOTLOADER_BUILD) || defined(CONFIG_FREERTOS_UNICORE) || !defined(ESP_PLATFORM)
#define DPORT_STAL_OTHER_CPU_START()
#define DPORT_STAL_OTHER_CPU_END()
#else
#define DPORT_STAL_OTHER_CPU_START() esp_dport_access_stall_other_cpu_start()
#define DPORT_STAL_OTHER_CPU_END() esp_dport_access_stall_other_cpu_end()
#endif
#define IS_DPORT_REG(_r) (((_r) >= DR_REG_DPORT_BASE) && (_r) <= DPORT_DATE_REG)
//Registers Operation {{
#define _REG_READ(_r) (*(volatile uint32_t *)(_r))
#define _REG_WRITE(_r, _v) (*(volatile uint32_t *)(_r)) = (_v)
//write value to register
#define DPORT_REG_WRITE(_r, _v) _REG_WRITE(_r, _v)
//read value from register
inline uint32_t IRAM_ATTR DPORT_REG_READ(uint32_t reg)
{
uint32_t val;
DPORT_STAL_OTHER_CPU_START();
val = _REG_READ(reg);
DPORT_STAL_OTHER_CPU_END();
return val;
}
//get bit or get bits from register
#define DPORT_REG_GET_BIT(_r, _b) (DPORT_REG_READ(_r) & (_b))
//set bit or set bits to register
#define DPORT_REG_SET_BIT(_r, _b) (*(volatile uint32_t*)(_r) |= (_b))
//clear bit or clear bits of register
#define DPORT_REG_CLR_BIT(_r, _b) (*(volatile uint32_t*)(_r) &= ~(_b))
//set bits of register controlled by mask
#define DPORT_REG_SET_BITS(_r, _b, _m) (*(volatile uint32_t*)(_r) = (DPORT_REG_READ(_r) & ~(_m)) | ((_b) & (_m)))
//get field from register, uses field _S & _V to determine mask
#define DPORT_REG_GET_FIELD(_r, _f) ((DPORT_REG_READ(_r) >> (_f##_S)) & (_f##_V))
//set field to register, used when _f is not left shifted by _f##_S
#define DPORT_REG_SET_FIELD(_r, _f, _v) (DPORT_REG_WRITE((_r),((DPORT_REG_READ(_r) & ~((_f) << (_f##_S)))|(((_v) & (_f))<<(_f##_S)))))
//get field value from a variable, used when _f is not left shifted by _f##_S
#define DPORT_VALUE_GET_FIELD(_r, _f) (((_r) >> (_f##_S)) & (_f))
//get field value from a variable, used when _f is left shifted by _f##_S
#define DPORT_VALUE_GET_FIELD2(_r, _f) (((_r) & (_f))>> (_f##_S))
//set field value to a variable, used when _f is not left shifted by _f##_S
#define DPORT_VALUE_SET_FIELD(_r, _f, _v) ((_r)=(((_r) & ~((_f) << (_f##_S)))|((_v)<<(_f##_S))))
//set field value to a variable, used when _f is left shifted by _f##_S
#define DPORT_VALUE_SET_FIELD2(_r, _f, _v) ((_r)=(((_r) & ~(_f))|((_v)<<(_f##_S))))
//generate a value from a field value, used when _f is not left shifted by _f##_S
#define DPORT_FIELD_TO_VALUE(_f, _v) (((_v)&(_f))<<_f##_S)
//generate a value from a field value, used when _f is left shifted by _f##_S
#define DPORT_FIELD_TO_VALUE2(_f, _v) (((_v)<<_f##_S) & (_f))
#define _READ_PERI_REG(addr) (*((volatile uint32_t *)(addr)))
#define _WRITE_PERI_REG(addr, val) (*((volatile uint32_t *)(addr))) = (uint32_t)(val)
//read value from register
inline uint32_t IRAM_ATTR DPORT_READ_PERI_REG(uint32_t addr)
{
uint32_t val;
DPORT_STAL_OTHER_CPU_START();
val = _READ_PERI_REG(addr);
DPORT_STAL_OTHER_CPU_END();
return val;
}
//write value to register
#define DPORT_WRITE_PERI_REG(addr, val) _WRITE_PERI_REG(addr, val)
//clear bits of register controlled by mask
#define DPORT_CLEAR_PERI_REG_MASK(reg, mask) DPORT_WRITE_PERI_REG((reg), (DPORT_READ_PERI_REG(reg)&(~(mask))))
//set bits of register controlled by mask
#define DPORT_SET_PERI_REG_MASK(reg, mask) DPORT_WRITE_PERI_REG((reg), (DPORT_READ_PERI_REG(reg)|(mask)))
//get bits of register controlled by mask
#define DPORT_GET_PERI_REG_MASK(reg, mask) (DPORT_READ_PERI_REG(reg) & (mask))
//get bits of register controlled by highest bit and lowest bit
#define DPORT_GET_PERI_REG_BITS(reg, hipos,lowpos) ((DPORT_READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1))
//set bits of register controlled by mask and shift
#define DPORT_SET_PERI_REG_BITS(reg,bit_map,value,shift) DPORT_WRITE_PERI_REG((reg),(DPORT_READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|(((value) & bit_map)<<(shift)))
//get field of register
#define DPORT_GET_PERI_REG_BITS2(reg, mask,shift) ((DPORT_READ_PERI_REG(reg)>>(shift))&(mask))
//}}
#endif /* _DPORT_ACCESS_H_ */

8
components/soc/esp32/include/soc/dport_reg.h
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@ -16,6 +16,14 @@
#include "soc.h"
#ifndef __ASSEMBLER__
#include "dport_access.h"
#endif
/* Registers defined in this header file must be accessed using special macros,
* prefixed with DPORT_. See soc/dport_access.h file for details.
*/
#define DPORT_PRO_BOOT_REMAP_CTRL_REG (DR_REG_DPORT_BASE + 0x000)
/* DPORT_PRO_BOOT_REMAP : R/W ;bitpos:[0] ;default: 1'b0 ; */
/*description: */

1
components/soc/esp32/rtc_clk.c
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@ -30,7 +30,6 @@
#include "soc_log.h"
#include "sdkconfig.h"
#include "esp_dport_access.h"
#define MHZ (1000000)

1
components/soc/esp32/rtc_init.c
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@ -19,7 +19,6 @@
#include "soc/rtc_cntl_reg.h"
#include "soc/dport_reg.h"
#include "esp_dport_access.h"
void rtc_init(rtc_config_t cfg)
{

1
components/soc/esp32/rtc_sleep.c
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@ -25,7 +25,6 @@
#include "soc/fe_reg.h"
#include "soc/rtc.h"
#include "rom/ets_sys.h"
#include "esp_dport_access.h"
#define MHZ (1000000)

1
components/spi_flash/cache_utils.c
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@ -29,7 +29,6 @@
#include "esp_attr.h"
#include "esp_intr_alloc.h"
#include "esp_spi_flash.h"
#include "esp_dport_access.h"
#include "esp_log.h"

1
components/xtensa-debug-module/trax.c
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@ -16,7 +16,6 @@
#include "soc/dport_reg.h"
#include "sdkconfig.h"
#include "esp_err.h"
#include "esp_dport_access.h"
#include "eri.h"
#include "xtensa-debug-module.h"
#include "trax.h"