Commit graph

613 commits

Author SHA1 Message Date
Angus Gratton f21079a06d Merge branch 'bugfix/duplicate_sdio_slave_hal' into 'master'
soc: remove duplicate sdio_slave_hal.c

See merge request espressif/esp-idf!7874
2020-03-09 13:35:58 +08:00
morris 8b6c0947c7 soc: add hal api to set exception vector table base address 2020-03-06 20:23:30 +08:00
Angus Gratton a9854f7085 Merge branch 'feature/rmt_clock_support_ref_tick' into 'master'
rmt: support ref tick && refactor unit test && re-enable unit test on ESP32-S2

Closes IDFGH-1715

See merge request espressif/esp-idf!7614
2020-03-06 15:03:52 +08:00
Michael (XIAO Xufeng) 8e348dcdcd Merge branch 'bugfix/fix_driver_ut_i2s' into 'master'
bugfix(i2s): fix driver ut i2s

See merge request espressif/esp-idf!6946
2020-03-06 11:55:07 +08:00
Jiang Jiang Jian b7a14c47e6 Merge branch 'bugfix/customer_baidu_psram_stack_backtrace' into 'master'
added psram stack check in backtrace

See merge request espressif/esp-idf!7834
2020-03-06 11:35:54 +08:00
Renz Bagaporo 5f3a689a89 soc: remove duplicate sdio_slave_hal.c 2020-03-05 12:47:54 +08:00
chaijie 66beaaef7d soc(rtc): modify rtc code in soc for esp32s2 2020-03-03 13:22:52 +00:00
morris 07088c6446 rmt: disable carrier feature by default 2020-03-03 20:14:46 +08:00
morris 0e4d82bc55 rmt: support REF_TICK as channel clock source
Closes https://github.com/espressif/esp-idf/pull/3952
2020-03-03 20:14:46 +08:00
morris 3c43264f83 rmt: add RMT_CHANNELS_NUM in rmt_caps.h 2020-03-03 20:14:45 +08:00
xiongyu b3ae9fa978 bugfix(i2s): Updated ESP32-S2 ADC DAC support
* Delete the relevant codes of ADC DAC of ESP32-S2.
2020-03-03 12:59:30 +08:00
fuzhibo 3ad5138dd8 fix coexist i2s_adc and rtc_adc 2020-03-03 11:58:53 +08:00
xiongyu faf898b659 bugfix(i2s): fix driver ut i2s
* Add test support for ESP32S2

* Add loop back test

* Support chip internal connection, no external wiring required.

* Delete the relevant codes of PDM of ESP32-S2 ll layer.

* fix dac dma mode issue
2020-03-03 11:58:53 +08:00
Li Shuai c796e14964 added psram stack check in backtrace 2020-03-03 11:52:29 +08:00
Angus Gratton 04ccb84b83 Merge branch 'feature/cpu_abstraction' into 'master'
CPU related operations abstraction

See merge request espressif/esp-idf!7301
2020-02-28 11:54:29 +08:00
Michael (XIAO Xufeng) ce3ab0b8df Merge branch 'bugfix/nec_example' into 'master'
bugfix in NEC example and low level function

Closes IDFGH-2676 and IDFGH-2689

See merge request espressif/esp-idf!7562
2020-02-28 11:00:50 +08:00
Mahavir Jain 5f897fd33c Merge branch 'feat/secure_boot_v2_v41' into 'master'
feat/secure_boot_v2: Adding secure boot v2 support to ESP32-ECO3

Closes IDF-799

See merge request espressif/esp-idf!6778
2020-02-27 18:54:08 +08:00
Angus Gratton d40c69375c bootloader: Add fault injection resistance to Secure Boot bootloader verification
Goal is that multiple faults would be required to bypass a boot-time signature check.

- Also strengthens some address range checks for safe app memory addresses
- Change pre-enable logic to also check the bootloader signature before enabling SBV2 on ESP32

Add some additional checks for invalid sections:

- Sections only partially in DRAM or IRAM are invalid
- If a section is in D/IRAM, allow the possibility only some is in D/IRAM
- Only pass sections that are entirely in the same type of RTC memory region
2020-02-27 14:37:19 +05:30
Michael (XIAO Xufeng) 7f8c827326 Merge branch 'bugfix/fix_driver_ut_pcnt' into 'master'
bugfix(pcnt): fix driver ut pcnt

See merge request espressif/esp-idf!6891
2020-02-27 11:29:28 +08:00
Renz Christian Bagaporo d46989efa3 soc: remove param checking in cpu related abstractions 2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo f75cb2ef00 soc: change cpu stall, unstall, and reset core to not return values 2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo d5c123c1f5 soc: use own macro to assert proper args for cpu abstractions 2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo 7f864d24ad soc: prefer assertions, disabling functions for cpu abstractions
Prefer assertions, making available functions only when caps support it
for cpu-related abstractions.

Changes cpu hal functions to stall, unstall, reset to not accept -1;
instead prefering macros that provide the same functionality.
2020-02-27 07:15:14 +05:00
Renz Christian Bagaporo cefc71cdcd bootloader_support: mem-related initializations using cpu abstractions 2020-02-27 07:14:21 +05:00
Renz Christian Bagaporo f3c6320ff6 soc: implement cpu utils in terms of cpu abstractions 2020-02-27 07:14:21 +05:00
Renz Christian Bagaporo c9a51bfbb2 soc: create abstraction for cpu related operations 2020-02-27 07:14:19 +05:00
Sachin Parekh 301dacfb33 Exception handlers for LoadStoreError and LoadStoreAlignmentError
Configurable option to use IRAM as byte accessible memory (in single core mode) using
load-store (non-word aligned and non-word size IRAM access specific) exception handlers.
This allows to use IRAM for use-cases where certain performance penalty
(upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration
option has been provided to redirect mbedTLS specific in-out content length buffers to
IRAM (in single core mode), allows to save 20KB per TLS connection.
2020-02-26 20:21:59 +08:00
Michael (XIAO Xufeng) c53192d521 Merge branch 'bugfix/fix_uart_set_line_inverse_breaking_change_issue' into 'master'
Bugfix(uart): fix uart_set_line_inverse breaking change issue

Closes IDFGH-2469

See merge request espressif/esp-idf!7345
2020-02-26 18:34:52 +08:00
xiongyu 4d5c950770 bugfix(pcnt): fix driver ut pcnt
* Let `[ignore] case` return to freedom

  1) Because this test uses its own ISR, we need to release it with `esp_intr_free` instead of `pcnt_isr_service_uninstall`.

  2) `pcnt_evt_queue` needs to be created before the interrupt is registered and needs to be released at the end of each case.

* Add test support for ESP32S2

* Support chip internal connection, no external wiring required.
2020-02-26 16:52:53 +08:00
houwenxiang 4883733472 driver(I2C): support esp32-s2 I2C driver. 2020-02-25 21:56:00 +08:00
Michael (XIAO Xufeng) 8f496a0f96 Merge branch 'refactor/add_ll_for_clock_gate_operation' into 'master'
periph_ctrl: move target specific into ll files

See merge request espressif/esp-idf!7733
2020-02-25 16:56:30 +08:00
morris e9717fc07b periph_ctrl: move target specific into ll files 2020-02-24 14:50:26 +08:00
morris ea8d6318af add SOC_EMAC_SUPPORTED in soc_caps.h 2020-02-24 11:57:58 +08:00
houwenxiang c07e4c775d driver(uart): fix uart_set_line_inverse breaking change issue
closes https://github.com/espressif/esp-idf/issues/4581
2020-02-24 11:36:31 +08:00
Fu Zhi Bo 7a5b67b8de rtcio: fix rtcio unhold function
Solve problems caused by code refactoring.

Closes https://github.com/espressif/esp-idf/issues/4600
2020-02-20 15:42:28 +08:00
Ivan Grokhotkov 40cff27053 Merge branch 'feature/esp32s2_pm' into 'master'
esp32s2: power management (DFS and auto light sleep)

Closes IDF-670, IDF-527, and IDFGH-231

See merge request espressif/esp-idf!7578
2020-02-19 18:26:33 +08:00
Ivan Grokhotkov fe0df01b12 Merge branch 'bugfix/from_github' into 'master'
Fixes from Github

Closes IDFGH-2679, IDFGH-2632, IDFGH-2716, IDFGH-2439, and IDFGH-2509

See merge request espressif/esp-idf!7659
2020-02-18 23:53:38 +08:00
Alexander Borsuk e489e48dfa Fixes compilation error on verbose level (IDFGH-2439)
Closes #4552

Merges https://github.com/espressif/esp-idf/pull/4786
2020-02-18 12:30:47 +01:00
Jiang Jiang Jian 1a7d0b3b6f Merge branch 'bugfix/esp32s2_rng' into 'master'
soc: esp32s2: fix address of WDEV_RND_REG

Closes IDF-1390

See merge request espressif/esp-idf!7640
2020-02-18 19:07:51 +08:00
Ivan Grokhotkov 19c2337168 soc: esp32s2: fix address of WDEV_RND_REG
Ref. ESP32-S2 TRM.

Closes IDF-1390
2020-02-18 08:24:33 +01:00
Ivan Grokhotkov 383ace9443 rtc_clk_cal: make compatible with the ESP32 2020-02-17 17:33:56 +01:00
Ivan Grokhotkov 490bf29767 esp32s2: fix enabling 32k XTAL clock
On the ESP32S2, rtc_clk_cal(RTC_CAL_RTC_MUX) measures the frequency
of the 90kHz RTC clock regardless of the selected slow clock
frequency. Keep track which clock is selected and pass the argument
to rtc_clk_cal accordingly.

fix clock choices

update rtc 32k xtal code for s2

missed api in rtc.h

bootloader_clock: update for S2
2020-02-17 17:33:56 +01:00
Ivan Grokhotkov 74ac618287 soc/rtc: update frequency switching APIs to match the master branch
esp32s2 code was based in IDF v3.1, and used outdated APIs.

Closes IDF-670
2020-02-17 17:23:32 +01:00
xiongyu 61778d5b7c bugfix(i2s): fix adc output invert issue 2020-02-17 17:15:01 +08:00
morris 0d521e8f9d rmt: fix missing 0x in rmt_ll.h
Closes https://github.com/espressif/esp-idf/issues/4760
2020-02-17 15:20:41 +08:00
Krzysztof Budzynski 41bc06b9b9 Merge branch 'bugfix/docs_ledc' into 'master'
drivers: Remove high speed mode from LEDC docs for ESP32-S2, update headers to match

See merge request espressif/esp-idf!7532
2020-02-17 05:00:36 +08:00
Jiang Jiang Jian cedea18acb Merge branch 'bugfix/wifi_clear_phy_status_when_cpu_start' into 'master'
soc: clear PHY status when cpu start

Closes AUD-1125

See merge request espressif/esp-idf!7493
2020-02-12 15:34:46 +08:00
Renz Christian Bagaporo 16e0c93e40 ci: solve public headers errors 2020-02-11 14:30:42 +05:00
Renz Christian Bagaporo b675df4b08 soc: use include_next for including common touch sensor hal header 2020-02-11 14:30:42 +05:00
Renz Christian Bagaporo 1f2e2fe8af soc: separate abstraction, description and implementation 2020-02-11 14:30:42 +05:00
Angus Gratton ea34f3bb27 drivers: Remove high speed mode from LEDC docs for ESP32-S2, update headers to match 2020-02-11 14:36:47 +11:00
Andrei Gramakov 4e8b4b9e49 soc: add USB peripheral register definitions, hal level, reg map, etc 2020-02-10 08:33:39 +00:00
Konstantin Kondrashov daa9c30c8e rmt/esp32s2: Update RMT: reg, struct, LL and test_utils/ref_clock.c 2020-02-09 20:03:31 +08:00
Ivan Grokhotkov 4bfd0b961b Merge branch 'fix/spi_on_esp32s2' into 'master'
spi: support esp32s2

See merge request espressif/esp-idf!7432
2020-02-09 19:45:16 +08:00
Ivan Grokhotkov 98bb3772e0 soc: spi_flash LL fixes 2020-02-07 16:18:31 +01:00
Wangjialin aaf119e930 flash(esp32s2): fix setting address field in spi user mode. 2020-02-07 16:10:51 +01:00
Angus Gratton 11fac8637a docs: Resolve doxygen & Sphinx warnings 2020-02-07 16:37:45 +11:00
Angus Gratton fda4efa300 Merge branch 'bugfix/rtc_wdt_timeout' into 'master'
soc/esp32s2: Fix setting timeout for RTC_WDT. ESP32-S2 uses 90KHz instead of 150kHz

See merge request espressif/esp-idf!7499
2020-02-06 14:27:35 +08:00
Konstantin Kondrashov 739eb05bb9 esp32: add implementation of esp_timer based on TG0 LAC timer
Closes: IDF-979
2020-02-06 14:00:18 +08:00
KonstantinKondrashov 47a5d14e59 soc/esp32s2: Fix setting timeout for RTC_WDT. ESP32-S2 uses 90KHz instead of 150kHz 2020-02-05 15:16:28 +08:00
Ivan Grokhotkov 50466a5e4f Merge branch 'bugfix/esp32s2_ldscripts' into 'master'
esp32s2: LD script fixes/improvements and re-enable SystemView examples

Closes IDF-1357, IDF-1354, and IDF-1346

See merge request espressif/esp-idf!7431
2020-02-05 02:09:29 +08:00
Xia Xiaotian 1833b8aeab soc: clear PHY status when cpu start 2020-02-04 14:37:16 +08:00
Michael (XIAO Xufeng) 7026087dc0 spi: support esp32s2 2020-01-26 17:24:12 +08:00
Michael (XIAO Xufeng) 9d41829e09 spi: update esp32s2 hardware description files 2020-01-26 17:24:11 +08:00
Ivan Grokhotkov 3eb190ce48 esp32s2: fix interrupt names used by SystemView 2020-01-24 10:48:38 +01:00
Ivan Grokhotkov 02a99e84c8 esp32s2: move trace memory reservation to soc_memory_layout.c 2020-01-24 10:48:38 +01:00
Ivan Grokhotkov 354ce68dce soc: move reserved regions out of memory_layout_utils.c
These definitions have ended up being chip specific. Moving them into
respective soc_memory_layout.c makes the whole picture of memory
regions easier to see, and also makes adding support for new chips
easier.
2020-01-24 10:48:20 +01:00
Ivan Grokhotkov caef7ad9f2 esp32, esp32s2beta: move brownout.c to esp_common 2020-01-23 13:44:19 +01:00
Ivan Grokhotkov 70752baba4 esp32s2: add brownout detector support
1. add brownout detector HAL for esp32 and esp32s2
2. enable brownout reset for esp32 rev. 1 and above
3. add approximate brownout detector levels for esp32s2
2020-01-23 13:44:19 +01:00
Ivan Grokhotkov 46035032cf esp32s2: fix inconsistency between reg and struct headers
test_mux register doesn't exist in RTCCNTL anymore, remove it from
struct header. Also remove adc_ll_vref_output implementation, which
depends on that register.
2020-01-23 11:30:11 +01:00
morris e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
morris 95743f4ee6 update rtc_sleep_init for esp32s2 2020-01-22 10:19:05 +08:00
Felipe Neves 73592d9bc4 spin_lock: added new spinlock interface and decoupled it from RTOS
spin_lock: cleaned-up port files and removed portmux files

components/soc: decoupled compare and set operations from FreeRTOS

soc/spinlock: filled initial implementation of spinlock refactor

It will decouple the spinlocks into separated components with not depencences of freertos
an similar interface was provided focusing the readabillity and maintenance, also
naming to spinlocks were adopted. On FreeRTOS side the legacy portMUX macros
gained a form of wrapper functions that calls the spinlocks component thus
minimizing the impact on RTOS side.

This feature aims to close IDF-967

soc/spinlock: spinlocks passed on unit test, missing test corner cases

components/compare_set: added better function namings plus minor performance optimization on spinlocks

soc/spinlock: code reordering to remove ISC C90 mix error

freertos/portmacro: gor rid of critical sections multiline macros, placed inline functions instead

soc/spinlock: improved spinlock performance from internal RAM

For cases where the spinlock is executed from IRAM, there is no
need to check where the spinlock object is placed on memory,
removing this checks caused a great improvement on performance.
2020-01-22 06:20:34 +08:00
morris 2422c52851 global: hello world on real esp32-s2 2020-01-16 17:43:59 +08:00
Wangjialin d4e5980823 flash: fix 80Mhz for new spi flash driver on esp32s2 2020-01-16 17:43:59 +08:00
Wangjialin fad639f0d4 feature(psram): update psram initialization.
1. use spi functions in rom
2. remove unnecessary GPIO configurations.
3. remove unnecessary dummy settings.
4. enable dummy out function
5. flash and psram have independent timing setting registers.
6. no need to set 1.9v for LDO in 80Mhz
7. set IO driver ability to 1 by default.
8. no need to use GPIO matrix on esp32s2, IO MUX is recommended
9. enable spi clock mode and IO mode settings
2020-01-16 17:41:31 +08:00
morris 1c2cc5430e global: bring up esp32s2(not beta) 2020-01-16 17:41:31 +08:00
Angus Gratton c7738f24fc Merge branch 'bugfix/ledc_driver_enums' into 'master'
driver: Avoid possible accidental mismatch between ledc_clk_src_t & ledc_clk_cfg_t enum

See merge request espressif/esp-idf!7021
2020-01-10 15:34:43 +08:00
Angus Gratton 782fc0df5f Merge branch 'refactor/can_driver' into 'master'
Refactor CAN to use HAL and LowLevel layers

Closes IDF-617

See merge request espressif/esp-idf!7019
2020-01-10 14:22:02 +08:00
Darian Leung a049e02d96 can: Refactor CAN to use HAL and LowLevel layers
The following commit refactors the CAN driver such that
it is split into HAL and Lowlevel layers. The following
changes have also been made:

- Added bit field members to can_message_t as alternative
  to message flags. Updated examples and docs accordingly
- Register field names and fields of can_dev_t updated
2020-01-09 16:13:51 +08:00
suda-morris 1ffb546135 esp32s2:remove unsupported xtal choice
ESP32-S2 only supports 40MHz XTAL and doesn't have XTAL autodetection.
2020-01-09 13:09:21 +08:00
michael f676a3b190 driver, soc: update multichip support headers 2020-01-06 17:13:54 +08:00
Ivan Grokhotkov 52f8aa2adb Merge branch 'feature/heap_non_os_build' into 'master'
heap: make compatible with non-OS builds, remove target dependence

Closes IDF-1236

See merge request espressif/esp-idf!7051
2020-01-03 17:12:51 +08:00
Angus Gratton 7dc7557aa9 soc: Fix esp_ptr_executable() for single core ESP32 config & cache memory
In single core mode, APP CPU cache region is added to the available range.
2020-01-03 17:31:40 +11:00
Ivan Grokhotkov d9534b3d6a soc: fix backtraces containing ROM functions
esp_ptr_executable would return false for pointers to ROM, which would
interrupt the backtrace. This makes ROM ranges recognized as
executable.
2020-01-02 18:42:46 +01:00
Ivan Grokhotkov 4bbfa6e494 Merge branch 'feature/soc_ledc_caps' into 'master'
soc: add ledc_caps.h, replace target-based ifdefs with caps-based

See merge request espressif/esp-idf!6858
2019-12-30 18:47:11 +08:00
Angus Gratton bc02b128be Merge branch 'feature/add_eth_download_test' into 'master'
ethernet: test download blob && phy addr auto detect

Closes IDF-1238

See merge request espressif/esp-idf!6957
2019-12-30 11:52:40 +08:00
Ivan Grokhotkov e4d45608d3 soc: add ledc_caps.h, replace target-based ifdefs with caps-based 2019-12-28 20:33:21 +00:00
Ivan Grokhotkov 3285ed116d heap: make compatible with non-OS builds, remove target dependence 2019-12-27 12:40:06 +01:00
Michael (XIAO Xufeng) 72cf67cba3 sdio_slave_hal: fix the TAG non-static issue
(MINOR CHANGE)
2019-12-24 16:50:09 +08:00
morris 7baf7ce273 ethernet: optimise tx and rx 2019-12-24 11:18:31 +08:00
Ivan Grokhotkov c029888bf1 Merge branch 'fix/spi_ut_esp32s2beta' into 'master'
spi: re-enable the unit tests for esp32s2beta

Closes IDF-1020

See merge request espressif/esp-idf!6327
2019-12-23 15:10:31 +08:00
morris 888316fc64 bootloader_support: refactor to better support multi target 2019-12-23 05:45:17 +00:00
michael 262ba6f825 spi: fix iomux, timing and address phase issues for esp32s2beta 2019-12-23 10:23:00 +08:00
michael 11fa11000f spi: re-enable the unit tests for esp32s2beta 2019-12-23 10:22:59 +08:00
Mahavir Jain e8db1c4da0 Merge branch 'feature/enable_i2s_tests_on_esp32s2beta' into 'master'
Enable i2s and freertos test/s on esp32s2beta

See merge request espressif/esp-idf!6790
2019-12-18 17:51:54 +08:00
kewal shah eec8212237 add simplified API to set UART threshold values for RX FIFO full and TX FIFO empty 2019-12-16 20:26:04 +00:00
Angus Gratton 435dd546cc driver: Avoid possible accidental mismatch between ledc_clk_src_t & ledc_clk_cfg_t enum
ledc_types.h includes two similar enums, ledc_clk_src_t & ledc_clk_cfg_t. Latter was added in
ESP-IDF v4.0.

The two enums do different things but there are two similar names: LEDC_REF_TICK / LEDC_USE_REF_TICK
and LEDC_APB_CLK / LEDC_USE_APB_CLK.

Because C will accept any enum or integer value for an enum argument, there's no easy way to check
the correct enum is passed without using static analysis.

To avoid accidental errors, make the numeric values for the two similarly named enums the same.,

Noticed when looking into https://github.com/espressif/esp-idf/issues/4476
2019-12-16 19:43:11 +11:00
Mahavir Jain 8b05cf41ad i2s: enable tests for esp32s2beta 2019-12-16 11:53:33 +05:30
Michael (XIAO Xufeng) 0ec08ca21b sdio_slave: support HAL layer 2019-12-13 18:33:15 +08:00
Wang Jia Lin f5e60524ac Merge branch 'bugfix/fix_i2c_driver_breakingchange_issue' into 'master'
bugfix(i2c): fix I2C driver breaking change issue

See merge request espressif/esp-idf!6809
2019-12-06 16:50:16 +08:00
houwenxiang aac935ec81 bugfix(i2c): fix I2C driver breaking change issue.
1. Fixed I2C driver breaking change issue.
    2. Add I2C UT test case.
2019-12-04 15:51:36 +08:00
houwenxiang e4230d11ca bugfix(UART): fix uart driver spinlock misused bug
1. fix uart driver spinlock misused bug
    2. add uart driver ut test case
    3. undo the change in light_sleep_example_main.c
2019-12-03 16:06:31 +08:00
Wang Jia Lin 1ffcb54444 Merge branch 'bugfix/fix_esp32-s2_rtc_io_issue' into 'master'
bugfix(gpio): fix esp32 s2 rtc io issue and gpio testcase issues

See merge request espressif/esp-idf!6832
2019-12-03 11:17:41 +08:00
Renz Christian Bagaporo e6ad330018 ble_mesh_wifi_coexist example: Disable Wi-Fi RX IRAM optimisation
Otherwise IRAM usage is too high in this example.
2019-11-28 09:20:00 +08:00
Fu Zhi Bo 3a468a1ffd Refactor the touch sensor driver 2019-11-27 20:08:44 +08:00
xiongyu af4c455417 bugfix(gpio):fix esp32 s2 rtc io issue
* Modify the function implementation of ESP32-S2 RTC GPIO
  On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register.
  On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers.
* Add ESP32-S2 support of unit test
* Modify the pull-up test of unit test
* Modify the interrupt test of unit test
* Modify input and output mode test of unit test
2019-11-27 17:18:20 +08:00
Angus Gratton 91b7a7beaf Merge branch 'bugfix/timer_intr_status_get' into 'master'
bugfix(timer): fix get intr status function

See merge request espressif/esp-idf!6807
2019-11-27 09:13:16 +08:00
Angus Gratton 64c8b640a1 Merge branch 'feature/log_component_noos' into 'master'
log: make compatible with non-OS builds

See merge request espressif/esp-idf!6787
2019-11-27 08:34:22 +08:00
chenjianqiang bcfe684951 bugfix(timer): add a macro to control making the XTAL related functions 2019-11-26 12:39:46 +00:00
chenjianqiang 856d9f7d89 bugfix(timer): recover get raw interrupt status function 2019-11-26 12:39:46 +00:00
houwenxiang f27ae9b0e2 feature: Add uart hal support. 2019-11-26 20:01:50 +08:00
kooho f0f20e0496 bugfix(i2c): fix esp32-s2 i2c driver UT issue 2019-11-26 12:01:18 +08:00
Angus Gratton f2a1a6105a Merge branch 'feat/mcpwm_hal'
Manual merge of !6626
2019-11-25 17:18:48 +11:00
Angus Gratton 6dd36fd571 Merge branch 'refactor/hal_gpio_driver'
Manual merge of !5597
2019-11-25 10:49:40 +11:00
Angus Gratton f34edba8f3 Merge branch 'feature/adc_driver_hal_support'
Manual merge of !6044
2019-11-25 10:22:06 +11:00
michael 538540ce21 mcpwm: add HAL layer support
Also improved the unit tests a bit.
2019-11-25 00:36:30 +08:00
xiongyu a3b79e9202 refactor(gpio): add hal gpio driver 2019-11-22 17:24:53 +08:00
fuzhibo f49b192a5e refactor the adc driver 2019-11-22 15:42:16 +08:00
Mahavir Jain 25c0752682 i2s: fix regression in retrieval of chip revision causing apll test to fail 2019-11-22 11:46:38 +05:30
Wang Jia Lin a8d3e3ab4a Merge branch 'feature/dac_driver_hal_support' into 'master'
dac: add hal for dac driver

See merge request espressif/esp-idf!5591
2019-11-22 13:59:32 +08:00
fuzhibo 03ac1aaafd dac: refactor driver add hal 2019-11-22 11:44:46 +08:00
Angus Gratton 0e0994092e Merge branch 'feature/esp32s2beta_fix_rtc_peripheral_driver' into 'master'
Driver: fix touch driver and deep sleep example

See merge request espressif/esp-idf!6476
2019-11-22 11:39:41 +08:00
Ivan Grokhotkov 951ed739f7 soc/cpu: add non-xtensa-specific replacement of xthal_get_ccount 2019-11-21 19:22:35 +01:00
houwenxiang 28286183d1 feature(I2C): Add i2c hal support. 2019-11-21 20:34:07 +08:00
fuzhibo 246242dbd5 driver: fix sens_struct.h;
driver: fix timer wakeup dsleep;
example: fix EXT1 wakeup dsleep;
example: fix touch pad wakeup dsleep;
2019-11-21 20:31:34 +08:00
chenjianqiang 857dec108d feat(ledc): refactor ledc driver
1. add hal and low-level layer for ledc driver
2. support esp32s2beta ledc
2019-11-21 16:25:22 +08:00
chenjianqiang 9f9da9ec96 feat(timer): refator timer group driver
1. add hal and low-level layer for timer group
2. add callback functions to handle interrupt
3. add timer deinit function
4. add timer spinlock take function
2019-11-21 14:14:19 +08:00
xiongyu e62b831867 refactor(sigmadelta): add hal sigmadelta driver 2019-11-21 11:53:07 +08:00
fuzhibo 0c2bf7c8bc rtcio: add hal for driver 2019-11-21 10:40:49 +08:00
Angus Gratton b30b0e59fa Merge branch 'feature/add_rmt_hal' into 'master'
rmt: add hal layer and new examples

Closes IDF-841, IDF-844, and IDF-857

See merge request espressif/esp-idf!5649
2019-11-21 09:53:54 +08:00
Angus Gratton 95b9b41258 Merge branch 'bugfix/ethernet_add_reference_counter' into 'master'
ethernet: add reference counter for mac and phy && add gpio config outof Kconfig

Closes IDF-1056

See merge request espressif/esp-idf!6682
2019-11-21 06:58:13 +08:00
Wang Jia Lin f9d5b67b81 Merge branch 'refactor/hal_i2s_driver' into 'master'
refactor(i2s): add hal i2s driver

Closes IDFGH-2097

See merge request espressif/esp-idf!5601
2019-11-20 17:45:21 +08:00
morris 8fd8695ea1 rmt: add HAL layer 2019-11-20 10:54:21 +08:00
suda-morris 05d71319de ethernet: add gpio number into config structure 2019-11-20 10:36:45 +08:00
Anton Maklakov bd49b3f315 Merge branch 'bugfix/soc_missing_tests' into 'master'
soc: fix unit tests not included in the build

See merge request espressif/esp-idf!6723
2019-11-20 00:32:43 +08:00
xiongyu 8c76a3c10d refactor(i2s): add hal i2s driver 2019-11-19 22:19:19 +08:00
Anton Maklakov f04e45b340 soc: remove invalid esp32s2beta tests
Need to update them later, ref: IDF-1169
2019-11-18 16:05:37 +07:00
Anton Maklakov 7b0be33a7a soc: fix unit tests not included in the build
Regression from 9eccd7c082
2019-11-18 15:58:49 +07:00
xiongyu b1a72866ca refactor(pcnt): add hal pcnt driver 2019-11-18 14:35:46 +08:00
KonstantinKondrashov e3ff160733 soc/esp32: Add test_env for 32kHz XTAL unit tests 2019-10-31 13:23:47 +08:00
KonstantinKondrashov f9e0e3557f soc/esp32s2beta: Add test_env for 32kHz XTAL unit tests 2019-10-31 13:23:47 +08:00
Angus Gratton 8675a818f9 Merge branch 'master' into feature/esp32s2beta_merge 2019-10-22 13:51:49 +11:00
Ivan Grokhotkov c7d8ef52ca Merge branch 'fix/esp_flash_no_qe' into 'master'
esp_flash: fix the QE write issue in high freq, and support UT for external chips

Closes IDF-888

See merge request espressif/esp-idf!5736
2019-10-20 13:59:30 +08:00
Angus Gratton ae21d669b9 Merge branch 'master' into feature/esp32s2beta_merge 2019-10-17 18:22:08 +11:00
Darian 820fd6447d can: Add support for lower bit rates
This commit adds support for lower bit rates in the CAN Driver for
ESP32 Rev 2 or later chips.
2019-10-17 12:33:17 +08:00
Angus Gratton f5238d5e42 Merge branch 'feature/esp32s2beta' into feature/esp32s2beta_merge 2019-10-15 15:03:45 +11:00
Angus Gratton 496ede9bcd Merge branch 'master' into feature/esp32s2beta_merge 2019-10-15 14:59:27 +11:00
Michael (XIAO Xufeng) 15d311bb80 esp_flash: rename internal variables for better readability
chip_drv in HAL are renamed as host
2019-10-14 17:25:58 +08:00
Michael (XIAO Xufeng) 571864e8ae esp_flash: fix set qe bit and write command issues
There used to be dummy phase before out phase in common command
transactions. This corrupts the data.

The code before never actually operate (clear) the QE bit, once it finds
the QE bit is set. It's hard to check whether the QE set/disable
functions work well.

This commit:

1. Cancel the dummy phase

2. Set and clear the QE bit according to chip settings, allowing tests
   for QE bits. However for some chips (Winbond for example), it's not
   forced to clear the QE bit if not able to.

3. Also refactor to allow chip_generic and other chips to share the same
   code to read and write qe bit; let common command and read command share
   configure_host_io_mode.

4. Rename read mode to io mode since maybe we will write data with quad
   mode one day.
2019-10-14 17:25:58 +08:00