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ci: solve public headers errors

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This commit is contained in:
Renz Christian Bagaporo 2020-01-27 11:43:08 +08:00
parent b675df4b08
commit 16e0c93e40
49 changed files with 359 additions and 17 deletions
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8
components/esp32s2/include/esp32s2/brownout.h
View file

@ -16,6 +16,14 @@
#ifndef __ESP_BROWNOUT_H
#define __ESP_BROWNOUT_H
#ifdef __cplusplus
extern "C" {
#endif
void esp_brownout_init(void);
#ifdef __cplusplus
}
#endif
#endif

7
components/esp32s2/include/esp32s2/cache_err_int.h
View file

@ -12,6 +12,9 @@
// See the License for the specific language governing permissions and
// limitations under the License.
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief initialize cache invalid access interrupt
@ -31,3 +34,7 @@ void esp_cache_err_int_init(void);
* - (-1) otherwise
*/
int esp_cache_err_get_cpuid(void);
#ifdef __cplusplus
}
#endif

7
components/esp32s2/include/esp32s2/spiram.h
View file

@ -21,6 +21,10 @@
#include <stdbool.h>
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Initialize spiram interface/hardware. Normally called from cpu_start.c.
*
@ -87,5 +91,8 @@ void esp_spiram_writeback_cache(void);
*/
esp_err_t esp_spiram_reserve_dma_pool(size_t size);
#ifdef __cplusplus
}
#endif
#endif

8
components/esp32s2/include/esp_clk.h
View file

@ -14,6 +14,10 @@
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/**
* @file esp_clk.h
*
@ -73,3 +77,7 @@ int esp_clk_apb_freq(void);
* @return Value or RTC counter, expressed in microseconds
*/
uint64_t esp_clk_rtc_time(void);
#ifdef __cplusplus
}
#endif

7
components/esp32s2/include/esp_spiram.h
View file

@ -20,6 +20,10 @@
#include <stdint.h>
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Initialize spiram interface/hardware. Normally called from cpu_start.c.
*
@ -86,5 +90,8 @@ void esp_spiram_writeback_cache(void);
*/
esp_err_t esp_spiram_reserve_dma_pool(size_t size);
#ifdef __cplusplus
}
#endif
#endif

8
components/esp_wifi/esp32s2/include/phy_init_data.h
View file

@ -17,6 +17,10 @@
#include "esp_phy_init.h"
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
// constrain a value between 'low' and 'high', inclusive
#define LIMIT(val, low, high) ((val < low) ? low : (val > high) ? high : val)
@ -144,5 +148,9 @@ static const esp_phy_init_data_t phy_init_data= { {
static const char phy_init_magic_post[] = PHY_INIT_MAGIC;
#ifdef __cplusplus
}
#endif
#endif /* PHY_INIT_DATA_H */

10
components/soc/include/hal/touch_sensor_hal.h
View file

@ -25,6 +25,10 @@
#include "hal/touch_sensor_ll.h"
#include "hal/touch_sensor_types.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef struct {
touch_high_volt_t refh;
touch_low_volt_t refl;
@ -218,4 +222,8 @@ void touch_hal_deinit(void);
/**
* Configure touch sensor for each channel.
*/
void touch_hal_config(touch_pad_t touch_num);
void touch_hal_config(touch_pad_t touch_num);
#ifdef __cplusplus
}
#endif

2
components/soc/soc/esp32/include/soc/brownout_caps.h
View file

@ -18,6 +18,8 @@
extern "C" {
#endif
#include "sdkconfig.h"
#if (CONFIG_ESP32_REV_MIN >= 1)
#define SOC_BROWNOUT_RESET_SUPPORTED 1
#endif

2
components/soc/soc/esp32/include/soc/can_caps.h
View file

@ -18,6 +18,8 @@
extern "C" {
#endif
#include "sdkconfig.h"
#if (CONFIG_ESP32_REV_MIN >= 2)
#define CAN_BRP_DIV_SUPPORTED 1
#define CAN_BRP_DIV_THRESH 128

8
components/soc/soc/esp32/include/soc/cpu.h
View file

@ -21,6 +21,10 @@
#include "xtensa/corebits.h"
#include "xtensa/config/core.h"
#ifdef __cplusplus
extern "C" {
#endif
/* C macros for xtensa special register read/write/exchange */
#define RSR(reg, curval) asm volatile ("rsr %0, " #reg : "=r" (curval));
@ -140,4 +144,8 @@ static inline esp_cpu_ccount_t esp_cpu_get_ccount(void)
return result;
}
#ifdef __cplusplus
}
#endif
#endif

8
components/soc/soc/esp32s2/include/soc/cpu.h
View file

@ -20,6 +20,10 @@
#include <stddef.h>
#include "xtensa/corebits.h"
#ifdef __cplusplus
extern "C" {
#endif
/* C macros for xtensa special register read/write/exchange */
#define RSR(reg, curval) asm volatile ("rsr %0, " #reg : "=r" (curval));
@ -131,4 +135,8 @@ static inline esp_cpu_ccount_t esp_cpu_get_ccount(void)
return result;
}
#ifdef __cplusplus
}
#endif
#endif

2
components/soc/soc/esp32s2/include/soc/periph_defs.h
View file

@ -15,6 +15,8 @@
#ifndef _SOC_PERIPH_DEFS_H_
#define _SOC_PERIPH_DEFS_H_
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif

10
components/soc/soc/include/soc/adc_periph.h
View file

@ -23,6 +23,10 @@
#include "soc/adc_channel.h"
#include "soc/adc_caps.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* Store IO number corresponding to the ADC channel number.
*
@ -30,4 +34,8 @@
* - >=0 : GPIO number index.
* - -1 : Not support.
*/
extern const int adc_channel_io_map[SOC_ADC_PERIPH_NUM][SOC_ADC_MAX_CHANNEL_NUM];
extern const int adc_channel_io_map[SOC_ADC_PERIPH_NUM][SOC_ADC_MAX_CHANNEL_NUM];
#ifdef __cplusplus
}
#endif

8
components/soc/soc/include/soc/can_periph.h
View file

@ -16,7 +16,15 @@
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
#if CONFIG_IDF_TARGET_ESP32
#include "soc/can_struct.h"
#include "soc/can_caps.h"
#endif
#ifdef __cplusplus
}
#endif

2
components/soc/soc/include/soc/emac_periph.h
View file

@ -13,5 +13,3 @@
// limitations under the License.
#pragma once
#include "soc/emac_reg_v2.h"
#include "soc/emac_ex_reg.h"

8
components/soc/soc/include/soc/i2c_periph.h
View file

@ -18,6 +18,10 @@
#include "soc/i2c_caps.h"
#include "soc/periph_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef struct {
const uint8_t sda_out_sig;
const uint8_t sda_in_sig;
@ -28,3 +32,7 @@ typedef struct {
} i2c_signal_conn_t;
extern const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM];
#ifdef __cplusplus
}
#endif

8
components/soc/soc/include/soc/ledc_periph.h
View file

@ -17,6 +17,10 @@
#include "soc/ledc_struct.h"
#include "soc/ledc_caps.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
Stores a bunch of per-ledc-peripheral data.
*/
@ -29,3 +33,7 @@ extern const ledc_signal_conn_t ledc_periph_signal[2];
#else
extern const ledc_signal_conn_t ledc_periph_signal[1];
#endif
#ifdef __cplusplus
}
#endif

10
components/soc/soc/include/soc/touch_sensor_periph.h
View file

@ -22,4 +22,12 @@
#include "soc/sens_struct.h"
#include "soc/rtc_io_struct.h"
extern const int touch_sensor_channel_io_map[SOC_TOUCH_SENSOR_NUM];
#ifdef __cplusplus
extern "C" {
#endif
extern const int touch_sensor_channel_io_map[SOC_TOUCH_SENSOR_NUM];
#ifdef __cplusplus
}
#endif

9
components/soc/soc/include/soc/uart_periph.h
View file

@ -19,6 +19,10 @@
#include "soc/periph_defs.h"
#include "soc/gpio_sig_map.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef struct {
const uint8_t tx_sig;
const uint8_t rx_sig;
@ -29,3 +33,8 @@ typedef struct {
} uart_signal_conn_t;
extern const uart_signal_conn_t uart_periph_signal[SOC_UART_NUM];
#ifdef __cplusplus
}
#endif

9
components/soc/src/esp32/i2c_rtc_clk.h
View file

@ -17,6 +17,10 @@
#include "i2c_apll.h"
#include "i2c_bbpll.h"
#ifdef __cplusplus
extern "C" {
#endif
/* Analog function control register */
#define ANA_CONFIG_REG 0x6000E044
#define ANA_CONFIG_S (8)
@ -46,3 +50,8 @@ void rom_i2c_writeReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint
#define I2C_READREG_RTC(block, reg_add) \
rom_i2c_readReg(block, block##_HOSTID, reg_add)
#ifdef __cplusplus
}
#endif

8
components/soc/src/esp32/include/hal/adc_ll.h
View file

@ -4,6 +4,10 @@
#include "hal/adc_types.h"
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
ADC_DIG_FORMAT_12BIT, /*!< ADC to I2S data format, [15:12]-channel [11:0]-12 bits ADC data.
Note: In single convert mode. */
@ -620,3 +624,7 @@ static inline bool adc_ll_vref_output(int io)
SENS.sar_meas_start2.sar2_en_pad = 1 << channel;
return true;
}
#ifdef __cplusplus
}
#endif

11
components/soc/src/esp32/include/hal/dac_ll.h
View file

@ -24,6 +24,10 @@
#include "soc/dac_periph.h"
#include "hal/dac_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* Power on dac module and start output voltage.
*
@ -182,4 +186,9 @@ static inline void dac_ll_dma_enable(void)
static inline void dac_ll_dma_disable(void)
{
SENS.sar_dac_ctrl1.dac_dig_force = 0;
}
}
#ifdef __cplusplus
}
#endif

11
components/soc/src/esp32/include/hal/i2c_ll.h
View file

@ -18,6 +18,10 @@
#include "soc/i2c_periph.h"
#include "hal/i2c_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief I2C hardware cmd register filed.
*/
@ -848,4 +852,9 @@ static inline void i2c_ll_slave_init(i2c_dev_t *hw)
ctrl_reg.scl_force_out = 1;
hw->ctr.val = ctrl_reg.val;
hw->fifo_conf.fifo_addr_cfg_en = 0;
}
}
#ifdef __cplusplus
}
#endif

8
components/soc/src/esp32/include/hal/ledc_ll.h
View file

@ -22,6 +22,10 @@
#define LEDC_LL_GET_HW() &LEDC
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Set LEDC low speed timer clock
*
@ -456,3 +460,7 @@ static inline void ledc_ll_bind_channel_timer(ledc_dev_t *hw, ledc_mode_t speed_
static inline void ledc_ll_get_channel_timer(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, ledc_timer_t *timer_sel){
*timer_sel = hw->channel_group[speed_mode].channel[channel_num].conf0.timer_sel;
}
#ifdef __cplusplus
}
#endif

8
components/soc/src/esp32/include/hal/mcpwm_ll.h
View file

@ -30,6 +30,10 @@
#include "esp_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/// Get the address of peripheral registers
#define MCPWM_LL_GET_HW(ID) (((ID)==0)? &MCPWM0: &MCPWM1)
@ -725,3 +729,7 @@ static inline mcpwm_intr_t mcpwm_ll_get_cap_intr_def(int bit)
{
return BIT(bit+MCPWM_CAP0_INT_RAW_S);
}
#ifdef __cplusplus
}
#endif

10
components/soc/src/esp32/include/hal/rtc_io_ll.h
View file

@ -25,6 +25,10 @@
#include "hal/rtc_io_types.h"
#include "hal/gpio_types.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
RTCIO_FUNC_RTC = 0x0, /*!< The pin controled by RTC module. */
RTCIO_FUNC_DIGITAL = 0x1, /*!< The pin controlled by DIGITAL module. */
@ -346,4 +350,8 @@ static inline void rtcio_ll_enable_sleep_setting(gpio_num_t gpio_num)
static inline void rtcio_ll_disable_sleep_setting(gpio_num_t gpio_num)
{
CLEAR_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpsel);
}
}
#ifdef __cplusplus
}
#endif

7
components/soc/src/esp32/include/hal/spi_flash_ll.h
View file

@ -30,6 +30,9 @@
#include <stdbool.h>
#include <string.h>
#ifdef __cplusplus
extern "C" {
#endif
//Supported clock register values
#define SPI_FLASH_LL_CLKREG_VAL_5MHZ ((spi_flash_ll_clock_reg_t){.val=0x0000F1CF}) ///< Clock set to 5 MHz
@ -375,3 +378,7 @@ static inline void spi_flash_ll_set_dummy(spi_dev_t *dev, uint32_t dummy_n)
dev->user.usr_dummy = dummy_n ? 1 : 0;
dev->user1.usr_dummy_cyclelen = dummy_n - 1;
}
#ifdef __cplusplus
}
#endif

8
components/soc/src/esp32/include/hal/spi_ll.h
View file

@ -29,6 +29,10 @@
#include <esp_types.h>
#include <stdlib.h> //for abs()
#ifdef __cplusplus
extern "C" {
#endif
/// Registers to reset during initialization. Don't use in app.
#define SPI_LL_RST_MASK (SPI_OUT_RST | SPI_IN_RST | SPI_AHBM_RST | SPI_AHBM_FIFO_RST)
/// Interrupt not used. Don't use in app.
@ -874,3 +878,7 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
#undef SPI_LL_RST_MASK
#undef SPI_LL_UNUSED_INT_MASK
#ifdef __cplusplus
}
#endif

10
components/soc/src/esp32/include/hal/touch_sensor_hal.h
View file

@ -27,6 +27,10 @@
#include_next "hal/touch_sensor_hal.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* Set touch sensor measurement time.
*
@ -119,4 +123,8 @@
*
* @param pad_num pointer to touch pad which caused wakeup.
*/
void touch_hal_get_wakeup_status(touch_pad_t *pad_num);
void touch_hal_get_wakeup_status(touch_pad_t *pad_num);
#ifdef __cplusplus
}
#endif

9
components/soc/src/esp32/include/hal/touch_sensor_ll.h
View file

@ -27,6 +27,11 @@
#include "soc/touch_sensor_periph.h"
#include "hal/touch_sensor_types.h"
#ifdef __cplusplus
extern "C" {
#endif
//Some register bits of touch sensor 8 and 9 are mismatched, we need to swap the bits.
#define TOUCH_LL_BIT_SWAP(data, n, m) (((data >> n) & 0x1) == ((data >> m) & 0x1) ? (data) : ((data) ^ ((0x1 <<n) | (0x1 << m))))
#define TOUCH_LL_BITS_SWAP(v) TOUCH_LL_BIT_SWAP(v, TOUCH_PAD_NUM8, TOUCH_PAD_NUM9)
@ -488,3 +493,7 @@ static inline bool touch_ll_meas_is_done(void)
{
return (bool)SENS.sar_touch_ctrl2.touch_meas_done;
}
#ifdef __cplusplus
}
#endif

8
components/soc/src/esp32/include/hal/uart_ll.h
View file

@ -20,6 +20,10 @@
#include "hal/uart_types.h"
#include "soc/uart_periph.h"
#ifdef __cplusplus
extern "C" {
#endif
// The default fifo depth
#define UART_LL_FIFO_DEF_LEN (UART_FIFO_LEN)
// Get UART hardware instance with giving uart num
@ -803,3 +807,7 @@ static inline void uart_ll_inverse_signal(uart_dev_t *hw, uint32_t inv_mask)
}
#undef UART_LL_TOUT_REF_FACTOR_DEFAULT
#ifdef __cplusplus
}
#endif

7
components/soc/src/esp32/rtc_clk_common.h
View file

@ -16,6 +16,10 @@
#define MHZ (1000000)
#ifdef __cplusplus
extern "C" {
#endif
void rtc_clk_cpu_freq_to_xtal(int freq, int div);
/* Values of RTC_XTAL_FREQ_REG and RTC_APB_FREQ_REG are stored as two copies in
@ -36,3 +40,6 @@ static inline uint32_t clk_val_to_reg_val(uint32_t val) {
return (val & UINT16_MAX) | ((val & UINT16_MAX) << 16);
}
#ifdef __cplusplus
}
#endif

8
components/soc/src/esp32s2/i2c_rtc_clk.h
View file

@ -17,6 +17,10 @@
#include "i2c_apll.h"
#include "i2c_bbpll.h"
#ifdef __cplusplus
extern "C" {
#endif
/* Analog function control register */
#define ANA_CONFIG_REG 0x6000E044
#define ANA_CONFIG_S (8)
@ -46,3 +50,7 @@ void rom_i2c_writeReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint
#define I2C_READREG_RTC(block, reg_add) \
rom_i2c_readReg(block, block##_HOSTID, reg_add)
#ifdef __cplusplus
}
#endif

9
components/soc/src/esp32s2/include/hal/adc_ll.h
View file

@ -5,6 +5,10 @@
#include "soc/apb_ctrl_struct.h"
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
ADC_DIG_FORMAT_12BIT, /*!< ADC to I2S data format, [15:12]-channel [11:0]-12 bits ADC data.
Note: In single convert mode. */
@ -588,3 +592,8 @@ static inline bool adc_ll_vref_output(int io)
{
return false;
}
#ifdef __cplusplus
}
#endif

10
components/soc/src/esp32s2/include/hal/dac_ll.h
View file

@ -24,6 +24,10 @@
#include "soc/dac_periph.h"
#include "hal/dac_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* Power on dac module and start output voltage.
*
@ -182,4 +186,8 @@ static inline void dac_ll_dma_enable(void)
static inline void dac_ll_dma_disable(void)
{
SENS.sar_dac_ctrl1.dac_dig_force = 0;
}
}
#ifdef __cplusplus
}
#endif

6
components/soc/src/esp32s2/include/hal/gpspi_flash_ll.h
View file

@ -30,6 +30,9 @@
#include <stdbool.h>
#include <string.h>
#ifdef __cplusplus
extern "C" {
#endif
#define gpspi_flash_ll_get_hw(host_id) (((host_id)==SPI2_HOST ? &GPSPI2 \
: ((host_id)==SPI3_HOST ? &GPSPI3 \
@ -352,3 +355,6 @@ static inline void gpspi_flash_ll_set_dummy_out(spi_dev_t *dev, uint32_t out_en,
dev->ctrl.d_pol = out_lev;
}
#ifdef __cplusplus
}
#endif

8
components/soc/src/esp32s2/include/hal/i2c_ll.h
View file

@ -18,6 +18,10 @@
#include "soc/i2c_periph.h"
#include "hal/i2c_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief I2C hardware cmd register filed.
*/
@ -864,3 +868,7 @@ static inline void i2c_ll_slave_init(i2c_dev_t *hw)
hw->ctr.val = ctrl_reg.val;
hw->fifo_conf.fifo_addr_cfg_en = 0;
}
#ifdef __cplusplus
}
#endif

8
components/soc/src/esp32s2/include/hal/ledc_ll.h
View file

@ -20,6 +20,10 @@
#include "hal/ledc_types.h"
#include "soc/ledc_periph.h"
#ifdef __cplusplus
extern "C" {
#endif
#define LEDC_LL_GET_HW() &LEDC
/**
@ -477,3 +481,7 @@ static inline void ledc_ll_bind_channel_timer(ledc_dev_t *hw, ledc_mode_t speed_
static inline void ledc_ll_get_channel_timer(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, ledc_timer_t *timer_sel){
*timer_sel = hw->channel_group[speed_mode].channel[channel_num].conf0.timer_sel;
}
#ifdef __cplusplus
}
#endif

10
components/soc/src/esp32s2/include/hal/rtc_io_ll.h
View file

@ -25,6 +25,10 @@
#include "hal/rtc_io_types.h"
#include "hal/gpio_types.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
RTCIO_FUNC_RTC = 0x0, /*!< The pin controled by RTC module. */
RTCIO_FUNC_DIGITAL = 0x1, /*!< The pin controlled by DIGITAL module. */
@ -346,4 +350,8 @@ static inline void rtcio_ll_enable_sleep_setting(gpio_num_t gpio_num)
static inline void rtcio_ll_disable_sleep_setting(gpio_num_t gpio_num)
{
CLEAR_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpsel);
}
}
#ifdef __cplusplus
}
#endif

8
components/soc/src/esp32s2/include/hal/spi_flash_ll.h
View file

@ -25,6 +25,10 @@
#include "gpspi_flash_ll.h"
#include "spimem_flash_ll.h"
#ifdef __cplusplus
extern "C" {
#endif
// For esp32s2, spimem is equivalent to traditional spi peripherals found
// in esp32. Let the spi flash clock reg definitions reflect this.
#define SPI_FLASH_LL_CLKREG_VAL_5MHZ {.spimem=SPIMEM_FLASH_LL_CLKREG_VAL_5MHZ}
@ -89,3 +93,7 @@ typedef union {
#define spi_flash_ll_set_dummy(dev, dummy) spimem_flash_ll_set_dummy((spi_mem_dev_t*)dev, dummy)
#define spi_flash_ll_set_dummy_out(dev, en, lev) spimem_flash_ll_set_dummy_out((spi_mem_dev_t*)dev, en, lev)
#endif
#ifdef __cplusplus
}
#endif

8
components/soc/src/esp32s2/include/hal/spi_ll.h
View file

@ -29,6 +29,10 @@
#include "soc/spi_periph.h"
#include "esp32s2/rom/lldesc.h"
#ifdef __cplusplus
extern "C" {
#endif
/// Registers to reset during initialization. Don't use in app.
#define SPI_LL_RST_MASK (SPI_OUT_RST | SPI_IN_RST | SPI_AHBM_RST | SPI_AHBM_FIFO_RST)
/// Interrupt not used. Don't use in app.
@ -858,3 +862,7 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
#undef SPI_LL_RST_MASK
#undef SPI_LL_UNUSED_INT_MASK
#ifdef __cplusplus
}
#endif

8
components/soc/src/esp32s2/include/hal/spimem_flash_ll.h
View file

@ -31,6 +31,10 @@
#include "hal/spi_types.h"
#include "hal/spi_flash_types.h"
#ifdef __cplusplus
extern "C" {
#endif
#define spimem_flash_ll_get_hw(host_id) (((host_id)==SPI1_HOST ? &SPIMEM1 : NULL ))
typedef typeof(SPIMEM1.clock) spimem_flash_ll_clock_reg_t;
@ -377,3 +381,7 @@ static inline void spimem_flash_ll_set_dummy_out(spi_mem_dev_t *dev, uint32_t ou
dev->ctrl.q_pol = out_lev;
dev->ctrl.d_pol = out_lev;
}
#ifdef __cplusplus
}
#endif

8
components/soc/src/esp32s2/include/hal/touch_sensor_hal.h
View file

@ -27,6 +27,10 @@
#include_next "hal/touch_sensor_hal.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* Reset the whole of touch module.
*
@ -572,3 +576,7 @@ void touch_hal_sleep_channel_config(const touch_pad_sleep_channel_t *slp_config)
* @param pad_num pointer to touch pad which caused wakeup.
*/
#define touch_hal_get_wakeup_status(pad_num) touch_ll_get_wakeup_status(pad_num)
#ifdef __cplusplus
}
#endif

11
components/soc/src/esp32s2/include/hal/touch_sensor_ll.h
View file

@ -27,6 +27,11 @@
#include "soc/touch_sensor_periph.h"
#include "hal/touch_sensor_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* Set touch sensor touch sensor times of charge and discharge.
*
@ -1070,4 +1075,8 @@ static inline void touch_ll_sleep_read_proximity_cnt(uint32_t *approach_cnt)
static inline void touch_ll_get_wakeup_status(touch_pad_t *pad_num)
{
*pad_num = (touch_pad_t)RTCCNTL.touch_slp_thres.touch_slp_pad;
}
}
#ifdef __cplusplus
}
#endif

8
components/soc/src/esp32s2/include/hal/uart_ll.h
View file

@ -20,6 +20,10 @@
#include "hal/uart_types.h"
#include "soc/uart_periph.h"
#ifdef __cplusplus
extern "C" {
#endif
// The default fifo depth
#define UART_LL_FIFO_DEF_LEN (UART_FIFO_LEN)
// Get UART hardware instance with giving uart num
@ -767,3 +771,7 @@ static inline void uart_ll_inverse_signal(uart_dev_t *hw, uint32_t inv_mask)
conf0_reg.dtr_inv |= (inv_mask & UART_SIGNAL_DTR_INV) ? 1 : 0;
hw->conf0.val = conf0_reg.val;
}
#ifdef __cplusplus
}
#endif

7
components/xtensa/esp32s2/include/xtensa/config/core.h
View file

@ -64,6 +64,10 @@
#endif
#endif /*_ASMLANGUAGE or __ASSEMBLER__*/
#ifdef __cplusplus
extern "C" {
#endif
/*----------------------------------------------------------------------
GENERAL
@ -1403,6 +1407,9 @@ extern const unsigned int XCJOIN(Xthal_cp_mask_,XCHAL_CP7_IDENT);
# define XCHAL_HW_RELEASE_MAJOR_AT(major) XCHAL_HW_RELEASE_AT(major,0)
#endif
#ifdef __cplusplus
}
#endif
#endif /*XTENSA_CONFIG_CORE_H*/

3
components/xtensa/esp32s2/include/xtensa/config/defs.h
View file

@ -30,8 +30,5 @@
#ifdef __XTENSA__
#include <xtensa/tie/xt_core.h>
#include <xtensa/tie/xt_misc.h>
#endif /* __XTENSA__ */
#endif /* !_XTENSA_BASE_HEADER */

8
components/xtensa/esp32s2/include/xtensa/config/tie-asm.h
View file

@ -32,6 +32,10 @@
#ifndef _XTENSA_CORE_TIE_ASM_H
#define _XTENSA_CORE_TIE_ASM_H
#ifdef __cplusplus
extern "C" {
#endif
/* Selection parameter values for save-area save/restore macros: */
/* Option vs. TIE: */
#define XTHAL_SAS_TIE 0x0001 /* custom extension or coprocessor */
@ -126,5 +130,9 @@
#define XCHAL_SA_NUM_ATMPS 1
#ifdef __cplusplus
}
#endif
#endif /*_XTENSA_CORE_TIE_ASM_H*/

2
tools/ci/check_public_headers_exceptions.txt
View file

@ -12,8 +12,6 @@ components/freertos/xtensa/include/freertos/*
components/log/include/esp_log_internal.h
components/soc/esp32/include/hal/*
components/soc/esp32/include/soc/*
components/soc/include/hal/*
components/soc/include/soc/*