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soc: add USB peripheral register definitions, hal level, reg map, etc

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This commit is contained in:
Andrei Gramakov 2020-01-27 13:21:43 +01:00 committed by bot
parent 59c39173f2
commit 4e8b4b9e49
14 changed files with 14526 additions and 1 deletions
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1
components/esp32s2/ld/esp32s2.peripherals.ld
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@ -26,4 +26,5 @@ PROVIDE ( SYSCON = 0x3f426000 );
PROVIDE ( I2C1 = 0x3f427000 );
PROVIDE ( CAN = 0x3f42B000 );
PROVIDE ( APB_SARADC = 0x3f440000 );
PROVIDE ( USB0 = 0x60080000 );
PROVIDE ( ToBeCleanedUpBelow = 0x00000000 );

3
components/soc/CMakeLists.txt
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@ -46,7 +46,8 @@ if(IDF_TARGET STREQUAL "esp32")
endif()
if(IDF_TARGET STREQUAL "esp32s2")
list(APPEND srcs "src/hal/spi_flash_hal_gpspi.c")
list(APPEND srcs "src/hal/spi_flash_hal_gpspi.c"
"esp32s2/hal/usb_hal.c")
endif()
idf_component_register(SRCS "${srcs}"

22
components/soc/esp32s2/hal/usb_hal.c Normal file
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@ -0,0 +1,22 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "hal/usb_ll.h"
#include "hal/usb_hal.h"
void usb_hal_init(usb_hal_context_t *usb)
{
usb_ll_init(usb->use_external_phy);
}

60
components/soc/esp32s2/include/hal/usb_ll.h Normal file
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@ -0,0 +1,60 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "soc/soc.h"
#include "soc/system_reg.h"
#include "esp32s2/rom/gpio.h"
#include "soc/gpio_sig_map.h"
#include "soc/usb_periph.h"
void gpio_pad_input_enable(uint32_t pin);
static inline void usb_ll_init(bool external_phy)
{
REG_SET_BIT(DPORT_PERIP_CLK_EN0_REG, DPORT_USB_CLK_EN);
REG_CLR_BIT(DPORT_PERIP_RST_EN0_REG, DPORT_USB_RST);
if (external_phy) {
REG_SET_BIT(DR_REG_USB_WRAP_BASE, BIT(18)); //set usb_pad_enable
REG_SET_BIT(DR_REG_USB_WRAP_BASE, BIT(2)); // set reg_phy_sel (external phy)
gpio_output_set_high(0x10, 0, 0x1E, 0xE);
} else {
REG_SET_BIT(DR_REG_USB_WRAP_BASE, BIT(18)); //set usb_pad_enable
REG_CLR_BIT(DR_REG_USB_WRAP_BASE, BIT(2)); // clear reg_phy_sel (internal phy)
//drive strength needs to be 3 for full speed
REG_SET_FIELD(GPIO_PIN19_REG, GPIO_PIN19_PAD_DRIVER, 3);
REG_SET_FIELD(GPIO_PIN20_REG, GPIO_PIN20_PAD_DRIVER, 3);
}
int i = 0;
while (usb_periph_iopins[i].pin != -1) {
if ((external_phy) || (usb_periph_iopins[i].ext_phy_only == 0)) {
gpio_pad_select_gpio(usb_periph_iopins[i].pin);
if (usb_periph_iopins[i].is_output) {
gpio_matrix_out(usb_periph_iopins[i].pin, usb_periph_iopins[i].func, false, false);
} else {
gpio_matrix_in(usb_periph_iopins[i].pin, usb_periph_iopins[i].func, false);
gpio_pad_input_enable(usb_periph_iopins[i].pin);
}
gpio_pad_unhold(usb_periph_iopins[i].pin);
}
i++;
}
REG_SET_BIT(DR_REG_USB_WRAP_BASE, BIT(12)); //pull override
REG_SET_BIT(DR_REG_USB_WRAP_BASE, BIT(13)); //dp pullup
REG_CLR_BIT(DR_REG_USB_WRAP_BASE, BIT(14)); //dp pulldwn
REG_CLR_BIT(DR_REG_USB_WRAP_BASE, BIT(15)); //dm pullup
REG_CLR_BIT(DR_REG_USB_WRAP_BASE, BIT(16)); //dm pulldown
}

1
components/soc/esp32s2/include/soc/soc.h
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@ -81,6 +81,7 @@
#define DR_REG_SPI4_BASE 0x3f437000
#define DR_REG_USB_WRAP_BASE 0x3f439000
#define DR_REG_APB_SARADC_BASE 0x3f440000
#define DR_REG_USB_BASE 0x60080000
#define REG_UHCI_BASE(i) (DR_REG_UHCI0_BASE)
#define REG_UART_BASE( i ) (DR_REG_UART_BASE + (i) * 0x10000 )

17
components/soc/esp32s2/include/soc/usb_caps.h Normal file
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@ -0,0 +1,17 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#define SOC_USB_PERIPH_NUM 1

22
components/soc/esp32s2/include/soc/usb_pins.h Normal file
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@ -0,0 +1,22 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#define USBPHY_VP_NUM 33
#define USBPHY_VM_NUM 34
#define USBPHY_RCV_NUM 35
#define USBPHY_OEN_NUM 36
#define USBPHY_VPO_NUM 37
#define USBPHY_VMO_NUM 38

10459
components/soc/esp32s2/include/soc/usb_reg.h Normal file
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3689
components/soc/esp32s2/include/soc/usb_struct.h Normal file
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154
components/soc/esp32s2/include/soc/usb_types.h Normal file
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@ -0,0 +1,154 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdint.h>
/* USB IN EP index */
typedef enum {
USB_IN_EP_0 = 0,
USB_IN_EP_1,
USB_IN_EP_2,
USB_IN_EP_3,
USB_IN_EP_4,
USB_IN_EP_5,
USB_IN_EP_6,
USB_IN_EP_NUM
} usb_in_ep_idx_t;
/* USB OUT EP index */
typedef enum {
USB_OUT_EP_0 = 0,
USB_OUT_EP_1,
USB_OUT_EP_2,
USB_OUT_EP_3,
USB_OUT_EP_4,
USB_OUT_EP_5,
USB_OUT_EP_6,
USB_OUT_EP_NUM
} usb_out_ep_idx_t;
/* USB IN EP Register block type */
typedef struct usb_in_ep_reg {
volatile uint32_t diepctl;
uint32_t reserved;
volatile uint32_t diepint;
uint32_t reserved1;
volatile uint32_t dieptsiz;
volatile uint32_t diepdma;
volatile uint32_t dtxfsts;
uint32_t reserved2;
} usb_in_endpoint_t;
/* USB OUT EP Register block type */
typedef struct usb_out_ep_reg {
volatile uint32_t doepctl;
uint32_t reserved;
volatile uint32_t doepint;
uint32_t reserved1;
volatile uint32_t doeptsiz;
volatile uint32_t doepdma;
uint32_t reserved2;
uint32_t reserved3;
} usb_out_endpoint_t;
typedef struct usb_reg {
volatile uint32_t gotgctl; /*!< 0x0 */
volatile uint32_t gotgint;
volatile uint32_t gahbcfg;
volatile uint32_t gusbcfg;
volatile uint32_t grstctl; /*!< 0x10 */
volatile uint32_t gintsts;
volatile uint32_t gintmsk;
volatile uint32_t grxstsr;
volatile uint32_t grxstsp; /*!< 0x20 */
volatile uint32_t grxfsiz;
volatile uint32_t gnptxfsiz;
volatile uint32_t gnptxsts;
volatile uint32_t gi2cctl;
volatile uint32_t gpvndctl; /*!< 0x30 */
volatile uint32_t ggpio;
volatile uint32_t guid;
volatile uint32_t gsnpsid;
volatile uint32_t ghwcfg1; /*!< 0x40 */
volatile uint32_t ghwcfg2;
volatile uint32_t ghwcfg3;
volatile uint32_t ghwcfg4; /*!< 0x50 */
volatile uint32_t glpmcfg; /*!< 0x54 */
volatile uint32_t gpwrdn; /*!< 0x58 */
volatile uint32_t gdfifocfg; /*!< 0x5c */
volatile uint32_t gadpctl; /*!< 0x60 */
uint32_t reserved1[39];
volatile uint32_t hptxfsiz; /*!< 0x100 */
volatile uint32_t dieptxf[15]; /*!< 0x104 */
uint32_t reserved2[176]; /*!< 0x140 */
/**
* The Host Global Registers structure defines the size and relative
* field offsets for the Host Mode Global Registers. Host Global
* Registers offsets 400h-7FFh.
*/
volatile uint32_t hcfg; /*!< Host Configuration Register. <i>Offset: 400h</i> */
volatile uint32_t hfir; /*!< Host Frame Interval Register. <i>Offset: 404h</i> */
volatile uint32_t hfnum; /*!< Host Frame Number / Frame Remaining Register. <i>Offset: 408h</i> */
uint32_t reserved40C; /*!< Reserved. <i>Offset: 40Ch</i> */
volatile uint32_t hptxsts; /*!< Host Periodic Transmit FIFO/ Queue Status Register. <i>Offset: 410h</i> */
volatile uint32_t haint; /*!< Host All Channels Interrupt Register. <i>Offset: 414h</i> */
volatile uint32_t haintmsk; /*!< Host All Channels Interrupt Mask Register. <i>Offset: 418h</i> */
volatile uint32_t hflbaddr; /*!< Host Frame List Base Address Register . <i>Offset: 41Ch</i> */
uint32_t reserved0x420[7];
volatile uint32_t hprt; //0x440
uint32_t reserved0x444[240];
volatile uint32_t dcfg; /*!< Device Configuration Register. <i>Offset 800h</i> */
volatile uint32_t dctl; /*!< Device Control Register. <i>Offset: 804h</i> */
volatile uint32_t dsts; /*!< Device Status Register (Read Only). <i>Offset: 808h</i> */
uint32_t reserved0x80c; /*!< Reserved. <i>Offset: 80Ch</i> */
volatile uint32_t diepmsk; /*!< Device IN Endpoint Common Interrupt Mask Register. <i>Offset: 810h</i> */
volatile uint32_t doepmsk; /*!< Device OUT Endpoint Common Interrupt Mask Register. <i>Offset: 814h</i> */
volatile uint32_t daint; /*!< Device All Endpoints Interrupt Register. <i>Offset: 818h</i> */
volatile uint32_t daintmsk; /*!< Device All Endpoints Interrupt Mask Register. <i>Offset: 81Ch</i> */
volatile uint32_t dtknqr1; /*!< Device IN Token Queue Read Register-1 (Read Only). <i>Offset: 820h</i> */
volatile uint32_t dtknqr2; /*!< Device IN Token Queue Read Register-2 (Read Only). <i>Offset: 824h</i> */
volatile uint32_t dvbusdis; /*!< Device VBUS discharge Register. <i>Offset: 828h</i> */
volatile uint32_t dvbuspulse; /*!< Device VBUS Pulse Register. <i>Offset: 82Ch</i> */
volatile uint32_t dtknqr3_dthrctl; /*!< Device IN Token Queue Read Register-3 (Read Only). Device Thresholding control register (Read/Write) <i>Offset: 830h</i> */
volatile uint32_t dtknqr4_fifoemptymsk; /*!< Device IN Token Queue Read Register-4 (Read Only). Device IN EPs empty Inr. Mask Register (Read/Write)<i>Offset: 834h</i> */
volatile uint32_t deachint; /*!< Device Each Endpoint Interrupt Register (Read Only). <i>Offset: 838h</i> */
volatile uint32_t deachintmsk; /*!< Device Each Endpoint Interrupt mask Register (Read/Write). <i>Offset: 83Ch</i> */
volatile uint32_t diepeachintmsk[16]; /*!< Device Each In Endpoint Interrupt mask Register (Read/Write). <i>Offset: 840h</i> */
volatile uint32_t doepeachintmsk[16]; /*!< Device Each Out Endpoint Interrupt mask Register (Read/Write). <i>Offset: 880h</i> */
uint32_t reserved0x8c0[16];
/* Input Endpoints*/
usb_in_endpoint_t in_ep_reg[USB_IN_EP_NUM]; /*!< 0x900*/
uint32_t reserved6[72];
/* Output Endpoints */
usb_out_endpoint_t out_ep_reg[USB_OUT_EP_NUM];
uint32_t reserved7[136];
uint32_t pcgctrl; /*!<0xe00*/
uint32_t pcgctrl1;
uint8_t reserved8[0x1000 - 0xe08]; /*!<0xd00*/
uint32_t fifo[16][0x400]; /*!<0x1000*/
uint8_t reserved0x11000[0x20000 - 0x11000];
uint32_t dbg_fifo[0x20000]; /*!< 0x20000*/
} usb_dev_t;
extern usb_dev_t USB0;
#ifdef __cplusplus
}
#endif

1
components/soc/esp32s2/sources.cmake
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@ -18,6 +18,7 @@ set(SOC_SRCS "adc_periph.c"
"i2s_periph.c"
"i2c_periph.c"
"uart_periph.c"
"usb_periph.c"
"touch_sensor_hal.c"
"touch_sensor_periph.c")

33
components/soc/esp32s2/usb_periph.c Normal file
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@ -0,0 +1,33 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "esp32s2/rom/gpio.h"
#include "soc/usb_periph.h"
const usb_iopin_dsc_t usb_periph_iopins[] = {
{USBPHY_VP_NUM, USB_EXTPHY_VP_IDX, 0, 1},
{USBPHY_VM_NUM, USB_EXTPHY_VM_IDX, 0, 1},
{USBPHY_RCV_NUM, USB_EXTPHY_RCV_IDX, 0, 1},
{USBPHY_OEN_NUM, USB_EXTPHY_OEN_IDX, 1, 1},
{USBPHY_VPO_NUM, USB_EXTPHY_VPO_IDX, 1, 1},
{USBPHY_VMO_NUM, USB_EXTPHY_VMO_IDX, 1, 1},
{GPIO_FUNC_IN_HIGH, USB_OTG_IDDIG_IN_IDX, 0, 0}, //connected connector is mini-B
// {GPIO_FUNC_IN_LOW, USB_OTG_IDDIG_IN_IDX, 0, 0},
//connected connector is mini-B
{GPIO_FUNC_IN_HIGH, USB_SRP_BVALID_IN_IDX, 0, 0}, //HIGH to force USB device mode
{GPIO_FUNC_IN_HIGH, USB_OTG_VBUSVALID_IN_IDX, 0, 0}, //receiving a valid Vbus from host
{GPIO_FUNC_IN_LOW, USB_OTG_AVALID_IN_IDX, 0, 0},
{-1, -1, 0, 0}
};

31
components/soc/include/hal/usb_hal.h Normal file
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@ -0,0 +1,31 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
typedef struct {
bool use_external_phy;
} usb_hal_context_t;
void usb_hal_init(usb_hal_context_t *usb);
#ifdef __cplusplus
}
#endif

34
components/soc/include/soc/usb_periph.h Normal file
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@ -0,0 +1,34 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "soc/usb_pins.h"
#include "soc/gpio_sig_map.h"
#include "soc/usb_reg.h"
#include "soc/usb_types.h"
/**
* @brief A pin decriptor for init
*/
typedef struct {
const int pin;
const int func;
const bool is_output;
const int ext_phy_only;
} usb_iopin_dsc_t;
extern const usb_iopin_dsc_t usb_periph_iopins[];