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590 commits

Author SHA1 Message Date
Ivan Grokhotkov
7f18576e23 Merge branch 'bugfix/inline_get_cpu_id_hal_func' into 'master' 
soc: put hal function to get core id in IRAM

See merge request espressif/esp-idf!8107
 2020-03-26 18:14:51 +08:00
morris
0c6e1b9482 remove dependency of timer_group_caps.h on soc.h 2020-03-26 17:15:19 +08:00
Angus Gratton
928fc0016c Merge branch 'bugfix/doc_soc_caps_file_path' into 'master' 
doc: correct soc caps file path

See merge request espressif/esp-idf!8097
 2020-03-26 10:32:12 +08:00
Michael (XIAO Xufeng)
826cc7ecb6 Merge branch 'feature/bringup_723_cmake_rmt_driver_update' into 'master' 
RMT new features in ESP32S2

Closes IDF-1286

See merge request espressif/esp-idf!7401
 2020-03-26 10:24:18 +08:00
Michael (XIAO Xufeng)
661f4c430d Merge branch 'feature/esp32s2_i2c_driver' into 'master' 
Feature:  Add esp32-s2 I2C driver.

Closes IDF-1278 and IDF-1026

See merge request espressif/esp-idf!7680
 2020-03-26 10:20:40 +08:00
Michael (XIAO Xufeng)
42c552242b Merge branch 'feature/fix_touch_driver_for_esp32s2' into 'master' 
driver(touch): fix touch sensor driver for esp32s2

See merge request espressif/esp-idf!7664
 2020-03-26 09:50:42 +08:00
Darian Leung
91841a53ff WDT: Add LL and HAL for watchdog timers 
This commit updates the watchdog timers (MWDT and RWDT)
in the following ways:

- Add seprate LL for MWDT and RWDT.
- Add a combined WDT HAL for all Watchdog Timers
- Update int_wdt.c and task_wdt.c to use WDT HAL
- Remove most dependencies on LL or direct register access
  in other components. They will now use the WDT HAL
- Update use of watchdogs (including RTC WDT) in bootloader and
  startup code to use the HAL layer.
 2020-03-26 02:14:02 +08:00
fuzhibo
340563f479 Driver(touch): fix touch sensor driver for esp32s2. 
1.update touch sensor driver for esp32s2;
2.update unit test for touch sensor;
3.update register files about touch sensor;
 2020-03-25 22:45:57 +08:00
morris
4fc16e2374 rmt: prefix caps name with SOC_ 2020-03-25 17:14:00 +08:00
morris
dc91aa9786 rmt: support tx in a group 2020-03-25 17:13:59 +08:00
morris
c91565d538 rmt: update rmt ll APIs 2020-03-25 13:19:03 +08:00
chenjianqiang
ecbe0dad1b driver/rmt: new features on esp32s2 
1. add receive carrier remove function
2. add pingpong receive function
 2020-03-25 13:19:03 +08:00
Renz Bagaporo
d5085010c8 soc: put hal function to get core id in IRAM 2020-03-24 22:50:51 +08:00
morris
3cf8479017 doc: always adopt latest chip revision 2020-03-24 19:11:28 +08:00
Renz Bagaporo
3d0967a58a test: declare requirements and include dirs private 2020-03-23 10:58:50 +08:00
Angus Gratton
207914a13a Merge branch 'refactor/common_code_panic_handler' into 'master' 
Panic handling common code refactor

See merge request espressif/esp-idf!7489
 2020-03-19 11:23:57 +08:00
Angus Gratton
9c430a17aa Merge branch 'feature/mpi_accel_s2' into 'master' 
MPI/RSA accelerator bringup for S2 and bignum refactor

Closes IDF-803 and IDF-1174

See merge request espressif/esp-idf!7915
 2020-03-17 13:16:05 +08:00
David Cermak
ecb419da2f soc: minor header fix typo and include of sdkconfig 2020-03-13 12:53:52 +01:00
Marius Vikhammer
e21bef3f28 mpi: active hw accel for S2 
Actives MPI/RSA hardware acceleratio for ESP32 S2.

Closes IDF-803
 2020-03-13 18:33:18 +08:00
Ivan Grokhotkov
64ceab0069 Merge branch 'feature/aes_sha_accel_s2' into 'master' 
crypto: SHA and AES accelerator bring up for S2

Closes IDF-1443, IDF-714, and IDF-716

See merge request espressif/esp-idf!7825
 2020-03-13 18:21:09 +08:00
michael
3b1fa7b8f0 spi_flash: add caps for dummy output control 2020-03-11 16:13:39 +00:00
Marius Vikhammer
37369a8a57 crypto: SHA and AES accelerator bring up for S2 
Brings up, fixes and enables AES and SHA hardware acceleration.

Closes IDF-714
Closes IDF-716
 2020-03-11 15:09:45 +08:00
Angus Gratton
59381b60c0 Merge branch 'refactor/hal_function_set_exception_vector_table' into 'master' 
soc: add hal api to set exception vector table base address

See merge request espressif/esp-idf!7905
 2020-03-11 14:44:42 +08:00
Renz Christian Bagaporo
84e80a3e50 soc: remove sdio slave hal source file duplicate 2020-03-10 19:56:24 +08:00
Renz Christian Bagaporo
2b100789b7 esp32, esp32s2: move panic handling code to new component 2020-03-10 19:56:24 +08:00
Michael (XIAO Xufeng)
81daaff050 Merge branch 'feature/usb_component' into 'master' 
Feature/usb component

See merge request espressif/esp-idf!6897
 2020-03-09 16:53:55 +08:00
Andrei Gramakov
9d059be165 usb: added a tinyusb component; ci; soc. 
ci: ignore s2-only projects from the cmake-make test
soc: refactored the usb part
 2020-03-09 07:55:06 +01:00
Angus Gratton
f21079a06d Merge branch 'bugfix/duplicate_sdio_slave_hal' into 'master' 
soc: remove duplicate sdio_slave_hal.c

See merge request espressif/esp-idf!7874
 2020-03-09 13:35:58 +08:00
morris
8b6c0947c7 soc: add hal api to set exception vector table base address 2020-03-06 20:23:30 +08:00
Angus Gratton
a9854f7085 Merge branch 'feature/rmt_clock_support_ref_tick' into 'master' 
rmt: support ref tick && refactor unit test && re-enable unit test on ESP32-S2

Closes IDFGH-1715

See merge request espressif/esp-idf!7614
 2020-03-06 15:03:52 +08:00
Michael (XIAO Xufeng)
8e348dcdcd Merge branch 'bugfix/fix_driver_ut_i2s' into 'master' 
bugfix(i2s): fix driver ut i2s

See merge request espressif/esp-idf!6946
 2020-03-06 11:55:07 +08:00
Jiang Jiang Jian
b7a14c47e6 Merge branch 'bugfix/customer_baidu_psram_stack_backtrace' into 'master' 
added psram stack check in backtrace

See merge request espressif/esp-idf!7834
 2020-03-06 11:35:54 +08:00
Renz Bagaporo
5f3a689a89 soc: remove duplicate sdio_slave_hal.c 2020-03-05 12:47:54 +08:00
chaijie
66beaaef7d soc(rtc): modify rtc code in soc for esp32s2 2020-03-03 13:22:52 +00:00
morris
07088c6446 rmt: disable carrier feature by default 2020-03-03 20:14:46 +08:00
morris
0e4d82bc55 rmt: support REF_TICK as channel clock source 
Closes https://github.com/espressif/esp-idf/pull/3952
 2020-03-03 20:14:46 +08:00
morris
3c43264f83 rmt: add RMT_CHANNELS_NUM in rmt_caps.h 2020-03-03 20:14:45 +08:00
xiongyu
b3ae9fa978 bugfix(i2s): Updated ESP32-S2 ADC DAC support 
* Delete the relevant codes of ADC DAC of ESP32-S2.
 2020-03-03 12:59:30 +08:00
fuzhibo
3ad5138dd8 fix coexist i2s_adc and rtc_adc 2020-03-03 11:58:53 +08:00
xiongyu
faf898b659 bugfix(i2s): fix driver ut i2s 
* Add test support for ESP32S2

* Add loop back test

* Support chip internal connection, no external wiring required.

* Delete the relevant codes of PDM of ESP32-S2 ll layer.

* fix dac dma mode issue
 2020-03-03 11:58:53 +08:00
Li Shuai
c796e14964 added psram stack check in backtrace 2020-03-03 11:52:29 +08:00
Angus Gratton
04ccb84b83 Merge branch 'feature/cpu_abstraction' into 'master' 
CPU related operations abstraction

See merge request espressif/esp-idf!7301
 2020-02-28 11:54:29 +08:00
Michael (XIAO Xufeng)
ce3ab0b8df Merge branch 'bugfix/nec_example' into 'master' 
bugfix in NEC example and low level function

Closes IDFGH-2676 and IDFGH-2689

See merge request espressif/esp-idf!7562
 2020-02-28 11:00:50 +08:00
Mahavir Jain
5f897fd33c Merge branch 'feat/secure_boot_v2_v41' into 'master' 
feat/secure_boot_v2: Adding secure boot v2 support to ESP32-ECO3

Closes IDF-799

See merge request espressif/esp-idf!6778
 2020-02-27 18:54:08 +08:00
Angus Gratton
d40c69375c bootloader: Add fault injection resistance to Secure Boot bootloader verification 
Goal is that multiple faults would be required to bypass a boot-time signature check.

- Also strengthens some address range checks for safe app memory addresses
- Change pre-enable logic to also check the bootloader signature before enabling SBV2 on ESP32

Add some additional checks for invalid sections:

- Sections only partially in DRAM or IRAM are invalid
- If a section is in D/IRAM, allow the possibility only some is in D/IRAM
- Only pass sections that are entirely in the same type of RTC memory region
 2020-02-27 14:37:19 +05:30
Michael (XIAO Xufeng)
7f8c827326 Merge branch 'bugfix/fix_driver_ut_pcnt' into 'master' 
bugfix(pcnt): fix driver ut pcnt

See merge request espressif/esp-idf!6891
 2020-02-27 11:29:28 +08:00
Renz Christian Bagaporo
d46989efa3 soc: remove param checking in cpu related abstractions 2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo
f75cb2ef00 soc: change cpu stall, unstall, and reset core to not return values 2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo
d5c123c1f5 soc: use own macro to assert proper args for cpu abstractions 2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo
7f864d24ad soc: prefer assertions, disabling functions for cpu abstractions 
Prefer assertions, making available functions only when caps support it
for cpu-related abstractions.

Changes cpu hal functions to stall, unstall, reset to not accept -1;
instead prefering macros that provide the same functionality.
 2020-02-27 07:15:14 +05:00
Renz Christian Bagaporo
cefc71cdcd bootloader_support: mem-related initializations using cpu abstractions 2020-02-27 07:14:21 +05:00
Renz Christian Bagaporo
f3c6320ff6 soc: implement cpu utils in terms of cpu abstractions 2020-02-27 07:14:21 +05:00
Renz Christian Bagaporo
c9a51bfbb2 soc: create abstraction for cpu related operations 2020-02-27 07:14:19 +05:00
Sachin Parekh
301dacfb33 Exception handlers for LoadStoreError and LoadStoreAlignmentError 
Configurable option to use IRAM as byte accessible memory (in single core mode) using
load-store (non-word aligned and non-word size IRAM access specific) exception handlers.
This allows to use IRAM for use-cases where certain performance penalty
(upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration
option has been provided to redirect mbedTLS specific in-out content length buffers to
IRAM (in single core mode), allows to save 20KB per TLS connection.
 2020-02-26 20:21:59 +08:00
Michael (XIAO Xufeng)
c53192d521 Merge branch 'bugfix/fix_uart_set_line_inverse_breaking_change_issue' into 'master' 
Bugfix(uart): fix uart_set_line_inverse breaking change issue

Closes IDFGH-2469

See merge request espressif/esp-idf!7345
 2020-02-26 18:34:52 +08:00
xiongyu
4d5c950770 bugfix(pcnt): fix driver ut pcnt 
* Let `[ignore] case` return to freedom

  1) Because this test uses its own ISR, we need to release it with `esp_intr_free` instead of `pcnt_isr_service_uninstall`.

  2) `pcnt_evt_queue` needs to be created before the interrupt is registered and needs to be released at the end of each case.

* Add test support for ESP32S2

* Support chip internal connection, no external wiring required.
 2020-02-26 16:52:53 +08:00
houwenxiang
4883733472 driver(I2C): support esp32-s2 I2C driver. 2020-02-25 21:56:00 +08:00
Michael (XIAO Xufeng)
8f496a0f96 Merge branch 'refactor/add_ll_for_clock_gate_operation' into 'master' 
periph_ctrl: move target specific into ll files

See merge request espressif/esp-idf!7733
 2020-02-25 16:56:30 +08:00
morris
e9717fc07b periph_ctrl: move target specific into ll files 2020-02-24 14:50:26 +08:00
morris
ea8d6318af add SOC_EMAC_SUPPORTED in soc_caps.h 2020-02-24 11:57:58 +08:00
houwenxiang
c07e4c775d driver(uart): fix uart_set_line_inverse breaking change issue 
closes https://github.com/espressif/esp-idf/issues/4581
 2020-02-24 11:36:31 +08:00
Fu Zhi Bo
7a5b67b8de rtcio: fix rtcio unhold function 
Solve problems caused by code refactoring.

Closes https://github.com/espressif/esp-idf/issues/4600
 2020-02-20 15:42:28 +08:00
Ivan Grokhotkov
40cff27053 Merge branch 'feature/esp32s2_pm' into 'master' 
esp32s2: power management (DFS and auto light sleep)

Closes IDF-670, IDF-527, and IDFGH-231

See merge request espressif/esp-idf!7578
 2020-02-19 18:26:33 +08:00
Ivan Grokhotkov
fe0df01b12 Merge branch 'bugfix/from_github' into 'master' 
Fixes from Github

Closes IDFGH-2679, IDFGH-2632, IDFGH-2716, IDFGH-2439, and IDFGH-2509

See merge request espressif/esp-idf!7659
 2020-02-18 23:53:38 +08:00
Alexander Borsuk
e489e48dfa Fixes compilation error on verbose level (IDFGH-2439) 
Closes #4552

Merges https://github.com/espressif/esp-idf/pull/4786
 2020-02-18 12:30:47 +01:00
Jiang Jiang Jian
1a7d0b3b6f Merge branch 'bugfix/esp32s2_rng' into 'master' 
soc: esp32s2: fix address of WDEV_RND_REG

Closes IDF-1390

See merge request espressif/esp-idf!7640
 2020-02-18 19:07:51 +08:00
Ivan Grokhotkov
19c2337168 soc: esp32s2: fix address of WDEV_RND_REG 
Ref. ESP32-S2 TRM.

Closes IDF-1390
 2020-02-18 08:24:33 +01:00
Ivan Grokhotkov
383ace9443 rtc_clk_cal: make compatible with the ESP32 2020-02-17 17:33:56 +01:00
Ivan Grokhotkov
490bf29767 esp32s2: fix enabling 32k XTAL clock 
On the ESP32S2, rtc_clk_cal(RTC_CAL_RTC_MUX) measures the frequency
of the 90kHz RTC clock regardless of the selected slow clock
frequency. Keep track which clock is selected and pass the argument
to rtc_clk_cal accordingly.

fix clock choices

update rtc 32k xtal code for s2

missed api in rtc.h

bootloader_clock: update for S2
 2020-02-17 17:33:56 +01:00
Ivan Grokhotkov
74ac618287 soc/rtc: update frequency switching APIs to match the master branch 
esp32s2 code was based in IDF v3.1, and used outdated APIs.

Closes IDF-670
 2020-02-17 17:23:32 +01:00
xiongyu
61778d5b7c bugfix(i2s): fix adc output invert issue 2020-02-17 17:15:01 +08:00
morris
0d521e8f9d rmt: fix missing 0x in rmt_ll.h 
Closes https://github.com/espressif/esp-idf/issues/4760
 2020-02-17 15:20:41 +08:00
Krzysztof Budzynski
41bc06b9b9 Merge branch 'bugfix/docs_ledc' into 'master' 
drivers: Remove high speed mode from LEDC docs for ESP32-S2, update headers to match

See merge request espressif/esp-idf!7532
 2020-02-17 05:00:36 +08:00
Jiang Jiang Jian
cedea18acb Merge branch 'bugfix/wifi_clear_phy_status_when_cpu_start' into 'master' 
soc: clear PHY status when cpu start

Closes AUD-1125

See merge request espressif/esp-idf!7493
 2020-02-12 15:34:46 +08:00
Renz Christian Bagaporo
16e0c93e40 ci: solve public headers errors 2020-02-11 14:30:42 +05:00
Renz Christian Bagaporo
b675df4b08 soc: use include_next for including common touch sensor hal header 2020-02-11 14:30:42 +05:00
Renz Christian Bagaporo
1f2e2fe8af soc: separate abstraction, description and implementation 2020-02-11 14:30:42 +05:00
Angus Gratton
ea34f3bb27 drivers: Remove high speed mode from LEDC docs for ESP32-S2, update headers to match 2020-02-11 14:36:47 +11:00
Andrei Gramakov
4e8b4b9e49 soc: add USB peripheral register definitions, hal level, reg map, etc 2020-02-10 08:33:39 +00:00
Konstantin Kondrashov
daa9c30c8e rmt/esp32s2: Update RMT: reg, struct, LL and test_utils/ref_clock.c 2020-02-09 20:03:31 +08:00
Ivan Grokhotkov
4bfd0b961b Merge branch 'fix/spi_on_esp32s2' into 'master' 
spi: support esp32s2

See merge request espressif/esp-idf!7432
 2020-02-09 19:45:16 +08:00
Ivan Grokhotkov
98bb3772e0 soc: spi_flash LL fixes 2020-02-07 16:18:31 +01:00
Wangjialin
aaf119e930 flash(esp32s2): fix setting address field in spi user mode. 2020-02-07 16:10:51 +01:00
Angus Gratton
11fac8637a docs: Resolve doxygen & Sphinx warnings 2020-02-07 16:37:45 +11:00
Angus Gratton
fda4efa300 Merge branch 'bugfix/rtc_wdt_timeout' into 'master' 
soc/esp32s2: Fix setting timeout for RTC_WDT. ESP32-S2 uses 90KHz instead of 150kHz

See merge request espressif/esp-idf!7499
 2020-02-06 14:27:35 +08:00
Konstantin Kondrashov
739eb05bb9 esp32: add implementation of esp_timer based on TG0 LAC timer 
Closes: IDF-979
 2020-02-06 14:00:18 +08:00
KonstantinKondrashov
47a5d14e59 soc/esp32s2: Fix setting timeout for RTC_WDT. ESP32-S2 uses 90KHz instead of 150kHz 2020-02-05 15:16:28 +08:00
Ivan Grokhotkov
50466a5e4f Merge branch 'bugfix/esp32s2_ldscripts' into 'master' 
esp32s2: LD script fixes/improvements and re-enable SystemView examples

Closes IDF-1357, IDF-1354, and IDF-1346

See merge request espressif/esp-idf!7431
 2020-02-05 02:09:29 +08:00
Xia Xiaotian
1833b8aeab soc: clear PHY status when cpu start 2020-02-04 14:37:16 +08:00
Michael (XIAO Xufeng)
7026087dc0 spi: support esp32s2 2020-01-26 17:24:12 +08:00
Michael (XIAO Xufeng)
9d41829e09 spi: update esp32s2 hardware description files 2020-01-26 17:24:11 +08:00
Ivan Grokhotkov
3eb190ce48 esp32s2: fix interrupt names used by SystemView 2020-01-24 10:48:38 +01:00
Ivan Grokhotkov
02a99e84c8 esp32s2: move trace memory reservation to soc_memory_layout.c 2020-01-24 10:48:38 +01:00
Ivan Grokhotkov
354ce68dce soc: move reserved regions out of memory_layout_utils.c 
These definitions have ended up being chip specific. Moving them into
respective soc_memory_layout.c makes the whole picture of memory
regions easier to see, and also makes adding support for new chips
easier.
 2020-01-24 10:48:20 +01:00
Ivan Grokhotkov
caef7ad9f2 esp32, esp32s2beta: move brownout.c to esp_common 2020-01-23 13:44:19 +01:00
Ivan Grokhotkov
70752baba4 esp32s2: add brownout detector support 
1. add brownout detector HAL for esp32 and esp32s2
2. enable brownout reset for esp32 rev. 1 and above
3. add approximate brownout detector levels for esp32s2
 2020-01-23 13:44:19 +01:00
Ivan Grokhotkov
46035032cf esp32s2: fix inconsistency between reg and struct headers 
test_mux register doesn't exist in RTCCNTL anymore, remove it from
struct header. Also remove adc_ll_vref_output implementation, which
depends on that register.
 2020-01-23 11:30:11 +01:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
morris
95743f4ee6 update rtc_sleep_init for esp32s2 2020-01-22 10:19:05 +08:00
Felipe Neves
73592d9bc4 spin_lock: added new spinlock interface and decoupled it from RTOS 
spin_lock: cleaned-up port files and removed portmux files

components/soc: decoupled compare and set operations from FreeRTOS

soc/spinlock: filled initial implementation of spinlock refactor

It will decouple the spinlocks into separated components with not depencences of freertos
an similar interface was provided focusing the readabillity and maintenance, also
naming to spinlocks were adopted. On FreeRTOS side the legacy portMUX macros
gained a form of wrapper functions that calls the spinlocks component thus
minimizing the impact on RTOS side.

This feature aims to close IDF-967

soc/spinlock: spinlocks passed on unit test, missing test corner cases

components/compare_set: added better function namings plus minor performance optimization on spinlocks

soc/spinlock: code reordering to remove ISC C90 mix error

freertos/portmacro: gor rid of critical sections multiline macros, placed inline functions instead

soc/spinlock: improved spinlock performance from internal RAM

For cases where the spinlock is executed from IRAM, there is no
need to check where the spinlock object is placed on memory,
removing this checks caused a great improvement on performance.
 2020-01-22 06:20:34 +08:00