Commit graph

65 commits

Author SHA1 Message Date
Jeroen Domburg
34372a091c Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet. 2017-09-04 12:05:49 +08:00
Ivan Grokhotkov
5666fc0a56 Merge branch 'feature/esp_timer_improvements' into 'master'
esp_timer improvements

See merge request !1172
2017-09-01 16:14:01 +08:00
Ivan Grokhotkov
d2acf1ce77 sleep: add light sleep, factor out APIs common for deep/light sleep 2017-09-01 10:36:14 +08:00
Ivan Grokhotkov
f8b719d911 soc/rtc: add sleep flag to control powerdown of VDD_SDIO 2017-09-01 10:36:14 +08:00
Ivan Grokhotkov
c743bdac88 soc/rtc: round APB clock frequency to nearest MHz 2017-09-01 10:34:36 +08:00
Ivan Grokhotkov
a25eb825e1 Merge branch 'bugfix/dport_protect_crypto' into 'master'
add protection for crypto registers in DPORT

See merge request !928
2017-08-30 11:45:35 +08:00
Ivan Grokhotkov
547ef83020 Merge branch 'feature/disable_some_perip_clk_when_cpu_start' into 'master'
Disable some peripheral clocks when cpu starts

See merge request !1089
2017-08-30 11:43:38 +08:00
XiaXiaotian
4776f73ca4 Disable some peripheral clocks when cpu starts
All peripheral clocks are default enabled after chip is powered on.
    When CPU starts, if reset reason is CPU reset, disable those clocks
    that are not enabled before reset. Otherwise, disable all those
    useless clocks.
    These peripheral clocks must be enabled when the peripherals are
    initialized and disabled when they are deinitialized.
2017-08-29 11:18:42 +08:00
michael
c7173e0d08 fix(struct_h): add extern "C" protection to *_struct.h header files. 2017-08-28 18:10:46 +08:00
Ivan Grokhotkov
82763a02af Merge branch 'feature/ets_timer' into 'master'
esp_timer: add high-resolution timer api

See merge request !1090
2017-08-28 16:38:11 +08:00
Ivan Grokhotkov
d8b66e5088 soc: release interrupts which are not reserved by timers any more 2017-08-28 11:35:27 +08:00
Ivan Grokhotkov
b636f81619 Merge branch 'bugfix/spi_command' into 'master'
fix(spi_master): fix the command field to make it more intuitive to use.

See merge request !1119
2017-08-28 10:29:56 +08:00
Angus Gratton
2624e10055 esp32 hwcrypto: Use AES registers directly 2017-08-25 16:08:03 +10:00
Angus Gratton
cb31222e8b dport access: Add _DPORT_REG_SET_BIT & _DPORT_REG_CLR_BIT 2017-08-25 16:08:02 +10:00
Ivan Grokhotkov
08287852ab esp32: add protection for DPORT registers of RSA 2017-08-25 16:08:02 +10:00
Ivan Grokhotkov
a66df0826e soc: fix/update definitions related to FRC timers
1. BIT(8) of CTRL is actually read-only bit indicating interrupt status

2. BIT(0) or CTRL had inverted meaning: 1 is “level”, 0 is “edge”

3. Add definitions of prescaler values
2017-08-24 16:33:12 +08:00
Wang Jia Lin
f1ecffb46c Merge branch 'bugfix/touch_pad_driver' into 'master'
driver(touch): fix bug and add more features

See merge request !1056
2017-08-23 19:12:39 +08:00
Wangjialin
842caaab21 driver(touch): fix bug and add more features
1. add sens_struct.h
2. add definition of RTCCNTL and RTCIO
3. modify touch pad examples
4. update example code.
5. add comments add option in menuconfig
6. fix issue that pad index 8 and 9 are mismatched
7. add touch_pad_read_filtered() api to get value filtered by iir filter
8. modify touch pad isr func
9. Make the items in perihperal.ld in the sequence of address
10. delete Kconfig for touch pad
11. add touchpad filter APIs to adjust the filter
12. add touch_pad into index.rst
13. add touch_pad in Doxyfile
14. add touch_pad.rst
2017-08-22 21:21:39 +08:00
michael
4c9754726f fix(spi_master): fix the command field to make it more intuitive to use. 2017-08-21 20:37:57 +08:00
michael
ed1d084aea fix(spi_master): make the address field more intuitive to use.
The address field should be placed at the highest bits of address and slv_wr_status registers. Instead of breaking the address into two parts and fill in each register, move the address to the highest bits and write to the registers respectively.

Breaking change: if you fill-in the SPI address filed in a previous version in some way and it works correctly, you still have to rewrite the address, in a more intuitive way.
2017-08-15 14:49:31 +08:00
michael
99769f0b00 fix(spi_master): fix the bug that VSPI no respond when host changed
from HSPI to VSPI, and vice versa.

fix the SPI control bits written wrong in the headers.

TW#12123, Github#477
2017-07-21 14:50:17 +08:00
Angus Gratton
17adb40ca8 bootloader: Calculate SHA256 hash of image on every boot
Makes app image booting more reliable (256-bit rather than 8-bit verification.)

Some measurements, time to boot a 655KB app.bin file and run to app_main() execution.

(All for rev 1 silicon, ie no 340ms spurious WDT delay.)

80MHz QIO mode:
before = 300ms
after = 140ms

40MHz DIO mode:
before = 712ms
after = 577ms

40MHz DIO mode, secure boot enabled
before = 1380ms
after = 934ms

(Secure boot involves two ECC signature verifications (partition table, app) that take approx 300ms each with 80MHz CPU.)
2017-07-19 18:31:59 +10:00
Ivan Grokhotkov
0ae916d555 Merge branch 'feature/high_level_interrupts' into 'master'
Break out high-level interrupts so a component can override them

See merge request !675
2017-07-18 10:42:31 +08:00
Ivan Grokhotkov
7fc25f18d2 Merge branch 'feature/enable_brownout_detector' into 'master'
Enable brownout detector

See merge request !811
2017-07-13 11:40:37 +08:00
Angus Gratton
ad60c30de0 heap: Rename memory "tags" to "types" to avoid confusion w/ old tag allocator API 2017-07-10 17:46:03 +08:00
Angus Gratton
8d7074ed5c soc: Move esp_ptr_dma_capable() function to soc_memory_layout.h 2017-07-10 17:46:03 +08:00
Angus Gratton
71c70cb15c heap: Refactor heap regions/capabilities out of FreeRTOS
Remove tagged heap API, rename caps_xxx to heap_caps_xxx

Also includes additional heap_caps_xxx inspection functions.
2017-07-10 17:46:03 +08:00
Angus Gratton
5ee49fd311 heap: Add new multi_heap heap implementation to replace FreeRTOS-based tagged heaps 2017-07-10 17:46:03 +08:00
Ivan Grokhotkov
01b185977c brownout detector: enable by default
Because of errata related to BOD reset function, brownout is handled as follows:

- attach an ISR to brownout interrupt
- when ISR happens, print a message and do a software restart
- esp_restart_nonos enables RTC watchdog, so if restart fails,
  there will be  one more attempt to restart (using the RTC
  watchdog)
2017-07-10 17:25:55 +08:00
Ivan Grokhotkov
780569c04a esp32: fix RTC watchdog configuration in esp_restart
RTC watchdog didn’t have any actions configured for any of the stages.
This change configures it to use SW_SYSTEM_RESET at stage 0 and a
full reset at stage 1. The timeout is now calculated based on
RTC_SLOW_CLK frequency.
2017-07-10 17:21:49 +08:00
Tian Hao
7a79d31db0 fix reg operation missing 2017-07-07 20:04:24 +08:00
Jeroen Domburg
d3290479b2 Merge panic and dport high level interrupt code to both use int level 4 2017-07-07 12:51:33 +08:00
Ivan Grokhotkov
6b2e16e51b soc: fix typo in register name 2017-07-06 12:36:06 +08:00
Jack
ab9f63aba7 fix bug that uart register base address macro was wrong 2017-06-23 19:56:12 +08:00
Tian Hao
09f7cf45dd component/bt : fix interrupt number conflict
1. the typical problem is when push keyboard on serial tool, the bluetooth may stop.
2017-06-15 19:41:54 +08:00
Ivan Grokhotkov
06accaf851 add C++ include guards to header files which are missing them
Fixes https://github.com/espressif/esp-idf/issues/628
2017-05-31 17:20:17 +08:00
Jiang Jiang Jian
9229902dff Merge branch 'bugfix/lib_dport_access' into 'master'
component/esp32 : fix library dport access protections.

1. add esp32 library access DPORT register protections.
2. add bluetooth library access DPORT register protections.
3. change register operation(suffix/prefix) to new style.

See merge request !757
2017-05-18 14:56:38 +08:00
Tian Hao
52515d0edf component/esp32 : update wifi library and phy library 2017-05-17 11:46:53 +08:00
Ivan Grokhotkov
98e15df7f6 examples: add ULP ADC example 2017-05-16 13:15:02 +08:00
Tian Hao
3d22f1ee2f component/esp32 : fix library sport access protections.
1. add esp32 library access DPORT register protections.
2. add bluetooth library access DPORT register protections.
3. change register operation(suffix/prefix) to new style.
2017-05-13 19:55:11 +08:00
Jiang Jiang Jian
a6608648db Merge branch 'driver_merge_tmp/mcpwm' into 'master'
feature: Motor Control PWM(mcpwm) driver and examples



See merge request !698
2017-05-12 18:21:38 +08:00
Jiang Jiang Jian
bb25ac91f4 Merge branch 'bugfix/dualcore' into 'master'
component/soc: fix register access protection missing

- fix dport register access protection missing
- add rom function protect
- add normal register function check

See merge request !747
2017-05-12 18:19:31 +08:00
Kewal M Shah
2008f4d88c feature: add Motor Control PWM(mcpwm) driver
1. Name change from chopper to carrier, block diagram update, minor changes to example codes
2. mcpwm_reg.h changed, brought uniformity in comments, worked on suggestions, duty to accept float. Some name changes!
3. Minor readme changes and Indetation
4. Minor change:  move mcpwm_reg.h and mcpwm_struct.h to new path
5. Minor change: addition of BLDC example code and Readme
6. Name changed from epwm to mcpwm
7. Improve the reg name in mcpwm_struct.h
8. Name change chopper>carrier, deadband>deadtime
2017-05-12 15:47:59 +08:00
Tian Hao
377a1f5ea1 component/esp32 : do more fix of dualcore bug
1. the cache API in romcode will access DPORT register, so protect it.
2. fix STALL spelling.
3. check dport access by non-dport access function
2017-05-12 15:41:51 +08:00
Ivan Grokhotkov
15a6145961 Merge branch 'feature/get_chip_ver' into 'master'
add API to get chip info

This change adds an API to get chip info, such as chip model, enabled capabilities, size of embedded flash, silicon revision.

Hello_world example is modified to print out the information about the chip. The example is also simplified by moving all code into the main task.

Ref TW12031.

See merge request !549
2017-05-11 12:05:55 +08:00
Tian Hao
26a3cb93c7 component/soc : move dport access header files to soc
1. move dport access header files to soc
2. reduce dport register write protection. Only protect read operation
2017-05-09 18:06:00 +08:00
Tian Hao
f7e8856520 component/esp32 : fix dualcore bug
1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
2017-05-08 21:53:43 +08:00
Ivan Grokhotkov
2260c714e7 add esp_chip_info API 2017-05-05 17:28:30 +08:00
Tian Hao
5c0d0d4854 component/bt : change VHCI interrupt type to software interrupt(int no 7) 2017-04-28 17:20:06 +08:00
Jeroen Domburg
46fa2cfb46 Merge branch 'feature/spi_slave' into 'master'
Split common SPI stuff out of master driver; add slave driver; add workaround for DMA issue.

This merge req mainly adds a slave device. In order to do this, the original master driver is refactored into common code shared by master and slave modes, and a slave driver is added.

The other things added are:
- Added a workaround for a 'feature' of the ESP32 silicon that can lock up the receive DMA channel in some situations. This can only be fixed by resetting *both* DMA channels. The workaround implemented makes sure that the reset only happens when both channels are idle
- Got rid of the automatic choice between register- and DMA-based transfers. The master (and slave) code will now always go for a DMA transfer if a DMA channel is given, and always go for register-based transfers if no DMA channel is given.
- Add in a bunch of fixes for outstanding Github issues.

See merge request !659
2017-04-27 12:28:42 +08:00