check master read write functions with array of registers)
fix master serial processing code and modbus controller to work with register array
modbus_master: add reading and writing of test value array (58 registers) to check failure is gone
remove parameter temporary buffer from modbus controller to allow more than 24 byte writes
driver: fix issue with TOUT feature
driver: fix uart_rx_timeout issue
driver: fix issue with rxfifo_tout_int_raw not triggered when received fifo_len = 120 byte and all bytes read out of fifo as result of rxfifo_full_int_raw
driver: add function uart_internal_set_always_rx_timeout() to always handle tout interrupt
examples: call uart_internal_set_always_rx_timeout() to handle tout interrupt correctly
examples: update examples to use tout feature
driver: reflect changes of uart_set_always_rx_timeout() function, change uart.c
driver: change conditions to trigger workaround for tout feature in uart.c
driver: change uart_set_always_rx_timeout()
freemodbus: fix tabs, remove commented code
driver: remove uart_ll_is_rx_idle()
tout_thr - move calculation and masking into hal layer update driver and uart_ll (add uart_ll_set_rx_tout)
move tout calculation into uart_ll
move calculation of time out in bit time for esp32s2 into low level uart_ll.h file
move uart_hal_get_symb_len() into hal
update set_rx_timeout() to warn user about incorrect value
update HAL, LL 1
fix uart_xx_set_rx_tout() to convert symbol time into bit time
update param description
update tout calculation in LL
update uart_hal_get_max_rx_timeout_thrd() and uart_ll_get_max_rx_timeout_thrd()
This commit updates the watchdog timers (MWDT and RWDT)
in the following ways:
- Add seprate LL for MWDT and RWDT.
- Add a combined WDT HAL for all Watchdog Timers
- Update int_wdt.c and task_wdt.c to use WDT HAL
- Remove most dependencies on LL or direct register access
in other components. They will now use the WDT HAL
- Update use of watchdogs (including RTC WDT) in bootloader and
startup code to use the HAL layer.
* Add test support for ESP32S2
* Add loop back test
* Support chip internal connection, no external wiring required.
* Delete the relevant codes of PDM of ESP32-S2 ll layer.
* fix dac dma mode issue
Prefer assertions, making available functions only when caps support it
for cpu-related abstractions.
Changes cpu hal functions to stall, unstall, reset to not accept -1;
instead prefering macros that provide the same functionality.
* Let `[ignore] case` return to freedom
1) Because this test uses its own ISR, we need to release it with `esp_intr_free` instead of `pcnt_isr_service_uninstall`.
2) `pcnt_evt_queue` needs to be created before the interrupt is registered and needs to be released at the end of each case.
* Add test support for ESP32S2
* Support chip internal connection, no external wiring required.
1. add brownout detector HAL for esp32 and esp32s2
2. enable brownout reset for esp32 rev. 1 and above
3. add approximate brownout detector levels for esp32s2
The following commit refactors the CAN driver such that
it is split into HAL and Lowlevel layers. The following
changes have also been made:
- Added bit field members to can_message_t as alternative
to message flags. Updated examples and docs accordingly
- Register field names and fields of can_dev_t updated
ledc_types.h includes two similar enums, ledc_clk_src_t & ledc_clk_cfg_t. Latter was added in
ESP-IDF v4.0.
The two enums do different things but there are two similar names: LEDC_REF_TICK / LEDC_USE_REF_TICK
and LEDC_APB_CLK / LEDC_USE_APB_CLK.
Because C will accept any enum or integer value for an enum argument, there's no easy way to check
the correct enum is passed without using static analysis.
To avoid accidental errors, make the numeric values for the two similarly named enums the same.,
Noticed when looking into https://github.com/espressif/esp-idf/issues/4476
* Modify the function implementation of ESP32-S2 RTC GPIO
On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register.
On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers.
* Add ESP32-S2 support of unit test
* Modify the pull-up test of unit test
* Modify the interrupt test of unit test
* Modify input and output mode test of unit test
