Commit graph

735 commits

Author SHA1 Message Date
Jeroen Domburg
671787a966 After rebasing, it was found out that flushing the cache drops the writeback-pending psram cache lines on the ground. We now evict these by reading 64/128K of memory before flushing the cache. Also fixes a snafu in psram cache mode (inverted hi/lo and even/odd selectors) as well as an option to not let the heap allocator touch the psram. 2017-05-16 13:11:59 +08:00
Wangjialin
8af42554ba remove unused codes in psram driver 2017-05-16 13:11:58 +08:00
Wangjialin
34d9cf4f00 update psram driver:
1. fix init error after system restart
2. use MACROs for GPIO definition and psram id.
3. format the code
2017-05-16 13:11:58 +08:00
Jeroen Domburg
39d9882be9 More MR comment fixes 2017-05-16 13:11:58 +08:00
Jeroen Domburg
da1ef5da03 Maybe I should try to compile before commit/push... 2017-05-16 13:11:58 +08:00
Jeroen Domburg
84b728e7fd Some fixes to MR comments 2017-05-16 13:11:58 +08:00
Jeroen Domburg
b3a526536c Fix warnings for test 2017-05-16 13:11:58 +08:00
Jeroen Domburg
fe3082fa98 Do not declare test_spiram when option is disabled 2017-05-16 13:11:58 +08:00
Jeroen Domburg
0049b918b4 Fix psram silicon bug test; clean up Kconfig mess, clean out psram unused functions warnings 2017-05-16 13:11:56 +08:00
Jeroen Domburg
c6d01c2bd2 Fix dualcore PSRAM. 2017-05-16 13:11:30 +08:00
Jeroen Domburg
c9a2463f3b Add Doom psram test, fix free_heap_size/minimum_ever_heap_size calls to also understand combinations of caps, add psram support to allocator. At the moment, psram only works for the first core because of some funny business in the MMU of the 2nd core. 2017-05-16 13:10:52 +08:00
Jeroen Domburg
10402186bc Add internal memory capability to heap alloc, add some PSRAM tests 2017-05-16 13:09:50 +08:00
Jeroen Domburg
15012589a5 Psram driver cleanup: remove DMA and test functions, tabs to spaces, add copyright header 2017-05-16 13:08:31 +08:00
Wangjialin
0a88301fce update psram example files
1. update psram code
2. add missing files
3. add psram example
4. add mmu and psram init
2017-05-16 13:08:28 +08:00
Jiang Jiang Jian
1e0710f1b2 Merge branch 'bugfix/bt_acl_tx' into 'master'
components/bt: update libbtdm.a with a bugfix for an assertion failure when ACL-…

…U transmission is resumed

See merge request !755
2017-05-12 18:23:20 +08:00
Jiang Jiang Jian
a6608648db Merge branch 'driver_merge_tmp/mcpwm' into 'master'
feature: Motor Control PWM(mcpwm) driver and examples



See merge request !698
2017-05-12 18:21:38 +08:00
Jiang Jiang Jian
bb25ac91f4 Merge branch 'bugfix/dualcore' into 'master'
component/soc: fix register access protection missing

- fix dport register access protection missing
- add rom function protect
- add normal register function check

See merge request !747
2017-05-12 18:19:31 +08:00
wangmengyang
23965694b1 components/bt: update libbtdm.a with a bugfix for an assertion failure when ACL-U transmission is resumed 2017-05-12 17:53:25 +08:00
Kewal M Shah
2008f4d88c feature: add Motor Control PWM(mcpwm) driver
1. Name change from chopper to carrier, block diagram update, minor changes to example codes
2. mcpwm_reg.h changed, brought uniformity in comments, worked on suggestions, duty to accept float. Some name changes!
3. Minor readme changes and Indetation
4. Minor change:  move mcpwm_reg.h and mcpwm_struct.h to new path
5. Minor change: addition of BLDC example code and Readme
6. Name changed from epwm to mcpwm
7. Improve the reg name in mcpwm_struct.h
8. Name change chopper>carrier, deadband>deadtime
2017-05-12 15:47:59 +08:00
Tian Hao
377a1f5ea1 component/esp32 : do more fix of dualcore bug
1. the cache API in romcode will access DPORT register, so protect it.
2. fix STALL spelling.
3. check dport access by non-dport access function
2017-05-12 15:41:51 +08:00
Liu Zhi Fu
dc78c55f61 esp32: update wifi lib to enlarge wifi task stack size
1. Enlarge wifi task stack size by 512Bytes to fix potential stack overflow issue
2. Modify wifi hmac tx queue size from 12 to 32 because we already limit the buffer number in ebuf
   management module
2017-05-12 09:36:41 +08:00
Ivan Grokhotkov
15a6145961 Merge branch 'feature/get_chip_ver' into 'master'
add API to get chip info

This change adds an API to get chip info, such as chip model, enabled capabilities, size of embedded flash, silicon revision.

Hello_world example is modified to print out the information about the chip. The example is also simplified by moving all code into the main task.

Ref TW12031.

See merge request !549
2017-05-11 12:05:55 +08:00
Ivan Grokhotkov
67b08c20ec Merge branch 'bugfix/update_wifi_lib_for_some_bugs' into 'master'
esp32: update wifi lib for some bugfix

1. Fix wifi ebuf free twice issue
2. Fix wifi internal assert issue
3. Fix a bug in esp_wifi_stop
4. Fix wifi crash issue
5. Fix wifi run out of memory when 10 udp connection stability test

See merge request !745
2017-05-11 12:02:50 +08:00
Ivan Grokhotkov
c742f7d860 Merge branch 'feature/base_mac_address' into 'master'
Optimize configuration of base MAC address

Application developer can call APIs to configure base MAC address
instead of using menuconfig.

See merge request !744
2017-05-11 12:01:51 +08:00
Liu Zhi Fu
4235b4c13e esp32: update wifi lib for some bugfix
1. Fix wifi ebuf free twice issue
2. Fix wifi internal assert issue
3. Fix a bug in esp_wifi_stop
4. Fix wifi crash issue
5. Fix 10 UDP connection test out of memory issue
2017-05-11 11:30:08 +08:00
Jiang Jiang Jian
c518325385 Merge branch 'bugfix/dualcore_dport' into 'master'
component/esp32 : fix dualcore bug

1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.

See merge request !742
2017-05-10 11:27:01 +08:00
XiaXiaotian
b22067a8f0 Optimize configuration of base MAC address
Application developer can call APIs to configure base MAC address
    instead of using menuconfig.
2017-05-10 10:15:07 +08:00
Tian Hao
26a3cb93c7 component/soc : move dport access header files to soc
1. move dport access header files to soc
2. reduce dport register write protection. Only protect read operation
2017-05-09 18:06:00 +08:00
Tian Hao
f7e8856520 component/esp32 : fix dualcore bug
1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
2017-05-08 21:53:43 +08:00
Jeroen Domburg
a41ac2d21d Merge branch 'bugfix/spi_example' into 'master'
SPI: Various fixes (examples, mem leak, arg check)

- Fix SPI master example to use DMA-capable memory for display initialization. Fixes https://github.com/espressif/esp-idf/issues/551
- SPI master: Do not leak DMA descriptor pointer array on free
- SPI Master/Slave: Check if DMA'ed buffers actually live in DMA-capable memory



See merge request !735
2017-05-08 17:28:55 +08:00
Ivan Grokhotkov
2260c714e7 add esp_chip_info API 2017-05-05 17:28:30 +08:00
Jiang Jiang Jian
a7847dbec9 Merge branch 'bugfix/bt_sniff_mode' into 'master'
component/bt: fix some bugs related to bluetooth sniff mode in controller

1. fix some bugs in bluetooth sniff mode in controller
2. export some symbols to esp32.rom.ld including functions and global variables in ROM code
3. update libbtdm.a which includes "IRAM_ATTR" addition or removal for some functions

See merge request !729
2017-05-05 16:27:37 +08:00
Jeroen Domburg
8af3fe4e84 Warn against and check for non-DMA-capable pointers being passed to SPI when DMA is used 2017-05-05 12:28:03 +08:00
Liu Zhi Fu
7308db6f94 esp32: update wifi lib to enable ebuf sanity check
Modify wifi ebuf sanity checking from disaled to enabled
2017-05-04 15:14:11 +08:00
wangmengyang
244fbf1e84 component/bt: fix some bugs related to bluetooth sniff mode in controller
1. fix some bugs in bluetooth sniff mode in controller
2. export some symbols to esp32.rom.ld including functions and global variables in ROM code
3. update libbtdm.a which includes "IRAM_ATTR" addition or removal for some functions
2017-05-04 15:08:07 +08:00
Ivan Grokhotkov
07b61d54f7 Merge branch 'bugfix/rtc_fast_freq_init' into 'master'
esp32: select 8M clock as RTC_FAST_CLK on startup

Even though RTC_CLK_CONFIG_DEFAULT correctly had RTC_FAST_FREQ_8M as the
fast clock, the bootloader modified fast_freq field to the currently
selected RTC_FAST_CLK (so that the clock choice is not affected by the
bootloader). The application startup code never switched to 8M clock,
which caused the default (XTAL/4) to be used as RTC_FAST_CLK. This had
caused a number of issues, such as touch pads not working in deep sleep.

Fixes https://github.com/espressif/esp-idf/issues/542.
Ref TW12053.

See merge request !709
2017-04-28 19:57:42 +08:00
Liu Zhi Fu
e86b2dc9c3 esp32: update WiFi lib for ebuf sanity check fail issue
Fix WiFi ebuf sanity check issue
2017-04-28 17:27:55 +08:00
Liu Zhi Fu
5cf3b1c201 esp32/lwip: adjust some lwip options and update wifi lib
1. Modify TCP TX window from 2 to 4
2. Modify TCPIP task stack default size from 2048 to 2560
3. Update wifi lib for TCP performance optimization
2017-04-28 15:25:33 +08:00
Ivan Grokhotkov
6f0a9f76cd Merge branch 'feature/ci_minor_fixes' into 'master'
ci minor fixes



See merge request !707
2017-04-28 00:25:13 +08:00
Jiang Jiang Jian
899a5d223f Merge branch 'feature/opt_scan_before_connect' into 'master'
optimize scan before station connecting to AP

1. Store the information of AP(ssid, password, bssid, channel, etc)
    into nvs when station connects to AP successfully. If station
    connects to the same AP next time, it will scan the stored channel of the AP
    first.

2. Add a parameter of channel for scanning before connecting to AP.
    If the channel is set to 0, station will scan full channels. If it
    is set to 1~13, station will only scan the channel.

See merge request !704
2017-04-27 21:11:13 +08:00
XiaXiaotian
100d2dd938 optimize scan before station connecting to AP
1. Store the information of AP(ssid, password, bssid, channel, etc)
    into nvs when station connects to AP successfully. If station
    connects to the same AP next time, it will scan the stored channel of the AP
    first.

    2. Add a parameter of channel for scanning before connecting to AP.
    If it is set to 1~13, station will scan starting from the channel.
    If the channel of AP is unknown, set it to 0.
2017-04-27 14:28:52 +08:00
Ivan Grokhotkov
1c3b40adeb esp32: select 8M clock as RTC_FAST_CLK on startup
Even though RTC_CLK_CONFIG_DEFAULT correctly had RTC_FAST_FREQ_8M as the
fast clock, the bootloader modified fast_freq field to the currently
selected RTC_FAST_CLK (so that the clock choice is not affected by the
bootloader). The application startup code never switched to 8M clock,
which caused the default (XTAL/4) to be used as RTC_FAST_CLK. This had
caused a number of issues, such as touch pads not working in deep sleep.

Fixes https://github.com/espressif/esp-idf/issues/542.
Ref TW12053.
2017-04-27 12:44:54 +08:00
Anton Maklakov
079b0128de build: Fix comments and avoid build warning 2017-04-27 10:51:45 +08:00
Ivan Grokhotkov
1324e565fa Merge branch 'bugfix/esp32_core_dump_sanity_checks' into 'master'
esp32: Core dump sanity checks

Adds sanity checks when doing core dump to flash

- CRC for core dump flash partition config
- Tasks with corrupted TCBs are skipped
- Assertions to check that nothing is written beyond core dump flash partition

Ref TW11879

See merge request !686
2017-04-27 10:43:58 +08:00
Ivan Grokhotkov
fe695a9af8 Merge branch 'feature/cpu_restart_sequence' into 'master'
Restart sequence requires set up for app cpu.

These changes required to make correct restart of CPU form JTAG.

See merge request !703
2017-04-27 09:30:42 +08:00
Alexey Gerenkov
98895af68b esp32: Core dump sanity checks were added
- CRC for core dump flash partition config
 - Tasks with corrupted TCBs are skipped
 - Assertions to check that nothing is written beyond core dump flash partition
2017-04-26 21:13:02 +03:00
Dmitry Yakovlev
baeab37560 Debug info removed. 2017-04-26 10:31:05 +03:00
Dmitry Yakovlev
00aa73c6cf Restart sequence requires set up for app cpu. 2017-04-26 07:47:37 +03:00
Ivan Grokhotkov
6353bc40d7 Add support for 32k XTAL as RTC_SLOW_CLK source
- RTC_CNTL_SLOWCLK_FREQ define is removed; rtc_clk_slow_freq_get_hz
  function can be used instead to get an approximate RTC_SLOW_CLK
  frequency

- Clock calibration is performed at startup. The value is saved and used
  for timekeeping and when entering deep sleep.

- When using the 32k XTAL, startup code will wait for the oscillator to
  start up. This can be possibly optimized by starting a separate task
  to wait for oscillator startup, and performing clock switch in that
  task.

- Fix a bug that 32k XTAL would be disabled in rtc_clk_init.

- Fix a rounding error in rtc_clk_cal, which caused systematic frequency
  error.

- Fix an overflow bug which caused rtc_clk_cal to timeout early if the
  slow_clk_cycles argument would exceed certain value

- Improve 32k XTAL oscillator startup time by introducing bootstrapping
  code, which uses internal pullup/pulldown resistors on 32K_N/32K_P
  pins to set better initial conditions for the oscillator.
2017-04-26 12:43:22 +08:00
Ivan Grokhotkov
8131c77860 Merge branch 'feature/xtal_freq_autodetect' into 'master'
XTAL frequency detection, support for selecting XTAL frequency

This MR adds more robust XTAL frequency detection code (which gets run in the bootloader) and an option to set XTAL frequency in Kconfig. By default we still use autodetection, since it is more reliable than the one used in ROM code.

This will help with issues about XTAL frequency detection in high ambient temperature conditions.

Ref TW12008

See merge request !694
2017-04-25 16:30:36 +08:00