All peripheral clocks are default enabled after chip is powered on.
When CPU starts, if reset reason is CPU reset, disable those clocks
that are not enabled before reset. Otherwise, disable all those
useless clocks.
These peripheral clocks must be enabled when the peripherals are
initialized and disabled when they are deinitialized.
Currently the last 128KB of DRAM is reserved for the bootloader & early boot stacks. This means if >192KB of static DRAM
is allocated, the only available heap is this region - which is disabled until the scheduler starts. As a result, you
get either heap corruption on early boot if the static data overlaps startup heap (leading to very weird errors), or
FreeRTOS will fail to start when it can't malloc() anything.
Long term fix is to move the stacks & bootloader data to the very end of RAM, and only reserve that part for early
boot. This is a little fiddly because of also wanting to make sure this memory is not preemptively fragmented when it
gets reintroduced to the heap. This will become more important if/when we have more static allocation options in the
future.
For now, these errors make it clear why the boot has failed.
Ref TW13909
Specifying -fexceptions for the compiler is not enough.
- add necessary zero padding after .eh_frame section
- link .gcc_except_table_table in a way flash script does not complain
- call __registrer_frame_info before global constructors
Kudos jcmvbkbc for the necessary help.
Implements support for system level traces compatible with SEGGER
SystemView tool on top of ESP32 application tracing module.
That kind of traces can help to analyse program's behaviour.
SystemView can show timeline of tasks/ISRs execution, context switches,
statistics related to the CPUs' load distribution etc.
Also this commit adds useful feature to ESP32 application tracing module:
- Trace data buffering is implemented to handle temporary peaks of events load
When ‘reset halt’ command is executed, OpenOCD will take the APP CPU
out of reset and enable the clock. At this point, user can set a
breakpoint on code which will run on APP CPU. Previously, app startup
code would do another reset of APP CPU, thereby removing any breakpoints
which may have been set. This change makes APP CPU reset conditional on
DPORT_APPCPU_CLKGATE_EN bit, which is 0 by default but is set to 1 by
OpenOCD after reset.
1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
- RTC_CNTL_SLOWCLK_FREQ define is removed; rtc_clk_slow_freq_get_hz
function can be used instead to get an approximate RTC_SLOW_CLK
frequency
- Clock calibration is performed at startup. The value is saved and used
for timekeeping and when entering deep sleep.
- When using the 32k XTAL, startup code will wait for the oscillator to
start up. This can be possibly optimized by starting a separate task
to wait for oscillator startup, and performing clock switch in that
task.
- Fix a bug that 32k XTAL would be disabled in rtc_clk_init.
- Fix a rounding error in rtc_clk_cal, which caused systematic frequency
error.
- Fix an overflow bug which caused rtc_clk_cal to timeout early if the
slow_clk_cycles argument would exceed certain value
- Improve 32k XTAL oscillator startup time by introducing bootstrapping
code, which uses internal pullup/pulldown resistors on 32K_N/32K_P
pins to set better initial conditions for the oscillator.
Remove ESP_EARLY_LOGI before bss is initialized; it crashes the CPU
There's an ESP_EARLY_LOGI line that can get called before the BSS is initialized; the early logging code doesn't cope well with that: it checks if FreeRTOS is up, but the variables it uses for that contains garbage because it isn't cleared yet, giving the wrong result. The logging code then tries to set a mux, crashing the entire system. This patch removes the log line and adds a warning at the BSS initialization line not to do anything complex before that point.
Fixes https://github.com/espressif/esp-idf/issues/523
See merge request !671
- Implements application tracing module which allows to send arbitrary
data to host over JTAG. This feature is useful for analyzing
program modules behavior, dumping run-time application data etc.
- Implements printf-like logging functions on top of apptrace module.
This feature is a kind of semihosted printf functionality with lower
overhead and impact on system behaviour as compared to standard printf.
The software interrupt originally used as the cross-core interrupt is
now also used to yield from a FreeRTOS critical section; therefore it
must be initialized for single core mode as well.
Fixes https://github.com/espressif/esp-idf/issues/496
1. Add disable PHY and RF when WiFi and BT are both disabled(including call sniffer disable API).
2. Do not init PHY and RF when cpu start. Init PHY and RF when call Wifi or BT start APIs(including sniffer enable API).
3. Add a temporary lib: librtc_clk.a and will delete it when CPU frequency switching function is done.
4. Add an function to get OS tick rate.
5. Do not put the whole pp.a in iram0, only put lmac.o, ieee80211_misc.o, ets_time.o and wdev.o in iram0.
In the default PHY init routine, calibration data is loaded from NVS.
Most of the time the incremental changes to calibration will be fairly
small, so we don’t need to rewrite the existing calibration data stored
in the NVS.
Possible enhancement to be done in the future: expose a function in PHY
library to tell how big was the change in calibration data. If the
change was significant, then calibration data stored in NVS should be
updated.
The following issues mentioned during MR!341 review were fixed:
1) Core dump test application description
2) Usage of CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH and CONFIG_ESP32_ENABLE_COREDUMP_TO_UART
3) FLASH_GUARD_START macro usage is fixed in flash API
4) Core dump module logging facility
5) cache util functions doc updated
6) interactive delay before print core dump to uart
7) core dump partion support in build system
1) PS is fixed up to allow GDB backtrace to work properly
2) MR!341 discussion: in core dump module: esp_panicPutXXX was replaced by ets_printf.
3) MR!341 discussion: core dump flash magic number was changed.
4) MR!341 discussion: SPI flash access API was redesigned to allow flexible critical section management.
5) test app for core dump feature was added
6) fixed base64 file reading issues on Windows platform
7) now raw bin core file is deleted upon core loader failure by epscoredump.py
Complimentary changes:
1) Partition table definitions files with core dump partition
2) Special sub-type for core dump partition
3) Special version of spi_flash_xxx
4) espcoredump.py is script to get core dump from flash and print useful info
5) FreeRTOS API was extended to get tasks snapshots
Boot watchdogs were disabled very early in startup code. It was possible to introduce an infinite loop anywhere in the many functions called from startup code, and this would not be detected by interrupt watchdog and task watchdog. This change postpones disabling of boot watchdogs to the point when the scheduler is running. Also replaces register expressed using integer address with a name.
This change adds a set of menuconfig options to set custom UART#, baud rate, and pins, for console output.
Setting happens in bootloader startup code for PRO CPU, and in application startup code for APP CPU.
Ref. TW8146
Deep sleep: Any source named rtc_wake_stub* is linked as RTC wake stub code
Also move esp_deepsleep.h documentation out to docs/deep-sleep-stub.rst
See merge request !142
Add cross-core int to accelerate task being awoken from another CPU.
This adds a per-CPU interrupt that can be used to poke the CPU to go do something. In this case all that is implemented is a request to yield the current task, used in case a CPU unblocks a task that runs on another CPU. This gets rid of the limitation that inter-CPU communication using queues, muxes etc can take up to a FreeRTOS tick to happen.
Specs!
Sending an in in a queue of length 1 (essentially a semaphore) as quickly as possible (just a small delay in the sender, to make sure the receiver task gets swapped out) for 10 seconds. Number indicates the amount of ints transferred
Old code:
CPU0->CPU0: 42986
CPU0->CPU1,: 2999
New code:
CPU0->CPU0: 42868
CPU0->CPU1: 62073
See merge request !155
- spaces->tabs in tasks.c
- update vfs_uart.c to use per-UART locks
- add license to vfs_uart.c
- allocate separate streams for stdout, stdin, stderr, so that they can be independently reassigned
- fix build system test failure
- use posix off_t instead of newlib internal _off_t
- spaces->tabs in tasks.c
- update vfs_uart.c to use per-UART locks
- add license to vfs_uart.c
- allocate separate streams for stdout, stdin, stderr, so that they can be independently reassigned
- fix build system test failure
* master:
components/spi_flash: remove stray level of indentation
components/nvs: fix broken sentences in comment blocks
Roll back submodule version
Spinlocks already come initialized. Remove the code that would essentially re-initialize them at runtime
Remove all references to prvLockQueue / prvUnlockQueue
components/esp32: clean up unused function warnings in single core mode
clean up warnings
components/nvs: fix build, use log library instead of printf
components/spi_flash: add flash operation counters option to Kconfig
components/nvs: add erase function
components/nvs: fix formatting
components/nvs: batch writes when possible
components/spi_flash: add performance counters
components/nvs: maintain item hash list at page level
components/nvs: avoid reading just-erased page
# Conflicts:
# components/esp32/cpu_start.c
# components/esp32/event_default_handlers.c
Clean up warnings and remove unused parts of FreeRTOS
For third party components (lwip and expat), compilation flags are adjusted to silence existing warnings (i have manually checked that all warnings are benign).
In components/esp32, replaced use of WIFI_DEBUG with ESP_LOG functions.
Additionally prvLockQueue/prvUnlockQueue have been removed, dragging some other bits of FreeRTOS along.
Original issue: https://github.com/espressif/esp-idf/issues/18
See merge request !111
- put contents of a few headers into c++ guard blocks
- fix off-by-one error in do_global_ctors
- remove system_init from startup code (should be called from main)
This change removes implicit WiFi/BT initialization from startup code.
"main" task is started once essential part of startup code is complete.
This task calls application-provided "int main(void)" function, which can call WiFi/BT init functions if necessary.
* master: (57 commits)
components/lwip: fix grammar
components/lwip: make SO_REUSE configurable via menuconfig
bootloader: remove trailing newlines from log messages
components/freertos: override per-task __cleanup handler to close stdin, stdout, stderr
components/esp32: move peripheral symbols to separate ld script
components/log: regroup macros for better readability
gitlab-ci: allow running tests for branches, triggered via API
components/log: fix timestamp calculation
components/log: set default runtime log level to ESP_LOG_VERBOSE
components/log: fix error when using ESP_LOGx from C++ code
components/log: fix bugs, add options to override log level for files, components, and bootloader
fix ledc and spi typo
remove prefix and postfix
Enable SO_REUSEADDR in LWIP
freertos: fix memory debug macro issue Define configENABLE_MEMORY_DEBUG according to CONFIG_ENABLE_MEMORY_DEBUG
peripheral structure headers: move volatile keyword from members to typedef
Adding -fstrict-volatile-bitfields to the CFLAGS/CXXFLAGS. Without this, gcc tries to access bitfields using the smallest possible methods (eg l8i to grab an 8-bit field from a 32-bit). Our hardware does not like that. This flag tells gcc that if a bitfield is volatile, it should always use the type the field is defined at (uint32_t in our case) to size its access to the field. This fixes accessing the hardware through the xxx_struct.h headers.
add peripheral module struct headers
build system docs: Add note about no spaces in component names
Docs: Add note about unusual submodule messages when cloning on Windows
...
# Conflicts:
# components/esp32/cpu_start.c
# components/esp32/include/soc/cpu.h
Move CPU region protection setup into soc/cpu.h
change tabs to spaces
remove unused extern declarations
use RTC_WDTCONFIG0 instead of numeric address (still need to fix BB reg)
This also removes logging implementation from bootloader and replaces it
with the one provided by the log component. Some occurrences of printf
and ets_printf have been changed to ESP_LOGx APIs.
Note that with WiFi stack enabled, system_init will reset frequency to 240MHz.
To make this setting useful, esp32-wifi-libs submodule needs to be updated.
