Commit graph

160 commits

Author SHA1 Message Date
Alexey Gerenkov
b09f4acb27 Added proper handling of apptrace and pthread initialization errors 2017-09-14 20:47:43 +02:00
krzychb
a1ebeed303 Changed initialization sequence of application tracing component on APP CPU so it follows completion of initialization of the same component on PRO CPU. Previously, because of missing locking mechanism, both components were printing logs to UART at the same time. As results logs contained only corrupted characters / were not legible at all. Internal tracking: esp-idf/openocd-esp32, Issue 15 2017-09-14 20:47:43 +02:00
Jeroen Domburg
875ae6a134 Add option to allocate external RAM using heap_alloc_caps 2017-09-14 10:47:44 +08:00
Ivan Grokhotkov
5425d8569c Merge branch 'feature/pthread_api' into 'master'
esp32: pthread API

See merge request !1146
2017-09-07 17:49:42 +08:00
Alexey Gerenkov
5094965e98 According to comments 2017-09-06 10:30:23 +08:00
Alexey Gerenkov
0b09c7006d pthread: Initial version of thread API 2017-09-06 10:30:23 +08:00
Angus Gratton
5361c08989 heap: Support adding new heap regions at runtime
To facilitate this, the list of registered heap regions is now a linked list
(allowing entries to be appended at runtime.)
2017-09-05 14:07:02 +10:00
Jeroen Domburg
34372a091c Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet. 2017-09-04 12:05:49 +08:00
Ivan Grokhotkov
f31efb697c newlib: rename esp_setup_time_syscalls to esp_set_time_from_rtc
This function no longer sets up syscalls, and new name reflects its
purpose better.
2017-09-01 10:36:14 +08:00
Ivan Grokhotkov
d4e950d311 Merge branch 'feature/cxx_exceptions' into 'master'
Partial support for C++ exceptions

See merge request !930
2017-09-01 00:27:41 +08:00
Ivan Grokhotkov
547ef83020 Merge branch 'feature/disable_some_perip_clk_when_cpu_start' into 'master'
Disable some peripheral clocks when cpu starts

See merge request !1089
2017-08-30 11:43:38 +08:00
Angus Gratton
1e22bcdfde esp32: Add KConfig option to disable ROM Console fallback on first boot 2017-08-29 14:52:00 +10:00
XiaXiaotian
4776f73ca4 Disable some peripheral clocks when cpu starts
All peripheral clocks are default enabled after chip is powered on.
    When CPU starts, if reset reason is CPU reset, disable those clocks
    that are not enabled before reset. Otherwise, disable all those
    useless clocks.
    These peripheral clocks must be enabled when the peripherals are
    initialized and disabled when they are deinitialized.
2017-08-29 11:18:42 +08:00
Ivan Grokhotkov
857a29872d esp_timer: add high resolution software timer API 2017-08-28 11:35:26 +08:00
Angus Gratton
e50870c2dc Merge branch 'bugfix/bootloader_stack_smash' into 'master'
Fix crashes when >approx 185KB of DRAM is statically allocated

See merge request !983
2017-07-17 14:11:35 +08:00
Angus Gratton
99fe61716c startup: Add assertion checks around various initialisation sequences
These may fail if close to 192KB of static RAM is allocated (remaining early heap RAM is too small.)
2017-07-12 13:06:56 +08:00
Angus Gratton
2b0f623259 bootloader/early boot: Error out if >192KB of static DRAM is allocated (temporary fix)
Currently the last 128KB of DRAM is reserved for the bootloader & early boot stacks. This means if >192KB of static DRAM
is allocated, the only available heap is this region - which is disabled until the scheduler starts. As a result, you
get either heap corruption on early boot if the static data overlaps startup heap (leading to very weird errors), or
FreeRTOS will fail to start when it can't malloc() anything.

Long term fix is to move the stacks & bootloader data to the very end of RAM, and only reserve that part for early
boot. This is a little fiddly because of also wanting to make sure this memory is not preemptively fragmented when it
gets reintroduced to the heap. This will become more important if/when we have more static allocation options in the
future.

For now, these errors make it clear why the boot has failed.

Ref TW13909
2017-07-12 13:06:56 +08:00
Angus Gratton
71c70cb15c heap: Refactor heap regions/capabilities out of FreeRTOS
Remove tagged heap API, rename caps_xxx to heap_caps_xxx

Also includes additional heap_caps_xxx inspection functions.
2017-07-10 17:46:03 +08:00
Angus Gratton
5ee49fd311 heap: Add new multi_heap heap implementation to replace FreeRTOS-based tagged heaps 2017-07-10 17:46:03 +08:00
Jan Mrázek
f698a1b2d3 Add missing support for C++ exceptions
Specifying -fexceptions for the compiler is not enough.

- add necessary zero padding after .eh_frame section
- link .gcc_except_table_table in a way flash script does not complain
- call __registrer_frame_info before global constructors

Kudos jcmvbkbc for the necessary help.
2017-06-28 13:53:42 +08:00
Alexey Gerenkov
8d43859b6a esp32: SEGGER SystemView Tracing Support
Implements support for system level traces compatible with SEGGER
SystemView tool on top of ESP32 application tracing module.
That kind of traces can help to analyse program's behaviour.
SystemView can show timeline of tasks/ISRs execution, context switches,
statistics related to the CPUs' load distribution etc.

Also this commit adds useful feature to ESP32 application tracing module:
 - Trace data buffering is implemented to handle temporary peaks of events load
2017-06-27 20:52:43 +03:00
Tian Hao
09f7cf45dd component/bt : fix interrupt number conflict
1. the typical problem is when push keyboard on serial tool, the bluetooth may stop.
2017-06-15 19:41:54 +08:00
Ivan Grokhotkov
f327a9b1cf esp32: don’t reset APP CPU if it was already reset by OpenOCD
When ‘reset halt’ command is executed, OpenOCD will take the APP CPU
out of reset and enable the clock. At this point, user can set a
breakpoint on code which will run on APP CPU. Previously, app startup
code would do another reset of APP CPU, thereby removing any breakpoints
which may have been set. This change makes APP CPU reset conditional on
DPORT_APPCPU_CLKGATE_EN bit, which is 0 by default but is set to 1 by
OpenOCD after reset.
2017-06-12 15:16:57 +08:00
jack
ba32dd30a1 bugfix:Fix bug that wdt reset information for CPU1 was not correct 2017-06-05 18:26:14 +08:00
Tian Hao
f7e8856520 component/esp32 : fix dualcore bug
1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
2017-05-08 21:53:43 +08:00
Ivan Grokhotkov
fe695a9af8 Merge branch 'feature/cpu_restart_sequence' into 'master'
Restart sequence requires set up for app cpu.

These changes required to make correct restart of CPU form JTAG.

See merge request !703
2017-04-27 09:30:42 +08:00
Dmitry Yakovlev
baeab37560 Debug info removed. 2017-04-26 10:31:05 +03:00
Dmitry Yakovlev
00aa73c6cf Restart sequence requires set up for app cpu. 2017-04-26 07:47:37 +03:00
Ivan Grokhotkov
6353bc40d7 Add support for 32k XTAL as RTC_SLOW_CLK source
- RTC_CNTL_SLOWCLK_FREQ define is removed; rtc_clk_slow_freq_get_hz
  function can be used instead to get an approximate RTC_SLOW_CLK
  frequency

- Clock calibration is performed at startup. The value is saved and used
  for timekeeping and when entering deep sleep.

- When using the 32k XTAL, startup code will wait for the oscillator to
  start up. This can be possibly optimized by starting a separate task
  to wait for oscillator startup, and performing clock switch in that
  task.

- Fix a bug that 32k XTAL would be disabled in rtc_clk_init.

- Fix a rounding error in rtc_clk_cal, which caused systematic frequency
  error.

- Fix an overflow bug which caused rtc_clk_cal to timeout early if the
  slow_clk_cycles argument would exceed certain value

- Improve 32k XTAL oscillator startup time by introducing bootstrapping
  code, which uses internal pullup/pulldown resistors on 32K_N/32K_P
  pins to set better initial conditions for the oscillator.
2017-04-26 12:43:22 +08:00
Alexey Gerenkov
77a92e6dcc esp32: Added dumping info from traceport upon reset by any WDT
- Last PC info and waiti mode indication are printed for both CPUs
 - Raw traceport regs values are printed only for log levels higher than DEBUG
2017-04-23 22:07:56 +03:00
Jeroen Domburg
f73c6f875c Merge branch 'bugfix/dont_log_before_bss_inited' into 'master'
Remove ESP_EARLY_LOGI before bss is initialized; it crashes the CPU

There's an ESP_EARLY_LOGI line that can get called before the BSS is initialized; the early logging code doesn't cope well with that: it checks if FreeRTOS is up, but the variables it uses for that contains garbage because it isn't cleared yet, giving the wrong result. The logging code then tries to set a mux, crashing the entire system. This patch removes the log line and adds a warning at the BSS initialization line not to do anything complex before that point.

Fixes https://github.com/espressif/esp-idf/issues/523

See merge request !671
2017-04-18 11:21:31 +08:00
Alexey Gerenkov
55f1a63faf esp32: Adds functionality for application tracing over JTAG
- Implements application tracing module which allows to send arbitrary
   data to host over JTAG. This feature is useful for analyzing
   program modules behavior, dumping run-time application data etc.
 - Implements printf-like logging functions on top of apptrace module.
   This feature is a kind of semihosted printf functionality with lower
   overhead and impact on system behaviour as compared to standard printf.
2017-04-17 23:26:29 +03:00
Ivan Grokhotkov
639557d975 trace: add Kconfig options for app level trace
CONFIG_MEMMAP_TRACEMEM is now a hidden underlying option, which can be enabled using either CONFIG_ESP32_TRAX or CONFIG_ESP32_APP_TRACE
2017-04-17 22:19:14 +03:00
Jeroen Domburg
76a4082de7 Remove ESP_EARLY_LOGI before bss is initialized; it crashes the CPU 2017-04-16 23:34:03 +08:00
Jeroen Domburg
0b79d07d34 add detection of invalid cache access
- fix level 4 interrupt vectors to produce correct backtrace
- initialize invalid cache access interrupt on startup
- handle invalid cache access in panic handler
2017-04-13 15:27:38 +08:00
Ivan Grokhotkov
7ee8ee8b7e soc: add source code of rtc_clk, rtc_pm 2017-04-11 15:45:54 +08:00
Ivan Grokhotkov
8915c18f8a esp32: initialize cross-core interrupt in single core mode
The software interrupt originally used as the cross-core interrupt is
now also used to yield from a FreeRTOS critical section; therefore it
must be initialized for single core mode as well.

Fixes https://github.com/espressif/esp-idf/issues/496
2017-04-07 14:48:08 +08:00
Alexey Gerenkov
c142b9b9e5 esp32: RWDT is used to reboot system in case of panic handler crash
also fixes TG1WDG protection bug in panic handler
2017-04-07 02:34:29 +03:00
Ivan Grokhotkov
6ad0a157e3 driver/rtc: add APIs to enable/disable hold function 2017-03-24 10:11:13 +08:00
Jeroen Domburg
0db8b00b8a tight 28k 2017-03-08 19:04:28 +08:00
XiaXiaotian
bb0298bc71 coexist: enable coexist when wifi&bt are enabled, disable coexist when one of wifi&bt is disabled. 2017-02-20 23:53:25 +08:00
XiaXiaotian
eb14284c92 disable PHY and RF when stop WiFi and disable BT
1. Add disable PHY and RF when WiFi and BT are both disabled(including call sniffer disable API).

2. Do not init PHY and RF when cpu start. Init PHY and RF when call Wifi or BT start APIs(including sniffer enable API).

3. Add a temporary lib: librtc_clk.a and will delete it when CPU frequency switching function is done.

4. Add an function to get OS tick rate.

5. Do not put the whole pp.a in iram0, only put lmac.o, ieee80211_misc.o, ets_time.o and wdev.o in iram0.
2017-02-17 10:24:54 +08:00
Ivan Grokhotkov
777816cb99 phy_init: don’t rewrite valid calibration data
In the default PHY init routine, calibration data is loaded from NVS.
Most of the time the incremental changes to calibration will be fairly
small, so we don’t need to rewrite the existing calibration data stored
in the NVS.

Possible enhancement to be done in the future: expose a function in PHY
library to tell how big was the change in calibration data. If the
change was significant, then calibration data stored in NVS should be
updated.
2017-02-07 15:14:45 +08:00
Alexey Gerenkov
04acc88023 esp32: Fixes watchdog problem when printing core dump to uart
Also fixes generation of core dumps when flash cache is disabled
2017-02-01 18:39:28 +03:00
me-no-dev
865b21d5a1 Fix compilation if CONSOLE_UART is set to NONE
CONFIG_CONSOLE_UART_BAUDRATE is not defined
2017-01-18 15:36:10 +02:00
Ivan Grokhotkov
f20135af54 esp32: compile PHY-related code only when WiFi is enabled
Fixes https://github.com/espressif/esp-idf/issues/230, https://github.com/espressif/esp-idf/issues/237
2017-01-16 02:38:32 +08:00
Alexey Gerenkov
ad66fbe5ad esp32: Fixes issues discussed during code review of MR!341
The following issues mentioned during MR!341 review were fixed:
1) Core dump test application description
2) Usage of CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH and CONFIG_ESP32_ENABLE_COREDUMP_TO_UART
3) FLASH_GUARD_START macro usage is fixed in flash API
4) Core dump module logging facility
5) cache util functions doc updated
6) interactive delay before print core dump to uart
7) core dump partion support in build system
2017-01-12 19:38:19 +03:00
Alexey Gerenkov
39ddc7b836 esp32: Fixes several issues in core dump feature
1) PS is fixed up to allow GDB backtrace to work properly
2) MR!341 discussion: in core dump module: esp_panicPutXXX was replaced by ets_printf.
3) MR!341 discussion: core dump flash magic number was changed.
4) MR!341 discussion: SPI flash access API was redesigned to allow flexible critical section management.
5) test app for core dump feature was added
6) fixed base64 file reading issues on Windows platform
7) now raw bin core file is deleted upon core loader failure by epscoredump.py
2017-01-11 20:51:28 +03:00
Alexey Gerenkov
23f836659d esp32: Add core dump printing to UART feature 2017-01-11 20:51:28 +03:00
Alexey Gerenkov
4a3e160888 esp32: Add core dump saving to flash feature
Complimentary changes:
1) Partition table definitions files with core dump partition
2) Special sub-type for core dump partition
3) Special version of spi_flash_xxx
4) espcoredump.py is script to get core dump from flash and print useful info
5) FreeRTOS API was extended to get tasks snapshots
2017-01-11 20:51:28 +03:00
Ivan Grokhotkov
35115885c5 deep sleep: add API to control power down 2016-12-16 14:30:27 +08:00
Jeroen Domburg
78161a1fe3 Replace non-multicore-aware rom funcs with multicore-aware funcs, ESP_LOG->ESP_EARLY_LOG fix, reserve ints used in wireless libs. Fixes WiFi crashing 2016-12-13 13:24:01 +08:00
Jeroen Domburg
655fd2986a Add interrupt allocation scheme / interrupt sharing. Also modifies drivers and examples. Also allows interrupts
to be marked specifically as having a handler that's all in IRAM.
2016-12-08 12:39:33 +08:00
Ivan Grokhotkov
e3eff5deb9 cpu_start: tabs->spaces 2016-12-08 10:20:12 +08:00
Ivan Grokhotkov
13d802262a cpu_start: disable boot watchdog only after starting the main task
Boot watchdogs were disabled very early in startup code. It was possible to introduce an infinite loop anywhere in the many functions called from startup code, and this would not be detected by interrupt watchdog and task watchdog. This change postpones disabling of boot watchdogs to the point when the scheduler is running. Also replaces register expressed using integer address with a name.
2016-12-08 01:42:37 +08:00
Ivan Grokhotkov
b3f6cd08db support for console redirection to other UART
This change adds a set of menuconfig options to set custom UART#, baud rate, and pins, for console output.
Setting happens in bootloader startup code for PRO CPU, and in application startup code for APP CPU.
Ref. TW8146
2016-12-08 01:42:37 +08:00
Tian Hao
5a9801aca7 Merge branch 'master' into feature/btdm_bluedroid
# Conflicts:
#	components/esp32/cpu_freq.c
#	components/esp32/lib
2016-11-29 18:38:37 +08:00
Tian Hao
b5f03a36d5 component/bt : fix sw coexit call mistake 2016-11-24 20:09:52 +08:00
Tian Hao
55e0690f69 component/bt : wifi/bt software coexist option
1. option of sw coexist
2. cpu set freq function modify
3. update lib
4. ld add static data address
2016-11-24 19:57:47 +08:00
Ivan Grokhotkov
46a39b1e0f catch log output from WiFi libs 2016-11-22 21:14:36 +08:00
Ivan Grokhotkov
8b2f933a51 Implement system_* APIs in IDF 2016-11-22 21:14:36 +08:00
Ivan Grokhotkov
541b142654 phy_init: reduce the amount of hardwired logic, add coexist init 2016-11-18 20:11:17 +08:00
Ivan Grokhotkov
4db29f74a0 add PHY init support 2016-11-18 20:11:16 +08:00
Ivan Grokhotkov
6dd3681115 fix order of creation of standard streams
With existing order, file descriptors assigned to stdin, stdout, stderr didn't match standard assignment.
https://github.com/espressif/esp-idf/issues/67
2016-11-08 20:17:08 +08:00
Ivan Grokhotkov
2fa00ebd90 ld scripts: fix overlap between bootloader and application IRAM ranges 2016-11-04 12:18:57 +08:00
Ivan Grokhotkov
c534dedf2d newlib: implement time syscalls 2016-11-02 17:31:35 +08:00
Ivan Grokhotkov
f18c1f13b1 Merge branch 'feature/deepsleep_stub_linker' into 'master'
Deep sleep: Any source named rtc_wake_stub* is linked as RTC wake stub code

Also move esp_deepsleep.h documentation out to docs/deep-sleep-stub.rst

See merge request !142
2016-11-01 22:27:13 +08:00
Jeroen Domburg
ffeffcd315 Merge branch 'feature/crosscore_int' into 'master'
Add cross-core int to accelerate task being awoken from another CPU.

This adds a per-CPU interrupt that can be used to poke the CPU to go do something. In this case all that is implemented is a request to yield the current task, used in case a CPU unblocks a task that runs on another CPU. This gets rid of the limitation that inter-CPU communication using queues, muxes etc can take up to a FreeRTOS tick to happen.

Specs!
Sending an in in a queue of length 1 (essentially a semaphore) as quickly as possible (just a small delay in the sender, to make sure the receiver task gets swapped out) for 10 seconds. Number indicates the amount of ints transferred

Old code:

CPU0->CPU0: 42986

CPU0->CPU1,: 2999

New code:

CPU0->CPU0: 42868

CPU0->CPU1: 62073

See merge request !155
2016-10-31 11:04:28 +08:00
Ivan Grokhotkov
6f1d3ce4a7 vfs: code review fixes
- fix typo in readme
- remove unneeded extern declaration
- fix header guard macro
- tabs->spaces in syscalls.c
- spaces->tabs in tasks.c
2016-10-27 17:25:38 +08:00
Ivan Grokhotkov
7e201c5527 vfs and newlib: small fixes
- spaces->tabs in tasks.c
- update vfs_uart.c to use per-UART locks
- add license to vfs_uart.c
- allocate separate streams for stdout, stdin, stderr, so that they can be independently reassigned
- fix build system test failure
- use posix off_t instead of newlib internal _off_t
2016-10-27 17:22:18 +08:00
Ivan Grokhotkov
0c130ecf19 vfs: code review fixes
- fix typo in readme
- remove unneeded extern declaration
- fix header guard macro
- tabs->spaces in syscalls.c (+1 squashed commit)
- fix minor typos
2016-10-27 17:21:17 +08:00
Ivan Grokhotkov
b3b8334d54 vfs and newlib: small fixes
- spaces->tabs in tasks.c
- update vfs_uart.c to use per-UART locks
- add license to vfs_uart.c
- allocate separate streams for stdout, stdin, stderr, so that they can be independently reassigned
- fix build system test failure
2016-10-27 17:19:39 +08:00
Jeroen Domburg
68f39c1ed9 Only init crosscore when FreeRTOS runs in multicore mode, add warnings that cross_int calls are private. 2016-10-27 16:50:28 +08:00
Jeroen Domburg
c6477ff10d Fix int clear, actually call int init code 2016-10-27 12:37:19 +08:00
Jeroen Domburg
ff6b8addd9 Fix panic config ifdefs, un-stall app cpu on boot so it restarts after panic 2016-10-27 11:17:24 +08:00
Jeroen Domburg
7d254eb3f0 Move panic handler and gdbstub into esp32 component, clean up wdt according to merge req suggestions 2016-10-26 12:23:01 +08:00
Jeroen Domburg
6f96b23989 Merge in master updates 2016-10-26 11:04:42 +08:00
Jeroen Domburg
ae5c563080 Brownout works (in as far brownout can work...), int wdt works. 2016-10-21 19:30:29 +08:00
Jeroen Domburg
53146799a0 Initial addition of wdt and brownout code 2016-10-21 17:59:57 +08:00
Angus Gratton
da70611196 Deep sleep: Any source named rtc_wake_stub* is linked as RTC wake stub code
Also move esp_deepsleep.h documentation out to docs/deep-sleep-stub.rst
2016-10-19 15:58:37 +11:00
Jeroen Domburg
0aab006bb7 Add Trax-support to esp-idf 2016-10-17 12:18:17 +08:00
Angus Gratton
e6479ef314 app_main: Return type to void
Result is not checked
2016-09-27 19:30:43 +10:00
Ivan Grokhotkov
991fde1f9d compoenents/esp32: don't alias start_cpu1 to start_cpu0_default 2016-09-26 15:58:58 +08:00
Ivan Grokhotkov
7cef0308dc Change application entry point name back to app_main 2016-09-26 14:48:41 +08:00
Ivan Grokhotkov
dabe53f082 Merge branch 'master' into feature/init_refactoring
* master:
  components/spi_flash: remove stray level of indentation
  components/nvs: fix broken sentences in comment blocks
  Roll back submodule version
  Spinlocks already come initialized. Remove the code that would essentially re-initialize them at runtime
  Remove all references to prvLockQueue / prvUnlockQueue
  components/esp32: clean up unused function warnings in single core mode
  clean up warnings
  components/nvs: fix build, use log library instead of printf
  components/spi_flash: add flash operation counters option to Kconfig
  components/nvs: add erase function
  components/nvs: fix formatting
  components/nvs: batch writes when possible
  components/spi_flash: add performance counters
  components/nvs: maintain item hash list at page level
  components/nvs: avoid reading just-erased page

# Conflicts:
#	components/esp32/cpu_start.c
#	components/esp32/event_default_handlers.c
2016-09-26 14:35:09 +08:00
Ivan Grokhotkov
62aaec630c components/esp32: remove "_user" part from entry points, weaken start_cpu0/1
With this change applications can override very early part of startup procedure by implementing "start_cpu0" and "start_cpu1" functions.
2016-09-26 12:29:00 +08:00
Angus Gratton
3ccec16706 Merge branch 'bugfix/clean_up_warnings' into 'master'
Clean up warnings and remove unused parts of FreeRTOS

For third party components (lwip and expat), compilation flags are adjusted to silence existing warnings (i have manually checked that all warnings are benign).
In components/esp32, replaced use of WIFI_DEBUG with ESP_LOG functions.

Additionally prvLockQueue/prvUnlockQueue have been removed, dragging some other bits of FreeRTOS along.

Original issue: https://github.com/espressif/esp-idf/issues/18

See merge request !111
2016-09-26 08:16:31 +08:00
Ivan Grokhotkov
b190dc3e9f components/lwip,esp32: fixes for C++
- put contents of a few headers into c++ guard blocks
- fix off-by-one error in do_global_ctors
- remove system_init from startup code (should be called from main)
2016-09-26 03:05:25 +08:00
Ivan Grokhotkov
b936441b9b Startup flow refactoring
This change removes implicit WiFi/BT initialization from startup code.
"main" task is started once essential part of startup code is complete.
This task calls application-provided "int main(void)" function, which can call WiFi/BT init functions if necessary.
2016-09-26 00:50:57 +08:00
Ivan Grokhotkov
6718e321f2 components/esp32: clean up unused function warnings in single core mode 2016-09-23 15:02:17 +08:00
snake
993287af61 add btdm_controller 1st 2016-09-22 16:40:31 +08:00
Ivan Grokhotkov
da69d6ad3c Merge branch 'master' into feature/menuconfig_cpu_frequency_option
* master: (57 commits)
  components/lwip: fix grammar
  components/lwip: make SO_REUSE configurable via menuconfig
  bootloader: remove trailing newlines from log messages
  components/freertos: override per-task __cleanup handler to close stdin, stdout, stderr
  components/esp32: move peripheral symbols to separate ld script
  components/log: regroup macros for better readability
  gitlab-ci: allow running tests for branches, triggered via API
  components/log: fix timestamp calculation
  components/log: set default runtime log level to ESP_LOG_VERBOSE
  components/log: fix error when using ESP_LOGx from C++ code
  components/log: fix bugs, add options to override log level for files, components, and bootloader
  fix ledc and spi typo
  remove prefix and postfix
  Enable SO_REUSEADDR in LWIP
  freertos: fix memory debug macro issue Define configENABLE_MEMORY_DEBUG according to CONFIG_ENABLE_MEMORY_DEBUG
  peripheral structure headers: move volatile keyword from members to typedef
  Adding -fstrict-volatile-bitfields to the CFLAGS/CXXFLAGS. Without this, gcc tries to access bitfields using the smallest possible methods (eg l8i to grab an 8-bit field from a 32-bit). Our hardware does not like that. This flag tells gcc that if a bitfield is volatile, it should always use the type the field is defined at (uint32_t in our case) to size its access to the field. This fixes accessing the hardware through the xxx_struct.h headers.
  add peripheral  module struct headers
  build system docs: Add note about no spaces in component names
  Docs: Add note about unusual submodule messages when cloning on Windows
  ...

# Conflicts:
#	components/esp32/cpu_start.c
#	components/esp32/include/soc/cpu.h
2016-09-20 17:22:18 +08:00
Ivan Grokhotkov
b0683b0bb4 components/esp32,bootloader: fix build
esp32: use new register name in cpu_start
bootloader: EXTRA_CFLAGS don't work any more, set global CFLAGS in Makefile.projbuild
2016-09-15 02:37:54 +08:00
Ivan Grokhotkov
90e37d9eda fix whitespace after merge 2016-09-15 02:17:08 +08:00
Ivan Grokhotkov
cf22e4445a Merge branch 'master' into feature/logging
* master: (45 commits)
  esp32/lib: update to 1303c92c
  dhcpserver: Fix crash when switching wifi mode
  mbedtls: Temporarily disable default hardware crypto SHA & bignum
  mbedtls hwcrypto sha512: Fix redirection of function names
  mbedtls upstream tweak: Move mbedtls_sha512_process in sha512.h
  Format code by using 4 spaces instead
  modify  character conversion error and typo
  modify i2s_reg.h, rebase to master
  Only modify headers in soc/ . Pass compiling under esp-idf-tests/merge_soc_tmp/merge_for_soc_headers branch.(only change some names of register and INUM).
  Rename vender_ie_type_t and vendor_ie_id_t to wifi_vendor_ie_type_t and wifi_vendor_ie_id_t respectively
  modify arguments for vendor ie APIs by using enum instead
  esp32: fix typo
  esp32: fix kconfig
  define lwip task priority in esp_task.h
  components: esp32 - fix build error
  components: lwip - Modify lwip task priority and stack definition method
  components: esp32
  components: esp32
  components: esp32/lwip
  task priority: modify lwip/wifi/event task priority
  ...

# Conflicts:
#	components/bootloader/src/main/bootloader_start.c
#	components/bootloader/src/main/flash_encrypt.c
#	components/bootloader/src/main/secure_boot.c
#	components/esp32/cpu_start.c
2016-09-15 02:15:50 +08:00
Ivan Grokhotkov
0290a34b55 components/esp32: clean up cpu_start
Move CPU region protection setup into soc/cpu.h
change tabs to spaces
remove unused extern declarations
use RTC_WDTCONFIG0 instead of numeric address (still need to fix BB reg)
2016-09-15 02:03:55 +08:00
Ivan Grokhotkov
716cec5ded components/log: add implementation, update a few components to use it
This also removes logging implementation from bootloader and replaces it
with the one provided by the log component. Some occurrences of printf
and ets_printf have been changed to ESP_LOGx APIs.
2016-09-15 00:53:33 +08:00
Ivan Grokhotkov
066f3358a7 components/esp32: use APB_CLK_FREQ instead of a number 2016-09-14 17:54:34 +08:00
Ivan Grokhotkov
5ab769516d components/esp32: add CPU frequency selection in menuconfig
Note that with WiFi stack enabled, system_init will reset frequency to 240MHz.
To make this setting useful, esp32-wifi-libs submodule needs to be updated.
2016-09-14 17:54:34 +08:00
Wangjialin
41d397cf3f Only modify headers in soc/ .
Pass compiling under esp-idf-tests/merge_soc_tmp/merge_for_soc_headers branch.(only change some names of register and INUM).
2016-09-14 13:47:28 +08:00