Commit graph

471 commits

Author SHA1 Message Date
Jiang Jiang Jian 1a7d0b3b6f Merge branch 'bugfix/esp32s2_rng' into 'master'
soc: esp32s2: fix address of WDEV_RND_REG

Closes IDF-1390

See merge request espressif/esp-idf!7640
2020-02-18 19:07:51 +08:00
Ivan Grokhotkov 19c2337168 soc: esp32s2: fix address of WDEV_RND_REG
Ref. ESP32-S2 TRM.

Closes IDF-1390
2020-02-18 08:24:33 +01:00
xiongyu 61778d5b7c bugfix(i2s): fix adc output invert issue 2020-02-17 17:15:01 +08:00
Krzysztof Budzynski 41bc06b9b9 Merge branch 'bugfix/docs_ledc' into 'master'
drivers: Remove high speed mode from LEDC docs for ESP32-S2, update headers to match

See merge request espressif/esp-idf!7532
2020-02-17 05:00:36 +08:00
Jiang Jiang Jian cedea18acb Merge branch 'bugfix/wifi_clear_phy_status_when_cpu_start' into 'master'
soc: clear PHY status when cpu start

Closes AUD-1125

See merge request espressif/esp-idf!7493
2020-02-12 15:34:46 +08:00
Renz Christian Bagaporo 16e0c93e40 ci: solve public headers errors 2020-02-11 14:30:42 +05:00
Renz Christian Bagaporo b675df4b08 soc: use include_next for including common touch sensor hal header 2020-02-11 14:30:42 +05:00
Renz Christian Bagaporo 1f2e2fe8af soc: separate abstraction, description and implementation 2020-02-11 14:30:42 +05:00
Angus Gratton ea34f3bb27 drivers: Remove high speed mode from LEDC docs for ESP32-S2, update headers to match 2020-02-11 14:36:47 +11:00
Andrei Gramakov 4e8b4b9e49 soc: add USB peripheral register definitions, hal level, reg map, etc 2020-02-10 08:33:39 +00:00
Konstantin Kondrashov daa9c30c8e rmt/esp32s2: Update RMT: reg, struct, LL and test_utils/ref_clock.c 2020-02-09 20:03:31 +08:00
Ivan Grokhotkov 4bfd0b961b Merge branch 'fix/spi_on_esp32s2' into 'master'
spi: support esp32s2

See merge request espressif/esp-idf!7432
2020-02-09 19:45:16 +08:00
Ivan Grokhotkov 98bb3772e0 soc: spi_flash LL fixes 2020-02-07 16:18:31 +01:00
Wangjialin aaf119e930 flash(esp32s2): fix setting address field in spi user mode. 2020-02-07 16:10:51 +01:00
Angus Gratton 11fac8637a docs: Resolve doxygen & Sphinx warnings 2020-02-07 16:37:45 +11:00
Angus Gratton fda4efa300 Merge branch 'bugfix/rtc_wdt_timeout' into 'master'
soc/esp32s2: Fix setting timeout for RTC_WDT. ESP32-S2 uses 90KHz instead of 150kHz

See merge request espressif/esp-idf!7499
2020-02-06 14:27:35 +08:00
Konstantin Kondrashov 739eb05bb9 esp32: add implementation of esp_timer based on TG0 LAC timer
Closes: IDF-979
2020-02-06 14:00:18 +08:00
KonstantinKondrashov 47a5d14e59 soc/esp32s2: Fix setting timeout for RTC_WDT. ESP32-S2 uses 90KHz instead of 150kHz 2020-02-05 15:16:28 +08:00
Ivan Grokhotkov 50466a5e4f Merge branch 'bugfix/esp32s2_ldscripts' into 'master'
esp32s2: LD script fixes/improvements and re-enable SystemView examples

Closes IDF-1357, IDF-1354, and IDF-1346

See merge request espressif/esp-idf!7431
2020-02-05 02:09:29 +08:00
Xia Xiaotian 1833b8aeab soc: clear PHY status when cpu start 2020-02-04 14:37:16 +08:00
Michael (XIAO Xufeng) 7026087dc0 spi: support esp32s2 2020-01-26 17:24:12 +08:00
Michael (XIAO Xufeng) 9d41829e09 spi: update esp32s2 hardware description files 2020-01-26 17:24:11 +08:00
Ivan Grokhotkov 3eb190ce48 esp32s2: fix interrupt names used by SystemView 2020-01-24 10:48:38 +01:00
Ivan Grokhotkov 02a99e84c8 esp32s2: move trace memory reservation to soc_memory_layout.c 2020-01-24 10:48:38 +01:00
Ivan Grokhotkov 354ce68dce soc: move reserved regions out of memory_layout_utils.c
These definitions have ended up being chip specific. Moving them into
respective soc_memory_layout.c makes the whole picture of memory
regions easier to see, and also makes adding support for new chips
easier.
2020-01-24 10:48:20 +01:00
Ivan Grokhotkov caef7ad9f2 esp32, esp32s2beta: move brownout.c to esp_common 2020-01-23 13:44:19 +01:00
Ivan Grokhotkov 70752baba4 esp32s2: add brownout detector support
1. add brownout detector HAL for esp32 and esp32s2
2. enable brownout reset for esp32 rev. 1 and above
3. add approximate brownout detector levels for esp32s2
2020-01-23 13:44:19 +01:00
Ivan Grokhotkov 46035032cf esp32s2: fix inconsistency between reg and struct headers
test_mux register doesn't exist in RTCCNTL anymore, remove it from
struct header. Also remove adc_ll_vref_output implementation, which
depends on that register.
2020-01-23 11:30:11 +01:00
morris e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
morris 95743f4ee6 update rtc_sleep_init for esp32s2 2020-01-22 10:19:05 +08:00
Felipe Neves 73592d9bc4 spin_lock: added new spinlock interface and decoupled it from RTOS
spin_lock: cleaned-up port files and removed portmux files

components/soc: decoupled compare and set operations from FreeRTOS

soc/spinlock: filled initial implementation of spinlock refactor

It will decouple the spinlocks into separated components with not depencences of freertos
an similar interface was provided focusing the readabillity and maintenance, also
naming to spinlocks were adopted. On FreeRTOS side the legacy portMUX macros
gained a form of wrapper functions that calls the spinlocks component thus
minimizing the impact on RTOS side.

This feature aims to close IDF-967

soc/spinlock: spinlocks passed on unit test, missing test corner cases

components/compare_set: added better function namings plus minor performance optimization on spinlocks

soc/spinlock: code reordering to remove ISC C90 mix error

freertos/portmacro: gor rid of critical sections multiline macros, placed inline functions instead

soc/spinlock: improved spinlock performance from internal RAM

For cases where the spinlock is executed from IRAM, there is no
need to check where the spinlock object is placed on memory,
removing this checks caused a great improvement on performance.
2020-01-22 06:20:34 +08:00
morris 2422c52851 global: hello world on real esp32-s2 2020-01-16 17:43:59 +08:00
Wangjialin d4e5980823 flash: fix 80Mhz for new spi flash driver on esp32s2 2020-01-16 17:43:59 +08:00
Wangjialin fad639f0d4 feature(psram): update psram initialization.
1. use spi functions in rom
2. remove unnecessary GPIO configurations.
3. remove unnecessary dummy settings.
4. enable dummy out function
5. flash and psram have independent timing setting registers.
6. no need to set 1.9v for LDO in 80Mhz
7. set IO driver ability to 1 by default.
8. no need to use GPIO matrix on esp32s2, IO MUX is recommended
9. enable spi clock mode and IO mode settings
2020-01-16 17:41:31 +08:00
morris 1c2cc5430e global: bring up esp32s2(not beta) 2020-01-16 17:41:31 +08:00
Angus Gratton c7738f24fc Merge branch 'bugfix/ledc_driver_enums' into 'master'
driver: Avoid possible accidental mismatch between ledc_clk_src_t & ledc_clk_cfg_t enum

See merge request espressif/esp-idf!7021
2020-01-10 15:34:43 +08:00
Angus Gratton 782fc0df5f Merge branch 'refactor/can_driver' into 'master'
Refactor CAN to use HAL and LowLevel layers

Closes IDF-617

See merge request espressif/esp-idf!7019
2020-01-10 14:22:02 +08:00
Darian Leung a049e02d96 can: Refactor CAN to use HAL and LowLevel layers
The following commit refactors the CAN driver such that
it is split into HAL and Lowlevel layers. The following
changes have also been made:

- Added bit field members to can_message_t as alternative
  to message flags. Updated examples and docs accordingly
- Register field names and fields of can_dev_t updated
2020-01-09 16:13:51 +08:00
suda-morris 1ffb546135 esp32s2:remove unsupported xtal choice
ESP32-S2 only supports 40MHz XTAL and doesn't have XTAL autodetection.
2020-01-09 13:09:21 +08:00
michael f676a3b190 driver, soc: update multichip support headers 2020-01-06 17:13:54 +08:00
Ivan Grokhotkov 52f8aa2adb Merge branch 'feature/heap_non_os_build' into 'master'
heap: make compatible with non-OS builds, remove target dependence

Closes IDF-1236

See merge request espressif/esp-idf!7051
2020-01-03 17:12:51 +08:00
Angus Gratton 7dc7557aa9 soc: Fix esp_ptr_executable() for single core ESP32 config & cache memory
In single core mode, APP CPU cache region is added to the available range.
2020-01-03 17:31:40 +11:00
Ivan Grokhotkov d9534b3d6a soc: fix backtraces containing ROM functions
esp_ptr_executable would return false for pointers to ROM, which would
interrupt the backtrace. This makes ROM ranges recognized as
executable.
2020-01-02 18:42:46 +01:00
Ivan Grokhotkov 4bbfa6e494 Merge branch 'feature/soc_ledc_caps' into 'master'
soc: add ledc_caps.h, replace target-based ifdefs with caps-based

See merge request espressif/esp-idf!6858
2019-12-30 18:47:11 +08:00
Angus Gratton bc02b128be Merge branch 'feature/add_eth_download_test' into 'master'
ethernet: test download blob && phy addr auto detect

Closes IDF-1238

See merge request espressif/esp-idf!6957
2019-12-30 11:52:40 +08:00
Ivan Grokhotkov e4d45608d3 soc: add ledc_caps.h, replace target-based ifdefs with caps-based 2019-12-28 20:33:21 +00:00
Ivan Grokhotkov 3285ed116d heap: make compatible with non-OS builds, remove target dependence 2019-12-27 12:40:06 +01:00
Michael (XIAO Xufeng) 72cf67cba3 sdio_slave_hal: fix the TAG non-static issue
(MINOR CHANGE)
2019-12-24 16:50:09 +08:00
morris 7baf7ce273 ethernet: optimise tx and rx 2019-12-24 11:18:31 +08:00
Ivan Grokhotkov c029888bf1 Merge branch 'fix/spi_ut_esp32s2beta' into 'master'
spi: re-enable the unit tests for esp32s2beta

Closes IDF-1020

See merge request espressif/esp-idf!6327
2019-12-23 15:10:31 +08:00