Commit graph

292 commits

Author SHA1 Message Date
fuzhibo 0c2bf7c8bc rtcio: add hal for driver 2019-11-21 10:40:49 +08:00
Angus Gratton b30b0e59fa Merge branch 'feature/add_rmt_hal' into 'master'
rmt: add hal layer and new examples

Closes IDF-841, IDF-844, and IDF-857

See merge request espressif/esp-idf!5649
2019-11-21 09:53:54 +08:00
Angus Gratton 95b9b41258 Merge branch 'bugfix/ethernet_add_reference_counter' into 'master'
ethernet: add reference counter for mac and phy && add gpio config outof Kconfig

Closes IDF-1056

See merge request espressif/esp-idf!6682
2019-11-21 06:58:13 +08:00
morris 8fd8695ea1 rmt: add HAL layer 2019-11-20 10:54:21 +08:00
suda-morris 05d71319de ethernet: add gpio number into config structure 2019-11-20 10:36:45 +08:00
xiongyu 8c76a3c10d refactor(i2s): add hal i2s driver 2019-11-19 22:19:19 +08:00
xiongyu b1a72866ca refactor(pcnt): add hal pcnt driver 2019-11-18 14:35:46 +08:00
KonstantinKondrashov e3ff160733 soc/esp32: Add test_env for 32kHz XTAL unit tests 2019-10-31 13:23:47 +08:00
Angus Gratton 8675a818f9 Merge branch 'master' into feature/esp32s2beta_merge 2019-10-22 13:51:49 +11:00
Ivan Grokhotkov c7d8ef52ca Merge branch 'fix/esp_flash_no_qe' into 'master'
esp_flash: fix the QE write issue in high freq, and support UT for external chips

Closes IDF-888

See merge request espressif/esp-idf!5736
2019-10-20 13:59:30 +08:00
Angus Gratton ae21d669b9 Merge branch 'master' into feature/esp32s2beta_merge 2019-10-17 18:22:08 +11:00
Darian 820fd6447d can: Add support for lower bit rates
This commit adds support for lower bit rates in the CAN Driver for
ESP32 Rev 2 or later chips.
2019-10-17 12:33:17 +08:00
Angus Gratton f5238d5e42 Merge branch 'feature/esp32s2beta' into feature/esp32s2beta_merge 2019-10-15 15:03:45 +11:00
Angus Gratton 496ede9bcd Merge branch 'master' into feature/esp32s2beta_merge 2019-10-15 14:59:27 +11:00
Michael (XIAO Xufeng) 571864e8ae esp_flash: fix set qe bit and write command issues
There used to be dummy phase before out phase in common command
transactions. This corrupts the data.

The code before never actually operate (clear) the QE bit, once it finds
the QE bit is set. It's hard to check whether the QE set/disable
functions work well.

This commit:

1. Cancel the dummy phase

2. Set and clear the QE bit according to chip settings, allowing tests
   for QE bits. However for some chips (Winbond for example), it's not
   forced to clear the QE bit if not able to.

3. Also refactor to allow chip_generic and other chips to share the same
   code to read and write qe bit; let common command and read command share
   configure_host_io_mode.

4. Rename read mode to io mode since maybe we will write data with quad
   mode one day.
2019-10-14 17:25:58 +08:00
suda-morris 13c128fd31 Ethernet: optimize and bugfix
1. simplify deallocate in esp_eth_mac_new_esp32, esp_eth_mac_new_dm9051
2. remove blocking operation in os timer callback
3. check buffer size in ethernet receive function
2019-10-11 12:15:17 +08:00
KonstantinKondrashov c5c41eab46 soc: Add interrupt numbers mapping for esp32s2beta
Closes: IDF-999
2019-09-26 00:22:36 +08:00
Angus Gratton adfc06a530 Merge branch 'master' into feature/esp32s2beta_merge 2019-09-20 10:28:37 +10:00
Jack 95ec36afd4 dport: remove clock_en and reset bitname which is not suitable 2019-09-13 09:44:07 +10:00
Angus Gratton 33a186f630 soc: Remove deprecated LEDC struct register names (bit_num, div_num)
Deprecated since ESP-IDF V3.0
2019-09-13 09:44:07 +10:00
Angus Gratton 6195c69701 soc: remove deprecated io_mux PIN_PULLxxx_yyy macros
Deprecated before ESP-IDF V1.0!
2019-09-13 09:44:07 +10:00
Angus Gratton 11c1da5276 soc/pm: Remove deprecated use of rtc_cpu_freq_t enum
Removes deprecated ways of setting/getting CPU freq, light sleep freqs.

Deprecated since ESP-IDF V3.2
2019-09-13 09:44:07 +10:00
Angus Gratton 35147119f1 Merge branch 'feature/support_ut_esp32s2beta' into 'feature/esp32s2beta'
ci: support build and run UT for esp32s2beta

See merge request espressif/esp-idf!5702
2019-09-09 08:34:16 +08:00
Li Shuai bd29202520 1. Fix backtrace is incomplete
2. Optimization code style
2019-09-05 18:40:33 +08:00
Angus Gratton e44df658d5 spiram: Fix ESP32 SPIRAM when using SPIRAM_TYPE_AUTO, disable "AUTO" for ESP32-S2
Requirement to enable for ESP32-S2 captured in IDF-912.
2019-09-04 10:53:25 +10:00
Michael (XIAO Xufeng) 43135dc348 spi: convenient LL macro 2019-09-04 10:53:25 +10:00
Michael (XIAO Xufeng) 05739798c3 soc: s2beta support 2019-09-04 10:53:25 +10:00
Angus Gratton 6990a7cd54 Merge branch 'master' into feature/esp32s2beta_update 2019-08-19 15:03:43 +10:00
Angus Gratton 367ecc2d60 Merge branch 'refactor/timerg_in_test' into 'master'
timer_group: refactoring to avoid direct register access in the ISR

See merge request espressif/esp-idf!5656
2019-08-14 15:32:16 +08:00
suda-morris f86e82cb63 efuse: update the scheme of getting chip revision 2019-08-13 10:59:02 +08:00
Michael (XIAO Xufeng) feea477023 timer_group: add LL functions for WDT 2019-08-09 13:46:30 +08:00
Michael (XIAO Xufeng) c02981a99b timer_group: support interrupt LL and some utility functions in ISR 2019-08-09 13:46:30 +08:00
chenjianqiang a97fe5615f feat(timer): refator timer group driver (partly pick) 2019-08-09 13:46:29 +08:00
Angus Gratton 04ae56806c Merge branch 'master' into feature/esp32s2beta_update 2019-08-08 15:26:58 +10:00
Angus Gratton 24d26fccde Merge branch 'master' into feature/esp32s2beta_update 2019-08-08 13:44:24 +10:00
kooho 2139ca668d Update I2S driver for esp32s2beta. 2019-08-05 16:05:16 +08:00
Anton Maklakov afbaf74007 tools: Mass fixing of empty prototypes (for -Wstrict-prototypes) 2019-08-01 16:28:56 +07:00
kooho f98e7bbccf Update LEDC, PCNT,Timer_Group driver for esp32s2beta. 2019-07-31 16:03:22 +08:00
suda-morris 018de8101f ethernet: can build without enable esp32 emac
Closes https://github.com/espressif/esp-idf/issues/3770
2019-07-22 21:07:02 +08:00
Tomer Shefler 97ad2bcb86 ethernet: support giving 50mhz rmii clock with both 40mhz and 26 mhz rtc xtal
Merges https://github.com/espressif/esp-idf/pull/3769
Closes https://github.com/espressif/esp-idf/pull/3704
2019-07-22 21:07:02 +08:00
suda-morris af78311975 ethernet: malloc hal together with driver context 2019-07-22 21:07:02 +08:00
chenjianqiang 91ae40e2ff uart: multichip support 2019-07-18 15:57:00 +08:00
chenjianqiang 4cc962353c feat(uart): update uart driver for esp32s2beta 2019-07-18 15:57:00 +08:00
suda-morris cb42c29252 ethernet: support dm9051
1. move resource allocation from xxx_init to xxx_new
2. fix enabling tx checksum insertion by mistake
3. iperf example: enlarge max arguments
4. add examples for spi-ethernet

Closes https://github.com/espressif/esp-idf/issues/3715
Closes https://github.com/espressif/esp-idf/issues/3711
2019-07-04 19:38:13 +08:00
boarchuz b0168310db Typo correction
Merges https://github.com/espressif/esp-idf/pull/3604
2019-07-02 17:49:49 +08:00
Ivan Grokhotkov d7d91225d3 Merge branch 'feature/refactor_etherent_driver' into 'master'
add esp_eth component

Closes IDF-324, IDF-637, and IDFGH-1139

See merge request idf/esp-idf!5111
2019-06-28 03:44:44 +08:00
Michael (XIAO Xufeng) d6bd24ca67 esp_flash: add initialization interface for SPI devices 2019-06-27 13:27:27 +08:00
suda-morris 90c4827bd2 add esp_eth component 2019-06-26 10:19:23 +08:00
Michael (XIAO Xufeng) 17378fd4c2 spi: support new chip esp32s2beta 2019-06-23 12:17:27 +08:00
Michael (XIAO Xufeng) 9b13a04abf spi: multichip support
move hardcoded numbers, etc. into soc files.
create headers for shared types which needs to be documented.

(MINOR CHANGE)
2019-06-22 19:08:47 +08:00