dport: remove clock_en and reset bitname which is not suitable

This commit is contained in:
Jack 2019-09-05 12:35:14 +08:00 committed by Angus Gratton
parent 33a186f630
commit 95ec36afd4

View file

@ -961,7 +961,6 @@
#define DPORT_CAN_CLK_EN (BIT(19))
#define DPORT_I2C_EXT1_CLK_EN (BIT(18))
#define DPORT_PWM0_CLK_EN (BIT(17))
#define DPORT_SPI_CLK_EN_2 (BIT(16)) /** Deprecated, please use DPORT_SPI3_CLK_EN **/
#define DPORT_SPI3_CLK_EN (BIT(16))
#define DPORT_TIMERGROUP1_CLK_EN (BIT(15))
#define DPORT_EFUSE_CLK_EN (BIT(14))
@ -972,13 +971,11 @@
#define DPORT_RMT_CLK_EN (BIT(9))
#define DPORT_UHCI0_CLK_EN (BIT(8))
#define DPORT_I2C_EXT0_CLK_EN (BIT(7))
#define DPORT_SPI_CLK_EN (BIT(6)) /** Deprecated, please use DPORT_SPI2_CLK_EN **/
#define DPORT_SPI2_CLK_EN (BIT(6))
#define DPORT_UART1_CLK_EN (BIT(5))
#define DPORT_I2S0_CLK_EN (BIT(4))
#define DPORT_WDG_CLK_EN (BIT(3))
#define DPORT_UART_CLK_EN (BIT(2))
#define DPORT_SPI_CLK_EN_1 (BIT(1)) /** Deprecated, please use DPORT_SPI01_CLK_EN **/
#define DPORT_SPI01_CLK_EN (BIT(1))
#define DPORT_TIMERS_CLK_EN (BIT(0))
#define DPORT_PERIP_RST_EN_REG (DR_REG_DPORT_BASE + 0x0C4)
@ -998,7 +995,6 @@
#define DPORT_CAN_RST (BIT(19))
#define DPORT_I2C_EXT1_RST (BIT(18))
#define DPORT_PWM0_RST (BIT(17))
#define DPORT_SPI_RST_2 (BIT(16)) /** Deprecated, please use DPORT_SPI3_RST **/
#define DPORT_SPI3_RST (BIT(16))
#define DPORT_TIMERGROUP1_RST (BIT(15))
#define DPORT_EFUSE_RST (BIT(14))
@ -1009,13 +1005,11 @@
#define DPORT_RMT_RST (BIT(9))
#define DPORT_UHCI0_RST (BIT(8))
#define DPORT_I2C_EXT0_RST (BIT(7))
#define DPORT_SPI_RST (BIT(6)) /** Deprecated, please use DPORT_SPI2_RST **/
#define DPORT_SPI2_RST (BIT(6))
#define DPORT_UART1_RST (BIT(5))
#define DPORT_I2S0_RST (BIT(4))
#define DPORT_WDG_RST (BIT(3))
#define DPORT_UART_RST (BIT(2))
#define DPORT_SPI_RST_1 (BIT(1)) /** Deprecated, please use DPORT_SPI01_RST **/
#define DPORT_SPI01_RST (BIT(1))
#define DPORT_TIMERS_RST (BIT(0))
#define DPORT_SLAVE_SPI_CONFIG_REG (DR_REG_DPORT_BASE + 0x0C8)