Commit graph

86 commits

Author SHA1 Message Date
Angus Gratton
59381b60c0 Merge branch 'refactor/hal_function_set_exception_vector_table' into 'master'
soc: add hal api to set exception vector table base address

See merge request espressif/esp-idf!7905
2020-03-11 14:44:42 +08:00
Angus Gratton
f21079a06d Merge branch 'bugfix/duplicate_sdio_slave_hal' into 'master'
soc: remove duplicate sdio_slave_hal.c

See merge request espressif/esp-idf!7874
2020-03-09 13:35:58 +08:00
morris
8b6c0947c7 soc: add hal api to set exception vector table base address 2020-03-06 20:23:30 +08:00
Angus Gratton
a9854f7085 Merge branch 'feature/rmt_clock_support_ref_tick' into 'master'
rmt: support ref tick && refactor unit test && re-enable unit test on ESP32-S2

Closes IDFGH-1715

See merge request espressif/esp-idf!7614
2020-03-06 15:03:52 +08:00
Michael (XIAO Xufeng)
8e348dcdcd Merge branch 'bugfix/fix_driver_ut_i2s' into 'master'
bugfix(i2s): fix driver ut i2s

See merge request espressif/esp-idf!6946
2020-03-06 11:55:07 +08:00
Renz Bagaporo
5f3a689a89 soc: remove duplicate sdio_slave_hal.c 2020-03-05 12:47:54 +08:00
chaijie
66beaaef7d soc(rtc): modify rtc code in soc for esp32s2 2020-03-03 13:22:52 +00:00
morris
07088c6446 rmt: disable carrier feature by default 2020-03-03 20:14:46 +08:00
xiongyu
b3ae9fa978 bugfix(i2s): Updated ESP32-S2 ADC DAC support
* Delete the relevant codes of ADC DAC of ESP32-S2.
2020-03-03 12:59:30 +08:00
fuzhibo
3ad5138dd8 fix coexist i2s_adc and rtc_adc 2020-03-03 11:58:53 +08:00
xiongyu
faf898b659 bugfix(i2s): fix driver ut i2s
* Add test support for ESP32S2

* Add loop back test

* Support chip internal connection, no external wiring required.

* Delete the relevant codes of PDM of ESP32-S2 ll layer.

* fix dac dma mode issue
2020-03-03 11:58:53 +08:00
Angus Gratton
04ccb84b83 Merge branch 'feature/cpu_abstraction' into 'master'
CPU related operations abstraction

See merge request espressif/esp-idf!7301
2020-02-28 11:54:29 +08:00
Michael (XIAO Xufeng)
ce3ab0b8df Merge branch 'bugfix/nec_example' into 'master'
bugfix in NEC example and low level function

Closes IDFGH-2676 and IDFGH-2689

See merge request espressif/esp-idf!7562
2020-02-28 11:00:50 +08:00
Renz Christian Bagaporo
d46989efa3 soc: remove param checking in cpu related abstractions 2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo
f75cb2ef00 soc: change cpu stall, unstall, and reset core to not return values 2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo
d5c123c1f5 soc: use own macro to assert proper args for cpu abstractions 2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo
7f864d24ad soc: prefer assertions, disabling functions for cpu abstractions
Prefer assertions, making available functions only when caps support it
for cpu-related abstractions.

Changes cpu hal functions to stall, unstall, reset to not accept -1;
instead prefering macros that provide the same functionality.
2020-02-27 07:15:14 +05:00
Renz Christian Bagaporo
f3c6320ff6 soc: implement cpu utils in terms of cpu abstractions 2020-02-27 07:14:21 +05:00
Renz Christian Bagaporo
c9a51bfbb2 soc: create abstraction for cpu related operations 2020-02-27 07:14:19 +05:00
Sachin Parekh
301dacfb33 Exception handlers for LoadStoreError and LoadStoreAlignmentError
Configurable option to use IRAM as byte accessible memory (in single core mode) using
load-store (non-word aligned and non-word size IRAM access specific) exception handlers.
This allows to use IRAM for use-cases where certain performance penalty
(upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration
option has been provided to redirect mbedTLS specific in-out content length buffers to
IRAM (in single core mode), allows to save 20KB per TLS connection.
2020-02-26 20:21:59 +08:00
Michael (XIAO Xufeng)
c53192d521 Merge branch 'bugfix/fix_uart_set_line_inverse_breaking_change_issue' into 'master'
Bugfix(uart): fix uart_set_line_inverse breaking change issue

Closes IDFGH-2469

See merge request espressif/esp-idf!7345
2020-02-26 18:34:52 +08:00
morris
e9717fc07b periph_ctrl: move target specific into ll files 2020-02-24 14:50:26 +08:00
houwenxiang
c07e4c775d driver(uart): fix uart_set_line_inverse breaking change issue
closes https://github.com/espressif/esp-idf/issues/4581
2020-02-24 11:36:31 +08:00
Fu Zhi Bo
7a5b67b8de rtcio: fix rtcio unhold function
Solve problems caused by code refactoring.

Closes https://github.com/espressif/esp-idf/issues/4600
2020-02-20 15:42:28 +08:00
Ivan Grokhotkov
40cff27053 Merge branch 'feature/esp32s2_pm' into 'master'
esp32s2: power management (DFS and auto light sleep)

Closes IDF-670, IDF-527, and IDFGH-231

See merge request espressif/esp-idf!7578
2020-02-19 18:26:33 +08:00
Ivan Grokhotkov
fe0df01b12 Merge branch 'bugfix/from_github' into 'master'
Fixes from Github

Closes IDFGH-2679, IDFGH-2632, IDFGH-2716, IDFGH-2439, and IDFGH-2509

See merge request espressif/esp-idf!7659
2020-02-18 23:53:38 +08:00
Alexander Borsuk
e489e48dfa Fixes compilation error on verbose level (IDFGH-2439)
Closes #4552

Merges https://github.com/espressif/esp-idf/pull/4786
2020-02-18 12:30:47 +01:00
Ivan Grokhotkov
383ace9443 rtc_clk_cal: make compatible with the ESP32 2020-02-17 17:33:56 +01:00
Ivan Grokhotkov
490bf29767 esp32s2: fix enabling 32k XTAL clock
On the ESP32S2, rtc_clk_cal(RTC_CAL_RTC_MUX) measures the frequency
of the 90kHz RTC clock regardless of the selected slow clock
frequency. Keep track which clock is selected and pass the argument
to rtc_clk_cal accordingly.

fix clock choices

update rtc 32k xtal code for s2

missed api in rtc.h

bootloader_clock: update for S2
2020-02-17 17:33:56 +01:00
Ivan Grokhotkov
74ac618287 soc/rtc: update frequency switching APIs to match the master branch
esp32s2 code was based in IDF v3.1, and used outdated APIs.

Closes IDF-670
2020-02-17 17:23:32 +01:00
xiongyu
61778d5b7c bugfix(i2s): fix adc output invert issue 2020-02-17 17:15:01 +08:00
morris
0d521e8f9d rmt: fix missing 0x in rmt_ll.h
Closes https://github.com/espressif/esp-idf/issues/4760
2020-02-17 15:20:41 +08:00
Jiang Jiang Jian
cedea18acb Merge branch 'bugfix/wifi_clear_phy_status_when_cpu_start' into 'master'
soc: clear PHY status when cpu start

Closes AUD-1125

See merge request espressif/esp-idf!7493
2020-02-12 15:34:46 +08:00
Renz Christian Bagaporo
16e0c93e40 ci: solve public headers errors 2020-02-11 14:30:42 +05:00
Renz Christian Bagaporo
b675df4b08 soc: use include_next for including common touch sensor hal header 2020-02-11 14:30:42 +05:00
Renz Christian Bagaporo
1f2e2fe8af soc: separate abstraction, description and implementation 2020-02-11 14:30:42 +05:00
Ivan Grokhotkov
98bb3772e0 soc: spi_flash LL fixes 2020-02-07 16:18:31 +01:00
Wangjialin
aaf119e930 flash(esp32s2): fix setting address field in spi user mode. 2020-02-07 16:10:51 +01:00
Ivan Grokhotkov
354ce68dce soc: move reserved regions out of memory_layout_utils.c
These definitions have ended up being chip specific. Moving them into
respective soc_memory_layout.c makes the whole picture of memory
regions easier to see, and also makes adding support for new chips
easier.
2020-01-24 10:48:20 +01:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
Felipe Neves
73592d9bc4 spin_lock: added new spinlock interface and decoupled it from RTOS
spin_lock: cleaned-up port files and removed portmux files

components/soc: decoupled compare and set operations from FreeRTOS

soc/spinlock: filled initial implementation of spinlock refactor

It will decouple the spinlocks into separated components with not depencences of freertos
an similar interface was provided focusing the readabillity and maintenance, also
naming to spinlocks were adopted. On FreeRTOS side the legacy portMUX macros
gained a form of wrapper functions that calls the spinlocks component thus
minimizing the impact on RTOS side.

This feature aims to close IDF-967

soc/spinlock: spinlocks passed on unit test, missing test corner cases

components/compare_set: added better function namings plus minor performance optimization on spinlocks

soc/spinlock: code reordering to remove ISC C90 mix error

freertos/portmacro: gor rid of critical sections multiline macros, placed inline functions instead

soc/spinlock: improved spinlock performance from internal RAM

For cases where the spinlock is executed from IRAM, there is no
need to check where the spinlock object is placed on memory,
removing this checks caused a great improvement on performance.
2020-01-22 06:20:34 +08:00
Darian Leung
a049e02d96 can: Refactor CAN to use HAL and LowLevel layers
The following commit refactors the CAN driver such that
it is split into HAL and Lowlevel layers. The following
changes have also been made:

- Added bit field members to can_message_t as alternative
  to message flags. Updated examples and docs accordingly
- Register field names and fields of can_dev_t updated
2020-01-09 16:13:51 +08:00
Ivan Grokhotkov
e4d45608d3 soc: add ledc_caps.h, replace target-based ifdefs with caps-based 2019-12-28 20:33:21 +00:00
Michael (XIAO Xufeng)
72cf67cba3 sdio_slave_hal: fix the TAG non-static issue
(MINOR CHANGE)
2019-12-24 16:50:09 +08:00
michael
262ba6f825 spi: fix iomux, timing and address phase issues for esp32s2beta 2019-12-23 10:23:00 +08:00
Michael (XIAO Xufeng)
0ec08ca21b sdio_slave: support HAL layer 2019-12-13 18:33:15 +08:00
houwenxiang
aac935ec81 bugfix(i2c): fix I2C driver breaking change issue.
1. Fixed I2C driver breaking change issue.
    2. Add I2C UT test case.
2019-12-04 15:51:36 +08:00
Renz Christian Bagaporo
e6ad330018 ble_mesh_wifi_coexist example: Disable Wi-Fi RX IRAM optimisation
Otherwise IRAM usage is too high in this example.
2019-11-28 09:20:00 +08:00
Fu Zhi Bo
3a468a1ffd Refactor the touch sensor driver 2019-11-27 20:08:44 +08:00
houwenxiang
f27ae9b0e2 feature: Add uart hal support. 2019-11-26 20:01:50 +08:00