In situations where idle task runs a lot of idle hooks or cleanup code
(due to pthread local storage, etc) it can use more than 1KB of stack.
(I think the trigger is if a context switch happens at the right point
in the TLS cleanup).
Also removes an sdkconfig.default which accidentally set all config items,
including this stack size.
This commit removes the lookup table mode due to inferior performance when compared
to linear mode under attenuation 0, 1 and 2. However small portions of the lookup table
are kept for the higher voltages of atten 3 (above ADC reading 2880). That voltage range
in atten 3 has non linear characteristics making the LUT performan better than linear mode.
This commit updates the esp_adc_cal ocmponent to support new calibration methods
which utilize calibratoin values stored in eFuse. This commit includes LUT mode
requirement from github(https://github.com/espressif/esp-idf/issues/805): to provide the position in the buffer of the pattern detected.
requirement from AT application: in AT app, when no hardware flow control is enabled, in some situation the rx buffer might be full, and the terminator “+++” might be lost, we can use pattern detect interrupt to avoid missing the terminator. When pattern detect interrupt happens, it will not send a data event at the same time.
1. Add API to get position of detected pattern in rx buffer
2. Modify UART event example
3. Add comments for uart_flush, add alias API uart_flush_input to clear the rx buffer
4. Modify the way rx_buffered_len is calculated
Reported from different sources from github or bbs:
https://github.com/espressif/esp-idf/issues/680https://github.com/espressif/esp-idf/issues/922
We tested reading several sensor or other I2C slave devices, if the power and SDA/SCL wires are in proper condition, everything works find with reading the slave.
If we remove the power supply for the slave during I2C is reading, or directly connect SDA or SCL to ground, this would cause the I2C FSM get stuck in wrong state, all we can do is the reset the I2C hardware in this case.
After this commit, no matter whether the power supply of I2C slave is removed or SDA / SCL are shorted to ground, the driver can recover from wrong state.
We are not sure whether this the save issue with the reported one yet, but to make the driver more robust.
Further information:
1. For I2C master mode, we have tested different situations, e.g., to short the SDA/SCL directly to GND/VCC, to short the SDA to SCL, to un-plug the slave device, to power off the slave device. Under all of those situations, this version of driver can recover and keep working.
2. Some slave device will die by accident and keep the SDA in low level, in this case, master should send several clock to make the slave release the bus.
3. Slave mode of ESP32 might also get in wrong state that held the SDA low, in this case, master device could send a stop signal to make esp32 slave release the bus.
Modifications:
1. Disable I2C_MASTER_TRAN_COMP interrupt to void extra interrupt.
2. Disable un-used timeout interrupt for slave.
3. Add bus reset if error detected for master mode.
4. Add bus clear if SDA level is low when error detected.
5. Modify the argument type of i2c_set_pin.
6. add API to set timeout value
7. add parameter check for timing APIs
using apll_param to setup APLL
new apll calculation method, much faster
validate freq calculation
Ensure that the i2s frequency is greater than the hardware limit
Add description of how to calculate apll clock, support apll for other 16-bits audio, check rev0 chip
correct space
