Crash_Override/OVMS3-idf
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Author SHA1 Message Date
wangmengyang 22e21b38f7 component/bt: implement bluetooth modem sleep mode, one mode for BLE only and another for dual mode bluetooth 
1. provide options for bluetooth low power mode
2. provide two options for bluetooth low power clock: main XTAL and external 32kHz XTAL
3. provide function and callbacks to control bluetooth low power mode, including enable/disable sleep, software wakeup request, low power clock settings, check power state, etc
4. modify vhci API vhci_host_send_packet to use blocking mode
5. note that DFS and bluetooth modem sleep can not be used together currently.
 2018-05-19 15:37:26 +08:00
jack c384fa2492 rename clock enable and reset bits for SPI modules 
1.The names of clock enable and reset bits do not match with TRM, just rename them.
 2018-05-14 16:45:03 +08:00
XiaXiaotian 42cefc173f refractor WiFi clock setting 
Do not set WiFi clock in PHY initializing function, move it to WiFi
   start/stop function.
 2017-11-02 15:24:21 +08:00
wangmengyang bd6394db92 component/bt: clean up WIFI_CLK_EN_REG settings for Bluetooth 
1. move settings of WIFI_CLK_EN_REG for bluetooth into controller init/deinit APIs
2. modify the bit mask used in phy_rf init/deinit to use WIFI-BT shared bits
 2017-11-02 15:24:21 +08:00
michael 88f602a0e0 fix(periph_ctrl): fix reset function in periph_ctrl.c 2017-10-17 12:20:40 +08:00
Angus Gratton 0dd9b899b7 periph_ctrl: Refactor to add periph_module_reset(), avoid potential race in SPI DMA workaround 
Also refactor use of direct clock access in unit test ref_clock (probably not a real issue)
 2017-10-02 17:48:16 +11:00
Ivan Grokhotkov 956a28a95c driver: add periph_ctrl support for SDMMC, SDIO slave, CAN, EMAC 2017-09-04 22:43:51 +08:00
michael b834fcf78a fix(spi_master): this fix the SPI MOSI output missing bug. 2017-09-04 22:43:51 +08:00
Tian Hao 26a3cb93c7 component/soc : move dport access header files to soc 
1. move dport access header files to soc
2. reduce dport register write protection. Only protect read operation
 2017-05-09 18:06:00 +08:00
Tian Hao f7e8856520 component/esp32 : fix dualcore bug 
1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
 2017-05-08 21:53:43 +08:00
Jeroen Domburg 23455de4c2 Add SPI Master driver, example, test and docs 2017-01-06 14:20:32 +08:00
Wangjialin a97e076dec add pcnt.rst 2016-11-23 19:07:30 +08:00
Wangjialin 6db1482cd5 Merge branch 'master' into driver_merge_tmp/merge_pcnt 
# Conflicts:
#	components/driver/include/driver/periph_ctrl.h
 2016-11-23 18:15:54 +08:00
Wangjialin 6a1dbc3f1c add RMT driver and example 2016-11-22 00:57:19 +08:00
Wangjialin 1cc1d9d721 driver: Add PCNT code 
1. add PCNT module in periph_ctrl.c/.h
2. add description of PCNT status in pcnt_struct.h
3. add PCNT driver code
4. add PCNT example code.
 2016-11-21 18:17:07 +08:00
Wangjialin d82cb7f60f Modify spinlock error in periph_ctrl.c 2016-09-29 11:50:25 +08:00
Wangjialin e523a2532a Modify LEDC driver 
1. configure LEDC timer saparately
2. add peripher_crtl.c/.h
    To enable the peripheral modules, we have to set/clear the control register in dport_reg.h.
    These bits are disabled by default and they are all in a same register, so we need to add a lock on that.
3. add include esp_err.h in gpio.h
 2016-09-28 23:20:34 +08:00