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Merge branch 'master' into driver_merge_tmp/merge_pcnt

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# Conflicts:
#	components/driver/include/driver/periph_ctrl.h
This commit is contained in:
Wangjialin 2016-11-23 18:15:54 +08:00
parent 7571b8c2e4 137c027274
commit 6db1482cd5
114 changed files with 8342 additions and 820 deletions
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5
.gitignore vendored
View file

@ -24,3 +24,8 @@ examples/*/build
docs/_build/
docs/doxygen-warning-log.txt
docs/xml/
# Unit test app files
tools/unit-test-app/sdkconfig
tools/unit-test-app/sdkconfig.old
tools/unit-test-app/build

13
.gitlab-ci.yml
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@ -78,15 +78,14 @@ build_esp_idf_tests:
<<: *build_template
artifacts:
paths:
- ./esp-idf-tests/build/*.bin
- ./esp-idf-tests/build/*.elf
- ./esp-idf-tests/build/*.map
- ./esp-idf-tests/build/bootloader/*.bin
- ./tools/unit-test-app/build/*.bin
- ./tools/unit-test-app/build/*.elf
- ./tools/unit-test-app/build/*.map
- ./tools/unit-test-app/build/bootloader/*.bin
expire_in: 6 mos
script:
- git clone $GITLAB_SSH_SERVER/idf/esp-idf-tests.git
- cd esp-idf-tests
- cd tools/unit-test-app
- git checkout ${CI_BUILD_REF_NAME} || echo "Using default branch..."
- make defconfig
- make
@ -131,7 +130,7 @@ test_nvs_on_host:
tags:
- nvs_host_test
script:
- cd components/nvs_flash/test
- cd components/nvs_flash/test_nvs_host
- make test
test_build_system:

4
CONTRIBUTING.rst
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@ -15,7 +15,9 @@ Before sending us a Pull Request, please consider this list of points:
* Is the contribution entirely your own work, or already licensed under an Apache License 2.0 compatible Open Source License? If not then we unfortunately cannot accept it.
* Does any new code conform to the esp-idf Style Guide? (Style Guide currently pending).
* Does any new code conform to the esp-idf :doc:`Style Guide <style-guide>`?
* Does the code documentation follow requirements in :doc:`documenting-code`?
* Is the code adequately commented for people to understand how it is structured?

2
components/bootloader/Makefile.projbuild
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@ -20,7 +20,7 @@ export SECURE_BOOT_SIGNING_KEY # used by bootloader_support component
# Custom recursive make for bootloader sub-project
BOOTLOADER_MAKE=+$(MAKE) -C $(BOOTLOADER_COMPONENT_PATH)/src \
V=$(V) BUILD_DIR_BASE=$(BOOTLOADER_BUILD_DIR)
V=$(V) BUILD_DIR_BASE=$(BOOTLOADER_BUILD_DIR) TEST_COMPONENTS=
.PHONY: bootloader-clean bootloader-flash bootloader $(BOOTLOADER_BIN)

4
components/driver/gpio.c
View file

@ -321,9 +321,9 @@ esp_err_t gpio_config(gpio_config_t *pGPIOConfig)
}
if(pGPIOConfig->pull_up_en) {
pu_en = 1;
REG_SET_BIT(gpio_pu_pd_desc[io_num].reg, gpio_pu_pd_desc[io_num].pd);
REG_SET_BIT(gpio_pu_pd_desc[io_num].reg, gpio_pu_pd_desc[io_num].pu);
} else {
REG_CLR_BIT(gpio_pu_pd_desc[io_num].reg, gpio_pu_pd_desc[io_num].pd);
REG_CLR_BIT(gpio_pu_pd_desc[io_num].reg, gpio_pu_pd_desc[io_num].pu);
}
if(pGPIOConfig->pull_down_en) {
pd_en = 1;

2
components/driver/include/driver/periph_ctrl.h
View file

@ -39,7 +39,7 @@ typedef enum {
PERIPH_PWM3_MODULE,
PERIPH_UHCI0_MODULE,
PERIPH_UHCI1_MODULE,
PERIPH_PCNT_MODULE,
PERIPH_RMT_MODULE,
} periph_module_t;
/**

794
components/driver/include/driver/rmt.h Normal file
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@ -0,0 +1,794 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _DRIVER_RMT_CTRL_H_
#define _DRIVER_RMT_CTRL_H_
#include "esp_err.h"
#include "soc/rmt_reg.h"
#include "soc/dport_reg.h"
#include "soc/rmt_struct.h"
#include "freertos/FreeRTOS.h"
#include "freertos/semphr.h"
#include "freertos/xtensa_api.h"
#include "freertos/ringbuf.h"
#include "driver/gpio.h"
#include "driver/periph_ctrl.h"
#ifdef __cplusplus
extern "C" {
#endif
#define RMT_MEM_BLOCK_BYTE_NUM (256)
#define RMT_MEM_ITEM_NUM (RMT_MEM_BLOCK_BYTE_NUM/4)
typedef enum {
RMT_CHANNEL_0=0, /*!< RMT Channel0 */
RMT_CHANNEL_1, /*!< RMT Channel1 */
RMT_CHANNEL_2, /*!< RMT Channel2 */
RMT_CHANNEL_3, /*!< RMT Channel3 */
RMT_CHANNEL_4, /*!< RMT Channel4 */
RMT_CHANNEL_5, /*!< RMT Channel5 */
RMT_CHANNEL_6, /*!< RMT Channel6 */
RMT_CHANNEL_7, /*!< RMT Channel7 */
RMT_CHANNEL_MAX
} rmt_channel_t;
typedef enum {
RMT_MEM_OWNER_TX = 0, /*!< RMT RX mode, RMT transmitter owns the memory block*/
RMT_MEM_OWNER_RX = 1, /*!< RMT RX mode, RMT receiver owns the memory block*/
RMT_MEM_OWNER_MAX,
}rmt_mem_owner_t;
typedef enum {
RMT_BASECLK_REF = 0, /*!< RMT source clock system reference tick, 1MHz by default(Not supported in this version) */
RMT_BASECLK_APB, /*!< RMT source clock is APB CLK, 80Mhz by default */
RMT_BASECLK_MAX,
} rmt_source_clk_t;
typedef enum {
RMT_DATA_MODE_FIFO = 0, /*<! RMT memory access in FIFO mode */
RMT_DATA_MODE_MEM = 1, /*<! RMT memory access in memory mode */
RMT_DATA_MODE_MAX,
} rmt_data_mode_t;
typedef enum {
RMT_MODE_TX=0, /*!< RMT TX mode */
RMT_MODE_RX, /*!< RMT RX mode */
RMT_MODE_MAX
} rmt_mode_t;
typedef enum {
RMT_IDLE_LEVEL_LOW=0, /*!< RMT TX idle level: low Level */
RMT_IDLE_LEVEL_HIGH, /*!< RMT TX idle level: high Level */
RMT_IDLE_LEVEL_MAX,
} rmt_idle_level_t;
typedef enum {
RMT_CARRIER_LEVEL_LOW=0, /*!< RMT carrier wave is modulated for low Level output */
RMT_CARRIER_LEVEL_HIGH, /*!< RMT carrier wave is modulated for high Level output */
RMT_CARRIER_LEVEL_MAX
} rmt_carrier_level_t;
/**
* @brief Data struct of RMT TX configure parameters
*/
typedef struct {
bool loop_en; /*!< RMT loop output mode*/
uint32_t carrier_freq_hz; /*!< RMT carrier frequency */
uint8_t carrier_duty_percent; /*!< RMT carrier duty (%) */
rmt_carrier_level_t carrier_level; /*!< RMT carrier level */
bool carrier_en; /*!< RMT carrier enable */
rmt_idle_level_t idle_level; /*!< RMT idle level */
bool idle_output_en; /*!< RMT idle level output enable*/
}rmt_tx_config_t;
/**
* @brief Data struct of RMT RX configure parameters
*/
typedef struct {
bool filter_en; /*!< RMT receiver filer enable*/
uint8_t filter_ticks_thresh; /*!< RMT filter tick number */
uint16_t idle_threshold; /*!< RMT RX idle threshold */
}rmt_rx_config_t;
/**
* @brief Data struct of RMT configure parameters
*/
typedef struct {
rmt_mode_t rmt_mode; /*!< RMT mode: transmitter or receiver */
rmt_channel_t channel; /*!< RMT channel */
uint8_t clk_div; /*!< RMT channel counter divider */
gpio_num_t gpio_num; /*!< RMT GPIO number */
uint8_t mem_block_num; /*!< RMT memory block number */
union{
rmt_tx_config_t tx_config; /*!< RMT TX parameter */
rmt_rx_config_t rx_config; /*!< RMT RX parameter */
};
} rmt_config_t;
/**
* @brief Set RMT clock divider, channel clock is divided from source clock.
*
* @param channel RMT channel (0-7)
*
* @param div_cnt RMT counter clock divider
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_set_clk_div(rmt_channel_t channel, uint8_t div_cnt);
/**
* @brief Get RMT clock divider, channel clock is divided from source clock.
*
* @param channel RMT channel (0-7)
*
* @param div_cnt pointer to accept RMT counter divider
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_get_clk_div(rmt_channel_t channel, uint8_t* div_cnt);
/**
* @brief Set RMT RX idle threshold value
*
* In receive mode, when no edge is detected on the input signal
* for longer than idle_thres channel clock cycles,
* the receive process is finished.
*
* @param channel RMT channel (0-7)
*
* @param thresh RMT RX idle threshold
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_set_rx_idle_thresh(rmt_channel_t channel, uint16_t thresh);
/**
* @brief Get RMT idle threshold value.
*
* In receive mode, when no edge is detected on the input signal
* for longer than idle_thres channel clock cycles,
* the receive process is finished.
*
* @param channel RMT channel (0-7)
*
* @param thresh pointer to accept RMT RX idle threshold value
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_get_rx_idle_thresh(rmt_channel_t channel, uint16_t *thresh);
/**
* @brief Set RMT memory block number for RMT channel
*
* This function is used to configure the amount of memory blocks allocated to channel n
* The 8 channels share a 512x32-bit RAM block which can be read and written
* by the processor cores over the APB bus, as well as read by the transmitters
* and written by the receivers.
* The RAM address range for channel n is start_addr_CHn to end_addr_CHn, which are defined by:
* Memory block start address is RMT_CHANNEL_MEM(n) (in soc/rmt_reg.h),
* that is, start_addr_chn = RMT base address + 0x800 + 64 ∗ 4 ∗ n, and
* end_addr_chn = RMT base address + 0x800 + 64 ∗ 4 ∗ n + 64 ∗ 4 ∗ RMT_MEM_SIZE_CHn mod 512 ∗ 4
* @note
* If memory block number of one channel is set to a value greater than 1, this channel will occupy the memory
* block of the next channel.
* Channel0 can use at most 8 blocks of memory, accordingly channel7 can only use one memory block.
*
* @param channel RMT channel (0-7)
*
* @param rmt_mem_num RMT RX memory block number, one block has 64 * 32 bits.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_set_mem_block_num(rmt_channel_t channel, uint8_t rmt_mem_num);
/**
* @brief Get RMT memory block number
*
* @param channel RMT channel (0-7)
*
* @param rmt_mem_num Pointer to accept RMT RX memory block number
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_get_mem_block_num(rmt_channel_t channel, uint8_t* rmt_mem_num);
/**
* @brief Configure RMT carrier for TX signal.
*
* Set different values for carrier_high and carrier_low to set different frequency of carrier.
* The unit of carrier_high/low is the source clock tick, not the divided channel counter clock.
*
* @param channel RMT channel (0-7)
*
* @param carrier_en Whether to enable output carrier.
*
* @param high_level High level duration of carrier
*
* @param low_level Low level duration of carrier.
*
* @param carrier_level Configure the way carrier wave is modulated for channel0-7.
*
* 1'b1:transmit on low output level
*
* 1'b0:transmit on high output level
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_set_tx_carrier(rmt_channel_t channel, bool carrier_en, uint16_t high_level, uint16_t low_level, rmt_carrier_level_t carrier_level);
/**
* @brief Set RMT memory in low power mode.
*
* Reduce power consumed by memory. 1:memory is in low power state.
*
* @param channel RMT channel (0-7)
*
* @param pd_en RMT memory low power enable.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_set_mem_pd(rmt_channel_t channel, bool pd_en);
/**
* @brief Get RMT memory low power mode.
*
* @param channel RMT channel (0-7)
*
* @param pd_en Pointer to accept RMT memory low power mode.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_get_mem_pd(rmt_channel_t channel, bool* pd_en);
/**
* @brief Set RMT start sending data from memory.
*
* @param channel RMT channel (0-7)
*
* @param tx_idx_rst Set true to reset memory index for TX.
* Otherwise, transmitter will continue sending from the last index in memory.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_tx_start(rmt_channel_t channel, bool tx_idx_rst);
/**
* @brief Set RMT stop sending.
*
* @param channel RMT channel (0-7)
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_tx_stop(rmt_channel_t channel);
/**
* @brief Set RMT start receiving data.
*
* @param channel RMT channel (0-7)
*
* @param rx_idx_rst Set true to reset memory index for receiver.
* Otherwise, receiver will continue receiving data to the last index in memory.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_rx_start(rmt_channel_t channel, bool rx_idx_rst);
/**
* @brief Set RMT stop receiving data.
*
* @param channel RMT channel (0-7)
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_rx_stop(rmt_channel_t channel);
/**
* @brief Reset RMT TX/RX memory index.
*
* @param channel RMT channel (0-7)
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_memory_rw_rst(rmt_channel_t channel);
/**
* @brief Set RMT memory owner.
*
* @param channel RMT channel (0-7)
*
* @param owner To set when the transmitter or receiver can process the memory of channel.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_set_memory_owner(rmt_channel_t channel, rmt_mem_owner_t owner);
/**
* @brief Get RMT memory owner.
*
* @param channel RMT channel (0-7)
*
* @param owner Pointer to get memory owner.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_get_memory_owner(rmt_channel_t channel, rmt_mem_owner_t* owner);
/**
* @brief Set RMT tx loop mode.
*
* @param channel RMT channel (0-7)
*
* @param loop_en To enable RMT transmitter loop sending mode.
*
* If set true, transmitter will continue sending from the first data
* to the last data in channel0-7 again and again.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_set_tx_loop_mode(rmt_channel_t channel, bool loop_en);
/**
* @brief Get RMT tx loop mode.
*
* @param channel RMT channel (0-7)
*
* @param loop_en Pointer to accept RMT transmitter loop sending mode.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_get_tx_loop_mode(rmt_channel_t channel, bool* loop_en);
/**
* @brief Set RMT RX filter.
*
* In receive mode, channel0-7 will ignore input pulse when the pulse width is smaller than threshold.
* Counted in source clock, not divided counter clock.
*
* @param channel RMT channel (0-7)
*
* @param rx_filter_en To enable RMT receiver filter.
*
* @param thresh Threshold of pulse width for receiver.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_set_rx_filter(rmt_channel_t channel, bool rx_filter_en, uint8_t thresh);
/**
* @brief Set RMT source clock
*
* RMT module has two source clock:
* 1. APB clock which is 80Mhz
* 2. REF tick clock, which would be 1Mhz( not supported in this version).
*
* @param channel RMT channel (0-7)
*
* @param base_clk To choose source clock for RMT module.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_set_source_clk(rmt_channel_t channel, rmt_source_clk_t base_clk);
/**
* @brief Get RMT source clock
*
* RMT module has two source clock:
* 1. APB clock which is 80Mhz
* 2. REF tick clock, which would be 1Mhz( not supported in this version).
*
* @param channel RMT channel (0-7)
*
* @param src_clk Pointer to accept source clock for RMT module.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_get_source_clk(rmt_channel_t channel, rmt_source_clk_t* src_clk);
/**
* @brief Set RMT idle output level for transmitter
*
* @param channel RMT channel (0-7)
*
* @param idle_out_en To enable idle level output.
*
* @param level To set the output signal's level for channel0-7 in idle state.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_set_idle_level(rmt_channel_t channel, bool idle_out_en, rmt_idle_level_t level);
/**
* @brief Get RMT status
*
* @param channel RMT channel (0-7)
*
* @param status Pointer to accept channel status.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_get_status(rmt_channel_t channel, uint32_t* status);
/**
* @brief Set mask value to RMT interrupt enable register.
*
* @param mask Bit mask to set to the register
*
*/
void rmt_set_intr_enable_mask(uint32_t mask);
/**
* @brief Clear mask value to RMT interrupt enable register.
*
* @param mask Bit mask to clear the register
*
*/
void rmt_clr_intr_enable_mask(uint32_t mask);
/**
* @brief Set RMT RX interrupt enable
*
* @param channel RMT channel (0 - 7)
*
* @param en enable or disable RX interrupt.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_set_rx_intr_en(rmt_channel_t channel, bool en);
/**
* @brief Set RMT RX error interrupt enable
*
* @param channel RMT channel (0 - 7)
*
* @param en enable or disable RX err interrupt.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_set_err_intr_en(rmt_channel_t channel, bool en);
/**
* @brief Set RMT TX interrupt enable
*
* @param channel RMT channel (0 - 7)
*
* @param en enable or disable TX interrupt.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_set_tx_intr_en(rmt_channel_t channel, bool en);
/**
* @brief Set RMT TX event interrupt enable
*
* @param channel RMT channel (0 - 7)
*
* @param en enable or disable TX event interrupt.
*
* @param evt_thresh RMT event interrupt threshold value
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_set_evt_intr_en(rmt_channel_t channel, bool en, uint16_t evt_thresh);
/**
* @brief Set RMT pins
*
* @param channel RMT channel (0 - 7)
*
* @param mode TX or RX mode for RMT
*
* @param gpio_num GPIO number to transmit or receive the signal.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_set_pin(rmt_channel_t channel, rmt_mode_t mode, gpio_num_t gpio_num);
/**
* @brief Configure RMT parameters
*
* @param rmt_param RMT parameter structor
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_config(rmt_config_t* rmt_param);
/**
* @brief register RMT interrupt handler, the handler is an ISR.
*
* The handler will be attached to the same CPU core that this function is running on.
* Users should know that which CPU is running and then pick a INUM that is not used by system.
* We can find the information of INUM and interrupt level in soc.h.
* @note
* If you already called rmt_driver_install to use system RMT driver,
* please do not register ISR handler again.
*
* @param rmt_intr_num RMT interrupt number, check the info in soc.h, and please see the core-isa.h for more details
*
* @param fn Interrupt handler function.
*
* @note
* the handler function MUST be defined with attribution of "IRAM_ATTR".
*
* @param arg Parameter for handler function
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Function pointer error.
* - ESP_FAIL System driver installed, can not register ISR handler for RMT
*/
esp_err_t rmt_isr_register(uint8_t rmt_intr_num, void (* fn)(void* ), void * arg);
/**
* @brief Fill memory data of channel with given RMT items.
*
* @param channel RMT channel (0 - 7)
*
* @param item Pointer of items.
*
* @param item_num RMT sending items number.
*
* @param mem_offset Index offset of memory.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_fill_tx_items(rmt_channel_t channel, rmt_item32_t* item, uint16_t item_num, uint16_t mem_offset);
/**
* @brief Initialize RMT driver
*
* @param channel RMT channel (0 - 7)
*
* @param rx_buf_size Size of RMT RX ringbuffer.
*
* @note
* If we do not need RX ringbuffer, just set rx_buf_size to 0.
*
* @note
* When we call rmt_driver_install function, it will register a driver ISR handler,
* DO NOT REGISTER ISR HANDLER AGAIN.
*
* @param rmt_intr_num RMT interrupt number.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_driver_install(rmt_channel_t channel, size_t rx_buf_size, int rmt_intr_num);
/**
* @brief Uninstall RMT driver.
*
* @param channel RMT channel (0 - 7)
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_driver_uninstall(rmt_channel_t channel);
/**
* @brief RMT send waveform from rmt_item array.
*
* This API allows user to send waveform with any length.
*
* @param channel RMT channel (0 - 7)
*
* @param rmt_item head point of RMT items array.
*
* @param item_num RMT data item number.
*
* @param wait_tx_done If set 1, it will block the task and wait for sending done.
*
* If set 0, it will not wait and return immediately.
*
* @note
* This function will not copy data, instead, it will point to the original items,
* and send the waveform items.
* If wait_tx_done is set to true, this function will block and will not return until
* all items have been sent out.
* If wait_tx_done is set to false, this function will return immediately, and the driver
* interrupt will continue sending the items. We must make sure the item data will not be
* damaged when the driver is still sending items in driver interrupt.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_write_items(rmt_channel_t channel, rmt_item32_t* rmt_item, int item_num, bool wait_tx_done);
/**
* @brief Wait RMT TX finished.
*
* @param channel RMT channel (0 - 7)
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_wait_tx_done(rmt_channel_t channel);
/**
* @brief Get ringbuffer from UART.
*
* Users can get the RMT RX ringbuffer handler, and process the RX data.
*
* @param channel RMT channel (0 - 7)
*
* @param buf_handler Pointer to buffer handler to accept RX ringbuffer handler.
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_get_ringbuf_handler(rmt_channel_t channel, RingbufHandle_t* buf_handler);
/***************************EXAMPLE**********************************
*
* @note
* You can also refer to example/09_rmt_nec_tx_rx to have more information about how to use RMT module.
*
* ----------------EXAMPLE OF RMT SETTING ---------------------
* @code{c}
* //1. enable RMT
* //enable RMT module, or you can not set any register of it.
* //this will be done in rmt_config API.
* periph_module_enable(PERIPH_RMT_MODULE);
* @endcode
*
* @code{c}
* //2. set RMT transmitter
* void rmt_tx_init()
* {
* rmt_config_t rmt_tx;
* rmt_tx.channel = 0;
* rmt_tx.gpio_num = 16;
* rmt_tx.mem_block_num = 1;
* rmt_tx.clk_div = 100;
* rmt_tx.tx_config.loop_en = false;
* rmt_tx.tx_config.carrier_duty_percent = 50;
* rmt_tx.tx_config.carrier_freq_hz = 38000;
* rmt_tx.tx_config.carrier_level = 1;
* rmt_tx.tx_config.carrier_en = RMT_TX_CARRIER_EN;
* rmt_tx.tx_config.idle_level = 0;
* rmt_tx.tx_config.idle_output_en = true;
* rmt_tx.rmt_mode = 0;
* rmt_config(&rmt_tx);
*
* //install system RMT driver, disable rx ringbuffer for transmitter.
* rmt_driver_install(rmt_tx.channel, 0, RMT_INTR_NUM);
* }
*
* @endcode
* @code{c}
* //3. set RMT receiver
* void rmt_rx_init()
* {
* rmt_config_t rmt_rx;
* rmt_rx.channel = 1;
* rmt_rx.gpio_num = 19;
* rmt_rx.clk_div = 100;
* rmt_rx.mem_block_num = 1;
* rmt_rx.rmt_mode = RMT_MODE_RX;
* rmt_rx.rx_config.filter_en = true;
* rmt_rx.rx_config.filter_ticks_thresh = 100;
* rmt_rx.rx_config.idle_threshold = 0xffff;
* rmt_config(&rmt_rx);
*
* //install system RMT driver.
* rmt_driver_install(rmt_rx.channel, 1000, RMT_INTR_NUM);
* }
*
* ----------------EXAMPLE OF RMT INTERRUPT ------------------
* @code{c}
*
* rmt_isr_register(RMT_INTR_NUM, rmt_isr, NULL); //hook the ISR handler for RMT interrupt
* @endcode
* @note
* 0. If you have called rmt_driver_install, you don't need to set ISR handler any more.
* 1. the first parameter is INUM, you can pick one form interrupt level 1/2 which is not used by the system.
* 2. user should arrange the INUMs that used, better not to use a same INUM for different interrupt source.
* 3. do not pick the INUM that already occupied by the system.
* 4. refer to soc.h to check which INUMs that can be used.
*
* ----------------EXAMPLE OF INTERRUPT HANDLER ---------------
* @code{c}
* #include "esp_attr.h"
* //we should add 'IRAM_ATTR' attribution when we declare the isr function
* void IRAM_ATTR rmt_isr_handler(void* arg)
* {
* //read RMT interrupt status.
* uint32_t intr_st = RMT.int_st.val;
*
* //you will find which channels have triggered fade_end interrupt here,
* //then, you can post some event to RTOS queue to process the event.
* //later we will add a queue in the driver code.
*
* //clear RMT interrupt status.
* RMT.int_clr.val = intr_st;
* }
* @endcode
*
*--------------------------END OF EXAMPLE --------------------------
*/
#ifdef __cplusplus
}
#endif
#endif /* _DRIVER_RMT_CTRL_H_ */

4
components/driver/periph_ctrl.c
View file

@ -25,6 +25,10 @@ void periph_module_enable(periph_module_t periph)
{
portENTER_CRITICAL(&periph_spinlock);
switch(periph) {
case PERIPH_RMT_MODULE:
SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_RMT_CLK_EN);
CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_RMT_RST);
break;
case PERIPH_LEDC_MODULE:
SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_LEDC_CLK_EN);
CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_LEDC_RST);

716
components/driver/rmt.c Normal file
View file

@ -0,0 +1,716 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <esp_types.h>
#include <string.h>
#include "freertos/FreeRTOS.h"
#include "freertos/semphr.h"
#include "freertos/xtensa_api.h"
#include "freertos/ringbuf.h"
#include "esp_intr.h"
#include "esp_log.h"
#include "esp_err.h"
#include "soc/gpio_sig_map.h"
#include "soc/rmt_struct.h"
#include "driver/periph_ctrl.h"
#include "driver/rmt.h"
#define RMT_SOUCCE_CLK_APB (APB_CLK_FREQ) /*!< RMT source clock is APB_CLK */
#define RMT_SOURCE_CLK_REF (1 * 1000000) /*!< not used yet */
#define RMT_SOURCE_CLK(select) ((select == RMT_BASECLK_REF) ? (RMT_SOURCE_CLK_REF) : (RMT_SOUCCE_CLK_APB)) /*! RMT source clock frequency */
#define RMT_CHANNEL_ERROR_STR "RMT CHANNEL ERR"
#define RMT_ADDR_ERROR_STR "RMT ADDRESS ERR"
#define RMT_MEM_CNT_ERROR_STR "RMT MEM BLOCK NUM ERR"
#define RMT_CARRIER_ERROR_STR "RMT CARRIER LEVEL ERR"
#define RMT_MEM_OWNER_ERROR_STR "RMT MEM OWNER_ERR"
#define RMT_BASECLK_ERROR_STR "RMT BASECLK ERR"
#define RMT_WR_MEM_OVF_ERROR_STR "RMT WR MEM OVERFLOW"
#define RMT_GPIO_ERROR_STR "RMT GPIO ERROR"
#define RMT_MODE_ERROR_STR "RMT MODE ERROR"
#define RMT_CLK_DIV_ERROR_STR "RMT CLK DIV ERR"
#define RMT_DRIVER_ERROR_STR "RMT DRIVER ERR"
#define RMT_DRIVER_LENGTH_ERROR_STR "RMT PARAM LEN ERROR"
static const char* RMT_TAG = "RMT";
static bool s_rmt_driver_installed = false;
#define RMT_CHECK(a, str, ret) if (!(a)) { \
ESP_LOGE(RMT_TAG,"%s:%d (%s):%s", __FILE__, __LINE__, __FUNCTION__, str); \
return (ret); \
}
static portMUX_TYPE rmt_spinlock = portMUX_INITIALIZER_UNLOCKED;
typedef struct {
int tx_offset;
int tx_len_rem;
int tx_sub_len;
rmt_channel_t channel;
rmt_item32_t* tx_data;
xSemaphoreHandle tx_sem;
RingbufHandle_t tx_buf;
RingbufHandle_t rx_buf;
} rmt_obj_t;
rmt_obj_t* p_rmt_obj[RMT_CHANNEL_MAX] = {0};
static void rmt_set_tx_wrap_en(rmt_channel_t channel, bool en)
{
portENTER_CRITICAL(&rmt_spinlock);
RMT.apb_conf.mem_tx_wrap_en = en;
portEXIT_CRITICAL(&rmt_spinlock);
}
static void rmt_set_data_mode(rmt_data_mode_t data_mode)
{
portENTER_CRITICAL(&rmt_spinlock);
RMT.apb_conf.fifo_mask = data_mode;
portEXIT_CRITICAL(&rmt_spinlock);
}
esp_err_t rmt_set_clk_div(rmt_channel_t channel, uint8_t div_cnt)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT.conf_ch[channel].conf0.div_cnt = div_cnt;
return ESP_OK;
}
esp_err_t rmt_get_clk_div(rmt_channel_t channel, uint8_t* div_cnt)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(div_cnt != NULL, RMT_ADDR_ERROR_STR, ESP_ERR_INVALID_ARG);
*div_cnt = RMT.conf_ch[channel].conf0.div_cnt;
return ESP_OK;
}
esp_err_t rmt_set_rx_idle_thresh(rmt_channel_t channel, uint16_t thresh)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT.conf_ch[channel].conf0.idle_thres = thresh;
return ESP_OK;
}
esp_err_t rmt_get_rx_idle_thresh(rmt_channel_t channel, uint16_t *thresh)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(thresh != NULL, RMT_ADDR_ERROR_STR, ESP_ERR_INVALID_ARG);
*thresh = RMT.conf_ch[channel].conf0.idle_thres;
return ESP_OK;
}
esp_err_t rmt_set_mem_block_num(rmt_channel_t channel, uint8_t rmt_mem_num)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(rmt_mem_num < 16, RMT_MEM_CNT_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT.conf_ch[channel].conf0.mem_size = rmt_mem_num;
return ESP_OK;
}
esp_err_t rmt_get_mem_block_num(rmt_channel_t channel, uint8_t* rmt_mem_num)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(rmt_mem_num != NULL, RMT_ADDR_ERROR_STR, ESP_ERR_INVALID_ARG);
*rmt_mem_num = RMT.conf_ch[channel].conf0.mem_size;
return ESP_OK;
}
esp_err_t rmt_set_tx_carrier(rmt_channel_t channel, bool carrier_en, uint16_t high_level, uint16_t low_level,
rmt_carrier_level_t carrier_level)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(carrier_level < RMT_CARRIER_LEVEL_MAX, RMT_CARRIER_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT.carrier_duty_ch[channel].high = high_level;
RMT.carrier_duty_ch[channel].low = low_level;
RMT.conf_ch[channel].conf0.carrier_out_lv = carrier_level;
RMT.conf_ch[channel].conf0.carrier_en = carrier_en;
return ESP_OK;
}
esp_err_t rmt_set_mem_pd(rmt_channel_t channel, bool pd_en)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT.conf_ch[channel].conf0.mem_pd = pd_en;
return ESP_OK;
}
esp_err_t rmt_get_mem_pd(rmt_channel_t channel, bool* pd_en)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
*pd_en = (bool) RMT.conf_ch[channel].conf0.mem_pd;
return ESP_OK;
}
esp_err_t rmt_tx_start(rmt_channel_t channel, bool tx_idx_rst)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&rmt_spinlock);
if(tx_idx_rst) {
RMT.conf_ch[channel].conf1.mem_rd_rst = 1;
}
RMT.conf_ch[channel].conf1.mem_owner = RMT_MEM_OWNER_TX;
RMT.conf_ch[channel].conf1.tx_start = 1;
portEXIT_CRITICAL(&rmt_spinlock);
return ESP_OK;
}
esp_err_t rmt_tx_stop(rmt_channel_t channel)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&rmt_spinlock);
RMT.conf_ch[channel].conf1.tx_start = 0;
portEXIT_CRITICAL(&rmt_spinlock);
return ESP_OK;
}
esp_err_t rmt_rx_start(rmt_channel_t channel, bool rx_idx_rst)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&rmt_spinlock);
if(rx_idx_rst) {
RMT.conf_ch[channel].conf1.mem_wr_rst = 1;
}
RMT.conf_ch[channel].conf1.rx_en = 0;
RMT.conf_ch[channel].conf1.mem_owner = RMT_MEM_OWNER_RX;
RMT.conf_ch[channel].conf1.rx_en = 1;
portEXIT_CRITICAL(&rmt_spinlock);
return ESP_OK;
}
esp_err_t rmt_rx_stop(rmt_channel_t channel)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&rmt_spinlock);
RMT.conf_ch[channel].conf1.rx_en = 0;
portEXIT_CRITICAL(&rmt_spinlock);
return ESP_OK;
}
esp_err_t rmt_memory_rw_rst(rmt_channel_t channel)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&rmt_spinlock);
RMT.conf_ch[channel].conf1.mem_rd_rst = 1;
RMT.conf_ch[channel].conf1.mem_wr_rst = 1;
portEXIT_CRITICAL(&rmt_spinlock);
return ESP_OK;
}
esp_err_t rmt_set_memory_owner(rmt_channel_t channel, rmt_mem_owner_t owner)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(owner < RMT_MEM_OWNER_MAX, RMT_MEM_OWNER_ERROR_STR, ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&rmt_spinlock);
RMT.conf_ch[channel].conf1.mem_owner = owner;
portEXIT_CRITICAL(&rmt_spinlock);
return ESP_OK;
}
esp_err_t rmt_get_memory_owner(rmt_channel_t channel, rmt_mem_owner_t* owner)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(owner != NULL, RMT_MEM_OWNER_ERROR_STR, ESP_ERR_INVALID_ARG);
*owner = (rmt_mem_owner_t) RMT.conf_ch[channel].conf1.mem_owner;
return ESP_OK;
}
esp_err_t rmt_set_tx_loop_mode(rmt_channel_t channel, bool loop_en)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&rmt_spinlock);
RMT.conf_ch[channel].conf1.tx_conti_mode = loop_en;
portEXIT_CRITICAL(&rmt_spinlock);
return ESP_OK;
}
esp_err_t rmt_get_tx_loop_mode(rmt_channel_t channel, bool* loop_en)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
*loop_en = (bool) RMT.conf_ch[channel].conf1.tx_conti_mode;
return ESP_OK;
}
esp_err_t rmt_set_rx_filter(rmt_channel_t channel, bool rx_filter_en, uint8_t thresh)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&rmt_spinlock);
RMT.conf_ch[channel].conf1.rx_filter_en = rx_filter_en;
RMT.conf_ch[channel].conf1.rx_filter_thres = thresh;
portEXIT_CRITICAL(&rmt_spinlock);
return ESP_OK;
}
esp_err_t rmt_set_source_clk(rmt_channel_t channel, rmt_source_clk_t base_clk)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(base_clk < RMT_BASECLK_MAX, RMT_BASECLK_ERROR_STR, ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&rmt_spinlock);
RMT.conf_ch[channel].conf1.ref_always_on = base_clk;
portEXIT_CRITICAL(&rmt_spinlock);
return ESP_OK;
}
esp_err_t rmt_get_source_clk(rmt_channel_t channel, rmt_source_clk_t* src_clk)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
*src_clk = (rmt_source_clk_t) (RMT.conf_ch[channel].conf1.ref_always_on);
return ESP_OK;
}
esp_err_t rmt_set_idle_level(rmt_channel_t channel, bool idle_out_en, rmt_idle_level_t level)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(level < RMT_IDLE_LEVEL_MAX, "RMT IDLE LEVEL ERR", ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&rmt_spinlock);
RMT.conf_ch[channel].conf1.idle_out_en = idle_out_en;
RMT.conf_ch[channel].conf1.idle_out_lv = level;
portEXIT_CRITICAL(&rmt_spinlock);
return ESP_OK;
}
esp_err_t rmt_get_status(rmt_channel_t channel, uint32_t* status)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
*status = RMT.status_ch[channel];
return ESP_OK;
}
rmt_data_mode_t rmt_get_data_mode()
{
return (rmt_data_mode_t) (RMT.apb_conf.fifo_mask);
}
void rmt_set_intr_enable_mask(uint32_t mask)
{
portENTER_CRITICAL(&rmt_spinlock);
RMT.int_ena.val |= mask;
portEXIT_CRITICAL(&rmt_spinlock);
}
void rmt_clr_intr_enable_mask(uint32_t mask)
{
portENTER_CRITICAL(&rmt_spinlock);
RMT.int_ena.val &= (~mask);
portEXIT_CRITICAL(&rmt_spinlock);
}
esp_err_t rmt_set_rx_intr_en(rmt_channel_t channel, bool en)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
if(en) {
rmt_set_intr_enable_mask(BIT(channel * 3 + 1));
} else {
rmt_clr_intr_enable_mask(BIT(channel * 3 + 1));
}
return ESP_OK;
}
esp_err_t rmt_set_err_intr_en(rmt_channel_t channel, bool en)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
if(en) {
rmt_set_intr_enable_mask(BIT(channel * 3 + 2));
} else {
rmt_clr_intr_enable_mask(BIT(channel * 3 + 2));
}
return ESP_OK;
}
esp_err_t rmt_set_tx_intr_en(rmt_channel_t channel, bool en)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
if(en) {
rmt_set_intr_enable_mask(BIT(channel * 3));
} else {
rmt_clr_intr_enable_mask(BIT(channel * 3));
}
return ESP_OK;
}
esp_err_t rmt_set_evt_intr_en(rmt_channel_t channel, bool en, uint16_t evt_thresh)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(evt_thresh < 256, "RMT EVT THRESH ERR", ESP_ERR_INVALID_ARG);
if(en) {
RMT.tx_lim_ch[channel].limit = evt_thresh;
rmt_set_tx_wrap_en(channel, true);
rmt_set_intr_enable_mask(BIT(channel + 24));
} else {
rmt_clr_intr_enable_mask(BIT(channel + 24));
}
return ESP_OK;
}
esp_err_t rmt_set_pin(rmt_channel_t channel, rmt_mode_t mode, gpio_num_t gpio_num)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(mode < RMT_MODE_MAX, RMT_MODE_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(((GPIO_IS_VALID_GPIO(gpio_num) && (mode == RMT_MODE_RX)) || (GPIO_IS_VALID_OUTPUT_GPIO(gpio_num) && (mode == RMT_MODE_TX))),
RMT_GPIO_ERROR_STR, ESP_ERR_INVALID_ARG);
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[gpio_num], 2);
if(mode == RMT_MODE_TX) {
gpio_set_direction(gpio_num, GPIO_MODE_OUTPUT);
gpio_matrix_out(gpio_num, RMT_SIG_OUT0_IDX + channel, 0, 0);
} else {
gpio_set_direction(gpio_num, GPIO_MODE_INPUT);
gpio_matrix_in(gpio_num, RMT_SIG_IN0_IDX + channel, 0);
}
return ESP_OK;
}
esp_err_t rmt_config(rmt_config_t* rmt_param)
{
uint8_t mode = rmt_param->rmt_mode;
uint8_t channel = rmt_param->channel;
uint8_t gpio_num = rmt_param->gpio_num;
uint8_t mem_cnt = rmt_param->mem_block_num;
int clk_div = rmt_param->clk_div;
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(GPIO_IS_VALID_GPIO(gpio_num), RMT_GPIO_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK((mem_cnt + channel <= 8 && mem_cnt > 0), RMT_MEM_CNT_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK((clk_div > 0), RMT_CLK_DIV_ERROR_STR, ESP_ERR_INVALID_ARG);
periph_module_enable(PERIPH_RMT_MODULE);
RMT.conf_ch[channel].conf0.div_cnt = clk_div;
/*Visit data use memory not FIFO*/
rmt_set_data_mode(RMT_DATA_MODE_MEM);
/*Reset tx/rx memory index */
portENTER_CRITICAL(&rmt_spinlock);
RMT.conf_ch[channel].conf1.mem_rd_rst = 1;
RMT.conf_ch[channel].conf1.mem_wr_rst = 1;
portEXIT_CRITICAL(&rmt_spinlock);
if(mode == RMT_MODE_TX) {
uint32_t rmt_source_clk_hz = 0;
uint32_t carrier_freq_hz = rmt_param->tx_config.carrier_freq_hz;
uint16_t carrier_duty_percent = rmt_param->tx_config.carrier_duty_percent;
uint8_t carrier_level = rmt_param->tx_config.carrier_level;
uint8_t idle_level = rmt_param->tx_config.idle_level;
portENTER_CRITICAL(&rmt_spinlock);
RMT.conf_ch[channel].conf1.tx_conti_mode = rmt_param->tx_config.loop_en;
/*Memory set block number*/
RMT.conf_ch[channel].conf0.mem_size = mem_cnt;
RMT.conf_ch[channel].conf1.mem_owner = RMT_MEM_OWNER_TX;
/*We use APB clock in this version, which is 80Mhz, later we will release system reference clock*/
RMT.conf_ch[channel].conf1.ref_always_on = RMT_BASECLK_APB;
rmt_source_clk_hz = RMT_SOURCE_CLK(RMT_BASECLK_APB);
/*Set idle level */
RMT.conf_ch[channel].conf1.idle_out_en = rmt_param->tx_config.idle_output_en;
RMT.conf_ch[channel].conf1.idle_out_lv = idle_level;
portEXIT_CRITICAL(&rmt_spinlock);
/*Set carrier*/
uint32_t duty_div, duty_h, duty_l;
duty_div = rmt_source_clk_hz / carrier_freq_hz;
duty_h = duty_div * carrier_duty_percent / 100;
duty_l = duty_div - duty_h;
RMT.conf_ch[channel].conf0.carrier_out_lv = carrier_level;
RMT.carrier_duty_ch[channel].high = duty_h;
RMT.carrier_duty_ch[channel].low = duty_l;
RMT.conf_ch[channel].conf0.carrier_en = rmt_param->tx_config.carrier_en;
ESP_LOGD(RMT_TAG, "Rmt Tx Channel %u|Gpio %u|Sclk_Hz %u|Div %u|Carrier_Hz %u|Duty %u",
channel, gpio_num, rmt_source_clk_hz, clk_div, carrier_freq_hz, carrier_duty_percent);
}
else if(RMT_MODE_RX == mode) {
uint8_t filter_cnt = rmt_param->rx_config.filter_ticks_thresh;
uint16_t threshold = rmt_param->rx_config.idle_threshold;
portENTER_CRITICAL(&rmt_spinlock);
/*clock init*/
RMT.conf_ch[channel].conf1.ref_always_on = RMT_BASECLK_APB;
uint32_t rmt_source_clk_hz = RMT_SOURCE_CLK(RMT_BASECLK_APB);
/*memory set block number and owner*/
RMT.conf_ch[channel].conf0.mem_size = mem_cnt;
RMT.conf_ch[channel].conf1.mem_owner = RMT_MEM_OWNER_RX;
/*Set idle threshold*/
RMT.conf_ch[channel].conf0.idle_thres = threshold;
/* Set RX filter */
RMT.conf_ch[channel].conf1.rx_filter_thres = filter_cnt;
RMT.conf_ch[channel].conf1.rx_filter_en = rmt_param->rx_config.filter_en;
portEXIT_CRITICAL(&rmt_spinlock);
ESP_LOGD(RMT_TAG, "Rmt Rx Channel %u|Gpio %u|Sclk_Hz %u|Div %u|Thresold %u|Filter %u",
channel, gpio_num, rmt_source_clk_hz, clk_div, threshold, filter_cnt);
}
rmt_set_pin(channel, mode, gpio_num);
return ESP_OK;
}
static void IRAM_ATTR rmt_fill_memory(rmt_channel_t channel, rmt_item32_t* item, uint16_t item_num, uint16_t mem_offset)
{
portENTER_CRITICAL(&rmt_spinlock);
RMT.apb_conf.fifo_mask = RMT_DATA_MODE_MEM;
portEXIT_CRITICAL(&rmt_spinlock);
int i;
for(i = 0; i < item_num; i++) {
RMTMEM.chan[channel].data32[i + mem_offset].val = item[i].val;
}
}
esp_err_t rmt_fill_tx_items(rmt_channel_t channel, rmt_item32_t* item, uint16_t item_num, uint16_t mem_offset)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, (0));
RMT_CHECK((item != NULL), RMT_ADDR_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK((item_num > 0), RMT_DRIVER_LENGTH_ERROR_STR, ESP_ERR_INVALID_ARG);
/*Each block has 64 x 32 bits of data*/
uint8_t mem_cnt = RMT.conf_ch[channel].conf0.mem_size;
RMT_CHECK((mem_cnt * RMT_MEM_ITEM_NUM >= item_num), RMT_WR_MEM_OVF_ERROR_STR, ESP_ERR_INVALID_ARG);
rmt_fill_memory(channel, item, item_num, mem_offset);
return ESP_OK;
}
esp_err_t rmt_isr_register(uint8_t rmt_intr_num, void (*fn)(void*), void * arg)
{
RMT_CHECK((fn != NULL), RMT_ADDR_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(s_rmt_driver_installed == false, "RMT DRIVER INSTALLED, CAN NOT REG ISR HANDLER", ESP_FAIL);
portENTER_CRITICAL(&rmt_spinlock);
ESP_INTR_DISABLE(rmt_intr_num);
intr_matrix_set(xPortGetCoreID(), ETS_RMT_INTR_SOURCE, rmt_intr_num);
xt_set_interrupt_handler(rmt_intr_num, fn, arg);
ESP_INTR_ENABLE(rmt_intr_num);
portEXIT_CRITICAL(&rmt_spinlock);
return ESP_OK;
}
static int IRAM_ATTR rmt_get_mem_len(rmt_channel_t channel)
{
int block_num = RMT.conf_ch[channel].conf0.mem_size;
int item_block_len = block_num * RMT_MEM_ITEM_NUM;
volatile rmt_item32_t* data = RMTMEM.chan[channel].data32;
int idx;
for(idx = 0; idx < item_block_len; idx++) {
if(data[idx].duration0 == 0) {
return idx;
} else if(data[idx].duration1 == 0) {
return idx + 1;
}
}
return idx;
}
static void IRAM_ATTR rmt_driver_isr_default(void* arg)
{
uint32_t intr_st = RMT.int_st.val;
uint32_t i = 0;
uint8_t channel;
portBASE_TYPE HPTaskAwoken = 0;
for(i = 0; i < 32; i++) {
if(i < 24) {
if(intr_st & (BIT(i))) {
channel = i / 3;
rmt_obj_t* p_rmt = p_rmt_obj[channel];
switch(i % 3) {
//TX END
case 0:
ESP_EARLY_LOGD(RMT_TAG, "RMT INTR : TX END\n");
xSemaphoreGiveFromISR(p_rmt->tx_sem, &HPTaskAwoken);
if(HPTaskAwoken == pdTRUE) {
portYIELD_FROM_ISR();
}
p_rmt->tx_data = NULL;
p_rmt->tx_len_rem = 0;
p_rmt->tx_offset = 0;
p_rmt->tx_sub_len = 0;
break;
//RX_END
case 1:
ESP_EARLY_LOGD(RMT_TAG, "RMT INTR : RX END");
RMT.conf_ch[channel].conf1.rx_en = 0;
int item_len = rmt_get_mem_len(channel);
//change memory owner to protect data.
RMT.conf_ch[channel].conf1.mem_owner = RMT_MEM_OWNER_TX;
if(p_rmt->rx_buf) {
BaseType_t res = xRingbufferSendFromISR(p_rmt->rx_buf, (void*) RMTMEM.chan[channel].data32, item_len * 4, &HPTaskAwoken);
if(res == pdFALSE) {
ESP_LOGE(RMT_TAG, "RMT RX BUFFER FULL");
} else {
}
if(HPTaskAwoken == pdTRUE) {
portYIELD_FROM_ISR();
}
} else {
ESP_EARLY_LOGE(RMT_TAG, "RMT RX BUFFER ERROR\n");
}
RMT.conf_ch[channel].conf1.mem_wr_rst = 1;
RMT.conf_ch[channel].conf1.mem_owner = RMT_MEM_OWNER_RX;
RMT.conf_ch[channel].conf1.rx_en = 1;
break;
//ERR
case 2:
ESP_EARLY_LOGE(RMT_TAG, "RMT[%d] ERR", channel);
ESP_EARLY_LOGE(RMT_TAG, "status: 0x%08x", RMT.status_ch[channel]);
RMT.int_ena.val &= (~(BIT(i)));
break;
default:
break;
}
RMT.int_clr.val = BIT(i);
}
} else {
if(intr_st & (BIT(i))) {
channel = i - 24;
rmt_obj_t* p_rmt = p_rmt_obj[channel];
RMT.int_clr.val = BIT(i);
ESP_EARLY_LOGD(RMT_TAG, "RMT CH[%d]: EVT INTR", channel);
if(p_rmt->tx_data == NULL) {
//skip
} else {
rmt_item32_t* pdata = p_rmt->tx_data;
int len_rem = p_rmt->tx_len_rem;
if(len_rem >= p_rmt->tx_sub_len) {
rmt_fill_memory(channel, pdata, p_rmt->tx_sub_len, p_rmt->tx_offset);
p_rmt->tx_data += p_rmt->tx_sub_len;
p_rmt->tx_len_rem -= p_rmt->tx_sub_len;
} else if(len_rem == 0) {
RMTMEM.chan[channel].data32[p_rmt->tx_offset].val = 0;
} else {
rmt_fill_memory(channel, pdata, len_rem, p_rmt->tx_offset);
RMTMEM.chan[channel].data32[p_rmt->tx_offset + len_rem].val = 0;
p_rmt->tx_data += len_rem;
p_rmt->tx_len_rem -= len_rem;
}
if(p_rmt->tx_offset == 0) {
p_rmt->tx_offset = p_rmt->tx_sub_len;
} else {
p_rmt->tx_offset = 0;
}
}
}
}
}
}
esp_err_t rmt_driver_uninstall(rmt_channel_t channel)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
if(p_rmt_obj[channel] == NULL) {
return ESP_OK;
}
xSemaphoreTake(p_rmt_obj[channel]->tx_sem, portMAX_DELAY);
rmt_set_rx_intr_en(channel, 0);
rmt_set_err_intr_en(channel, 0);
rmt_set_tx_intr_en(channel, 0);
rmt_set_evt_intr_en(channel, 0, 0xffff);
if(p_rmt_obj[channel]->tx_sem) {
vSemaphoreDelete(p_rmt_obj[channel]->tx_sem);
p_rmt_obj[channel]->tx_sem = NULL;
}
if(p_rmt_obj[channel]->rx_buf) {
vRingbufferDelete(p_rmt_obj[channel]->rx_buf);
p_rmt_obj[channel]->rx_buf = NULL;
}
free(p_rmt_obj[channel]);
p_rmt_obj[channel] = NULL;
s_rmt_driver_installed = false;
return ESP_OK;
}
esp_err_t rmt_driver_install(rmt_channel_t channel, size_t rx_buf_size, int rmt_intr_num)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
if(p_rmt_obj[channel] != NULL) {
ESP_LOGD(RMT_TAG, "RMT DRIVER ALREADY INSTALLED");
return ESP_FAIL;
}
ESP_INTR_DISABLE(rmt_intr_num);
p_rmt_obj[channel] = (rmt_obj_t*) malloc(sizeof(rmt_obj_t));
if(p_rmt_obj[channel] == NULL) {
ESP_LOGE(RMT_TAG, "RMT driver malloc error");
return ESP_FAIL;
}
memset(p_rmt_obj[channel], 0, sizeof(rmt_obj_t));
p_rmt_obj[channel]->tx_len_rem = 0;
p_rmt_obj[channel]->tx_data = NULL;
p_rmt_obj[channel]->channel = channel;
p_rmt_obj[channel]->tx_offset = 0;
p_rmt_obj[channel]->tx_sub_len = 0;
if(p_rmt_obj[channel]->tx_sem == NULL) {
p_rmt_obj[channel]->tx_sem = xSemaphoreCreateBinary();
xSemaphoreGive(p_rmt_obj[channel]->tx_sem);
}
if(p_rmt_obj[channel]->rx_buf == NULL && rx_buf_size > 0) {
p_rmt_obj[channel]->rx_buf = xRingbufferCreate(rx_buf_size, RINGBUF_TYPE_NOSPLIT);
rmt_set_rx_intr_en(channel, 1);
rmt_set_err_intr_en(channel, 1);
}
if(s_rmt_driver_installed == false) {
rmt_isr_register(rmt_intr_num, rmt_driver_isr_default, NULL);
s_rmt_driver_installed = true;
}
rmt_set_tx_intr_en(channel, 1);
ESP_INTR_ENABLE(rmt_intr_num);
return ESP_OK;
}
esp_err_t rmt_write_items(rmt_channel_t channel, rmt_item32_t* rmt_item, int item_num, bool wait_tx_done)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(p_rmt_obj[channel] != NULL, RMT_DRIVER_ERROR_STR, ESP_FAIL);
RMT_CHECK(rmt_item != NULL, RMT_ADDR_ERROR_STR, ESP_FAIL);
RMT_CHECK(item_num > 0, RMT_DRIVER_LENGTH_ERROR_STR, ESP_ERR_INVALID_ARG);
rmt_obj_t* p_rmt = p_rmt_obj[channel];
int block_num = RMT.conf_ch[channel].conf0.mem_size;
int item_block_len = block_num * RMT_MEM_ITEM_NUM;
int item_sub_len = block_num * RMT_MEM_ITEM_NUM / 2;
int len_rem = item_num;
xSemaphoreTake(p_rmt->tx_sem, portMAX_DELAY);
// fill the memory block first
if(item_num >= item_block_len) {
rmt_fill_memory(channel, rmt_item, item_block_len, 0);
RMT.tx_lim_ch[channel].limit = item_sub_len;
RMT.apb_conf.mem_tx_wrap_en = 1;
len_rem -= item_block_len;
RMT.conf_ch[channel].conf1.tx_conti_mode = 0;
rmt_set_evt_intr_en(channel, 1, item_sub_len);
p_rmt->tx_data = rmt_item + item_block_len;
p_rmt->tx_len_rem = len_rem;
p_rmt->tx_offset = 0;
p_rmt->tx_sub_len = item_sub_len;
} else {
rmt_fill_memory(channel, rmt_item, len_rem, 0);
RMTMEM.chan[channel].data32[len_rem].val = 0;
len_rem = 0;
}
rmt_tx_start(channel, true);
if(wait_tx_done) {
xSemaphoreTake(p_rmt->tx_sem, portMAX_DELAY);
xSemaphoreGive(p_rmt->tx_sem);
}
return ESP_OK;
}
esp_err_t rmt_wait_tx_done(rmt_channel_t channel)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(p_rmt_obj[channel] != NULL, RMT_DRIVER_ERROR_STR, ESP_FAIL);
xSemaphoreTake(p_rmt_obj[channel]->tx_sem, portMAX_DELAY);
xSemaphoreGive(p_rmt_obj[channel]->tx_sem);
return ESP_OK;
}
esp_err_t rmt_get_ringbuf_handler(rmt_channel_t channel, RingbufHandle_t* buf_handler)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(p_rmt_obj[channel] != NULL, RMT_DRIVER_ERROR_STR, ESP_FAIL);
RMT_CHECK(buf_handler != NULL, RMT_ADDR_ERROR_STR, ESP_ERR_INVALID_ARG);
*buf_handler = p_rmt_obj[channel]->rx_buf;
return ESP_OK;
}

8
components/esp32/include/esp_event.h
View file

@ -44,6 +44,7 @@ typedef enum {
SYSTEM_EVENT_AP_STACONNECTED, /**< a station connected to ESP32 soft-AP */
SYSTEM_EVENT_AP_STADISCONNECTED, /**< a station disconnected from ESP32 soft-AP */
SYSTEM_EVENT_AP_PROBEREQRECVED, /**< Receive probe request packet in soft-AP interface */
SYSTEM_EVENT_AP_STA_GOT_IP6, /**< ESP32 station or ap interface v6IP addr is preferred */
SYSTEM_EVENT_MAX
} system_event_id_t;
@ -79,7 +80,11 @@ typedef struct {
typedef struct {
uint8_t pin_code[8]; /**< PIN code of station in enrollee mode */
}system_event_sta_wps_er_pin_t;
} system_event_sta_wps_er_pin_t;
typedef struct {
tcpip_adapter_ip6_info_t ip6_info;
} system_event_ap_sta_got_ip6_t;
typedef struct {
uint8_t mac[6]; /**< MAC address of the station connected to ESP32 soft-AP */
@ -106,6 +111,7 @@ typedef union {
system_event_ap_staconnected_t sta_connected; /**< a station connected to ESP32 soft-AP */
system_event_ap_stadisconnected_t sta_disconnected; /**< a station disconnected to ESP32 soft-AP */
system_event_ap_probe_req_rx_t ap_probereqrecved; /**< ESP32 soft-AP receive probe request packet */
system_event_ap_sta_got_ip6_t got_ip6; /**< ESP32 station or ap ipv6 addr state change to preferred */
} system_event_info_t;
typedef struct {

120
components/esp32/include/esp_intr.h
View file

@ -82,126 +82,6 @@ extern "C" {
#define ESP_INTR_DISABLE(inum) \
xt_ints_off((1<<inum))
#define ESP_CCOMPARE_INTR_ENBALE() \
ESP_INTR_ENABLE(ETS_CCOMPARE_INUM)
#define ESP_CCOMPARE_INTR_DISBALE() \
ESP_INTR_DISABLE(ETS_CCOMPARE_INUM)
#define ESP_SPI1_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_SPI1_INUM)
#define ESP_SPI1_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_SPI1_INUM)
#define ESP_SPI2_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_SPI2_INUM)
#define ESP_PWM_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_PWM_INUM)
#define ESP_PWM_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_PWM_INUM)
#define ESP_SPI2_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_SPI2_INUM)
#define ESP_SPI3_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_SPI3_INUM)
#define ESP_SPI3_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_SPI3_INUM)
#define ESP_I2S0_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_I2S0_INUM)
#define ESP_I2S0_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_I2S0_INUM)
#define ESP_I2S1_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_I2S1_INUM)
#define ESP_I2S1_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_I2S1_INUM)
#define ESP_MPWM_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_MPWM_INUM)
#define ESP_EPWM_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_EPWM_INUM)
#define ESP_MPWM_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_MPWM_INUM)
#define ESP_EPWM_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_EPWM_INUM)
#define ESP_BB_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_BB_INUM)
#define ESP_BB_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_BB_INUM)
#define ESP_UART0_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_UART0_INUM)
#define ESP_UART0_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_UART0_INUM)
#define ESP_LEDC_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_LEDC_INUM)
#define ESP_LEDC_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_LEDC_INUM)
#define ESP_GPIO_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_GPIO_INUM)
#define ESP_GPIO_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_GPIO_INUM)
#define ESP_WDT_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_WDT_INUM)
#define ESP_WDT_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_WDT_INUM)
#define ESP_FRC1_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_FRC_TIMER1_INUM)
#define ESP_FRC1_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_FRC_TIMER1_INUM)
#define ESP_FRC2_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_FRC_TIMER2_INUM)
#define ESP_FRC2_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_FRC_TIMER2_INUM)
#define ESP_RTC_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_RTC_INUM)
#define ESP_RTC_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_RTC_INUM)
#define ESP_SLC_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_SLC_INUM)
#define ESP_SLC_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_SLC_INUM)
#define ESP_PCNT_INTR_ENABLE() \
ESP_INTR_ENABLE(ETS_PCNT_INUM)
#define ESP_PCNT_INTR_DISABLE() \
ESP_INTR_DISABLE(ETS_PCNT_INUM)
#define ESP_RMT_CTRL_ENABLE() \
ESP_INTR_ENABLE(ETS_RMT_CTRL_INUM)
#define ESP_RMT_CTRL_DIABLE() \
ESP_INTR_DISABLE(ETS_RMT_CTRL_INUM)
#ifdef __cplusplus
}
#endif

37
components/esp32/include/soc/hwcrypto_reg.h Normal file
View file

@ -0,0 +1,37 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef __HWCRYPTO_REG_H__
#define __HWCRYPTO_REG_H__
#include "soc.h"
/* registers for RSA acceleration via Multiple Precision Integer ops */
#define RSA_MEM_M_BLOCK_BASE ((DR_REG_RSA_BASE)+0x000)
/* RB & Z use the same memory block, depending on phase of operation */
#define RSA_MEM_RB_BLOCK_BASE ((DR_REG_RSA_BASE)+0x200)
#define RSA_MEM_Z_BLOCK_BASE ((DR_REG_RSA_BASE)+0x200)
#define RSA_MEM_Y_BLOCK_BASE ((DR_REG_RSA_BASE)+0x400)
#define RSA_MEM_X_BLOCK_BASE ((DR_REG_RSA_BASE)+0x600)
#define RSA_M_DASH_REG (DR_REG_RSA_BASE + 0x800)
#define RSA_MODEXP_MODE_REG (DR_REG_RSA_BASE + 0x804)
#define RSA_START_MODEXP_REG (DR_REG_RSA_BASE + 0x808)
#define RSA_MULT_MODE_REG (DR_REG_RSA_BASE + 0x80c)
#define RSA_MULT_START_REG (DR_REG_RSA_BASE + 0x810)
#define RSA_INTERRUPT_REG (DR_REG_RSA_BASE + 0X814)
#define RSA_CLEAN_ADDR (DR_REG_RSA_BASE + 0X818)
#endif

3
components/esp32/include/soc/rmt_reg.h
View file

@ -2163,7 +2163,8 @@
#define RMT_DATE_V 0xFFFFFFFF
#define RMT_DATE_S 0
/* RMT memory block address */
#define RMT_CHANNEL_MEM(i) (DR_REG_RMT_BASE + 0x800 + 64 * 4 * (i))
#endif /*_SOC_RMT_REG_H_ */

35
components/esp32/include/soc/rmt_struct.h
View file

@ -226,18 +226,35 @@ typedef volatile struct {
} rmt_dev_t;
extern rmt_dev_t RMT;
//Allow access to RMT memory using RMTMEM.chan[0].data[8]
typedef struct {
union {
struct {
uint32_t duration0 :15;
uint32_t level0 :1;
uint32_t duration1 :15;
uint32_t level1 :1;
};
uint32_t val;
};
} rmt_item32_t;
typedef struct {
union {
struct {
uint16_t duration :15;
uint16_t level :1;
};
uint16_t val;
};
} rmt_item16_t;
//Allow access to RMT memory using RMTMEM.chan[0].data32[8]
typedef volatile struct {
struct {
union {
struct {
uint32_t duration0: 15;
uint32_t level0: 1;
uint32_t duration1: 15;
uint32_t level1: 1;
};
uint32_t val;
} data[64];
rmt_item32_t data32[64];
rmt_item16_t data16[128];
};
} chan[8];
} rmt_mem_t;
extern rmt_mem_t RMTMEM;

1
components/esp32/include/soc/soc.h
View file

@ -141,6 +141,7 @@
//}}
#define DR_REG_DPORT_BASE 0x3ff00000
#define DR_REG_RSA_BASE 0x3ff02000
#define DR_REG_UART_BASE 0x3ff40000
#define DR_REG_SPI1_BASE 0x3ff42000
#define DR_REG_SPI0_BASE 0x3ff43000

2
components/esp32/lib

@ -1 +1 @@
Subproject commit ea9c156e8a67d27623eab6f98ce5a55a00c8fb19
Subproject commit e2e5781dc27e638c5e63f85bc23590dd21af1619

9
components/esp32/test/Kconfig Normal file
View file

@ -0,0 +1,9 @@
menu "TESTS"
config FP_TEST_ENABLE
bool "Enable test fp"
default "y"
help
For FPGA single core CPU which has no floating point support, floating point test should be disabled.
endmenu

17
components/esp32/test/component.mk Normal file
View file

@ -0,0 +1,17 @@
#
#Component Makefile
#
COMPONENT_EXTRA_CLEAN := test_tjpgd_logo.h
COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive
COMPONENT_SRCDIRS := . test_vectors
include $(IDF_PATH)/make/component_common.mk
test_tjpgd.o: test_tjpgd_logo.h
test_tjpgd_logo.h: $(COMPONENT_PATH)/logo.jpg
$(summary) XXD logo.jpg
$(Q) cd $(COMPONENT_PATH); xxd -i logo.jpg $(COMPONENT_BUILD_DIR)/test_tjpgd_logo.h

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components/esp32/test/logo.jpg Normal file
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293
components/esp32/test/test_ahb_arb.c Normal file
View file

@ -0,0 +1,293 @@
#include <esp_types.h>
#include <stdio.h>
#include <stdlib.h>
#include "rom/ets_sys.h"
#include "rom/lldesc.h"
#include "rom/gpio.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "freertos/queue.h"
#include "freertos/xtensa_api.h"
#include "unity.h"
#include "soc/uart_reg.h"
#include "soc/dport_reg.h"
#include "soc/io_mux_reg.h"
#include "soc/gpio_sig_map.h"
#include "soc/gpio_reg.h"
#include "soc/i2s_reg.h"
#define DPORT_I2S0_CLK_EN (BIT(4))
#define DPORT_I2S0_RST (BIT(4))
/*
This test tests the s32c1i instruction when the AHB bus is also used. To create some AHB traffic, we use the I2S interface
to copy bytes over from one memory location to another. DO NOT USE the i2s routines inhere, they've been trial-and-error'ed until
the point where they happened to do what I want.
*/
static void lcdIfaceInit()
{
SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S0_CLK_EN);
CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST);
//Init pins to i2s functions
SET_PERI_REG_MASK(GPIO_ENABLE_W1TS_REG, (1 << 11) | (1 << 3) | (1 << 0) | (1 << 2) | (1 << 5) | (1 << 16) | (1 << 17) | (1 << 18) | (1 << 19) | (1 << 20)); //ENABLE GPIO oe_enable
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO0_U, 0);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, 0);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO5_U, 0);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO16_U, 0);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO17_U, 0);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO18_U, 0);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO19_U, 0);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO20_U, 0);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CMD_U, 2); //11
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO26_U, 0); //RS
WRITE_PERI_REG(GPIO_FUNC0_OUT_SEL_CFG_REG, (148 << GPIO_FUNC0_OUT_SEL_S));
WRITE_PERI_REG(GPIO_FUNC2_OUT_SEL_CFG_REG, (149 << GPIO_FUNC0_OUT_SEL_S));
WRITE_PERI_REG(GPIO_FUNC5_OUT_SEL_CFG_REG, (150 << GPIO_FUNC0_OUT_SEL_S));
WRITE_PERI_REG(GPIO_FUNC16_OUT_SEL_CFG_REG, (151 << GPIO_FUNC0_OUT_SEL_S));
WRITE_PERI_REG(GPIO_FUNC17_OUT_SEL_CFG_REG, (152 << GPIO_FUNC0_OUT_SEL_S));
WRITE_PERI_REG(GPIO_FUNC18_OUT_SEL_CFG_REG, (153 << GPIO_FUNC0_OUT_SEL_S));
WRITE_PERI_REG(GPIO_FUNC19_OUT_SEL_CFG_REG, (154 << GPIO_FUNC0_OUT_SEL_S));
WRITE_PERI_REG(GPIO_FUNC20_OUT_SEL_CFG_REG, (155 << GPIO_FUNC0_OUT_SEL_S));
WRITE_PERI_REG(GPIO_FUNC26_OUT_SEL_CFG_REG, (156 << GPIO_FUNC0_OUT_SEL_S)); //RS
WRITE_PERI_REG(GPIO_FUNC11_OUT_SEL_CFG_REG, (I2S0O_WS_OUT_IDX << GPIO_FUNC0_OUT_SEL_S));
// WRITE_PERI_REG(GPIO_FUNC11_OUT_SEL_CFG, (I2S0O_BCK_OUT_IDX<<GPIO_GPIO_FUNC0_OUT_SEL_S));
//GPIO_SET_GPIO_FUNC11_OUT_INV_SEL(1); //old
WRITE_PERI_REG(GPIO_FUNC11_OUT_SEL_CFG_REG, READ_PERI_REG(GPIO_FUNC11_OUT_SEL_CFG_REG) | GPIO_FUNC11_OUT_INV_SEL);
//Reset I2S subsystem
CLEAR_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_RESET | I2S_TX_RESET);
SET_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_RESET | I2S_TX_RESET);
CLEAR_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_RESET | I2S_TX_RESET);
WRITE_PERI_REG(I2S_CONF_REG(0), 0);//I2S_SIG_LOOPBACK);
WRITE_PERI_REG(I2S_CONF2_REG(0), 0);
WRITE_PERI_REG(I2S_SAMPLE_RATE_CONF_REG(0),
(16 << I2S_RX_BITS_MOD_S) |
(16 << I2S_TX_BITS_MOD_S) |
(1 << I2S_RX_BCK_DIV_NUM_S) |
(1 << I2S_TX_BCK_DIV_NUM_S));
WRITE_PERI_REG(I2S_CLKM_CONF_REG(0),
I2S_CLKA_ENA | I2S_CLK_EN |
(1 << I2S_CLKM_DIV_A_S) |
(1 << I2S_CLKM_DIV_B_S) |
(1 << I2S_CLKM_DIV_NUM_S));
WRITE_PERI_REG(I2S_FIFO_CONF_REG(0),
(32 << I2S_TX_DATA_NUM_S) | //Low watermark for IRQ
(32 << I2S_RX_DATA_NUM_S));
WRITE_PERI_REG(I2S_CONF1_REG(0), I2S_RX_PCM_BYPASS | I2S_TX_PCM_BYPASS);
WRITE_PERI_REG(I2S_CONF_CHAN_REG(0), (2 << I2S_TX_CHAN_MOD_S) | (2 << I2S_RX_CHAN_MOD_S));
//Invert WS to active-low
SET_PERI_REG_MASK(I2S_CONF_REG(0), I2S_TX_RIGHT_FIRST | I2S_RX_RIGHT_FIRST);
WRITE_PERI_REG(I2S_TIMING_REG(0), 0);
}
static volatile lldesc_t dmaDesc[2];
static void finishDma()
{
//No need to finish if no DMA transfer going on
if (!(READ_PERI_REG(I2S_FIFO_CONF_REG(0))&I2S_DSCR_EN)) {
return;
}
//Wait till fifo done
while (!(READ_PERI_REG(I2S_INT_RAW_REG(0))&I2S_TX_REMPTY_INT_RAW)) ;
//Wait for last bytes to leave i2s xmit thing
//ToDo: poll bit in next hw
// for (i=0; i<(1<<8); i++);
while (!(READ_PERI_REG(I2S_STATE_REG(0))&I2S_TX_IDLE));
//Reset I2S for next transfer
CLEAR_PERI_REG_MASK(I2S_CONF_REG(0), I2S_TX_START | I2S_RX_START);
CLEAR_PERI_REG_MASK(I2S_OUT_LINK_REG(0), I2S_OUTLINK_START | I2S_INLINK_START);
SET_PERI_REG_MASK(I2S_CONF_REG(0), I2S_TX_RESET | I2S_TX_FIFO_RESET | I2S_RX_RESET | I2S_RX_FIFO_RESET);
CLEAR_PERI_REG_MASK(I2S_CONF_REG(0), I2S_TX_RESET | I2S_TX_FIFO_RESET | I2S_RX_RESET | I2S_RX_FIFO_RESET);
// for (i=0; i<(1<<8); i++);
while ((READ_PERI_REG(I2S_STATE_REG(0))&I2S_TX_FIFO_RESET_BACK));
}
/*
This is a very, very, very hacked up LCD routine which ends up basically doing a memcpy from sbuf to rbuf.
*/
static void sendRecvBufDma(uint16_t *sbuf, uint16_t *rbuf, int len)
{
//Fill DMA descriptor
dmaDesc[0].length = len * 2;
dmaDesc[0].size = len * 2;
dmaDesc[0].owner = 1;
dmaDesc[0].sosf = 0;
dmaDesc[0].buf = (uint8_t *)sbuf;
dmaDesc[0].offset = 0; //unused in hw
dmaDesc[0].empty = 0;
dmaDesc[0].eof = 1;
dmaDesc[1].length = len * 2;
dmaDesc[1].size = len * 2;
dmaDesc[1].owner = 1;
dmaDesc[1].sosf = 0;
dmaDesc[1].buf = (uint8_t *)rbuf;
dmaDesc[1].offset = 0; //unused in hw
dmaDesc[1].empty = 0;
dmaDesc[1].eof = 1;
//Reset DMA
SET_PERI_REG_MASK(I2S_LC_CONF_REG(0), I2S_IN_RST | I2S_OUT_RST | I2S_AHBM_RST | I2S_AHBM_FIFO_RST);
CLEAR_PERI_REG_MASK(I2S_LC_CONF_REG(0), I2S_IN_RST | I2S_OUT_RST | I2S_AHBM_RST | I2S_AHBM_FIFO_RST);
//Reset I2S FIFO
SET_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_RESET | I2S_TX_RESET | I2S_TX_FIFO_RESET | I2S_RX_FIFO_RESET);
CLEAR_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_RESET | I2S_TX_RESET | I2S_TX_FIFO_RESET | I2S_RX_FIFO_RESET);
//Set desc addr
CLEAR_PERI_REG_MASK(I2S_OUT_LINK_REG(0), I2S_OUTLINK_ADDR);
SET_PERI_REG_MASK(I2S_OUT_LINK_REG(0), ((uint32_t)(&dmaDesc[0]))&I2S_OUTLINK_ADDR);
CLEAR_PERI_REG_MASK(I2S_IN_LINK_REG(0), I2S_INLINK_ADDR);
SET_PERI_REG_MASK(I2S_IN_LINK_REG(0), ((uint32_t)(&dmaDesc[1]))&I2S_INLINK_ADDR);
SET_PERI_REG_MASK(I2S_FIFO_CONF_REG(0), I2S_DSCR_EN); //Enable DMA mode
WRITE_PERI_REG(I2S_RXEOF_NUM_REG(0), len);
//Enable and configure DMA
WRITE_PERI_REG(I2S_LC_CONF_REG(0), I2S_OUT_DATA_BURST_EN |
I2S_OUT_EOF_MODE | I2S_OUTDSCR_BURST_EN | I2S_OUT_DATA_BURST_EN |
I2S_INDSCR_BURST_EN | I2S_MEM_TRANS_EN);
//Start transmission
SET_PERI_REG_MASK(I2S_OUT_LINK_REG(0), I2S_OUTLINK_START);
SET_PERI_REG_MASK(I2S_IN_LINK_REG(0), I2S_INLINK_START);
SET_PERI_REG_MASK(I2S_CONF_REG(0), I2S_TX_START | I2S_RX_START);
//Clear int flags
WRITE_PERI_REG(I2S_INT_CLR_REG(0), 0xFFFFFFFF);
}
#define DMALEN (2048-2)
static void tskLcd(void *pvParameters)
{
uint16_t *sbuf = malloc(DMALEN * 2);
uint16_t *rbuf = malloc(DMALEN * 2);
uint16_t xorval = 0;
int x;
lcdIfaceInit();
// lcdFlush();
while (1) {
for (x = 0; x < DMALEN; x++) {
sbuf[x] = x ^ xorval;
}
for (x = 0; x < DMALEN; x++) {
rbuf[x] = 0; //clear rbuf
}
sendRecvBufDma(sbuf, rbuf, DMALEN);
vTaskDelay(20 / portTICK_PERIOD_MS);
finishDma();
for (x = 0; x < DMALEN; x++) if (rbuf[x] != (x ^ xorval)) {
printf("Rxbuf err! pos %d val %x xor %x", x, (int)rbuf[x], (int)xorval);
}
printf(".");
fflush(stdout);
xorval++;
}
}
void test_s32c1i_lock(volatile int *lockvar, int lockval, int unlockval, volatile int *ctr);
static volatile int ctr = 0, state = 0;
static volatile int lock = 0;
static void tskOne(void *pvParameters)
{
int x;
int err = 0, run = 0;
while (1) {
ctr = 0; lock = 0;
state = 1;
for (x = 0; x < 16 * 1024; x++) {
test_s32c1i_lock(&lock, 1, 0, &ctr);
}
vTaskDelay(60 / portTICK_PERIOD_MS);
state = 2;
if (ctr != 16 * 1024 * 2) {
printf("Lock malfunction detected! Ctr=0x%x instead of %x\n", ctr, 16 * 1024 * 2);
err++;
}
run++;
printf("Run %d err %d\n", run, err);
vTaskDelay(20 / portTICK_PERIOD_MS);
}
}
#define FB2ADDR 0x40098000
static void tskTwo(void *pvParameters)
{
int x;
int *p = (int *)FB2ADDR;
int *s = (int *)test_s32c1i_lock;
void (*test_s32c1i_lock2)(volatile int * lockvar, int lockval, int unlockval, volatile int * ctr) = (void *)FB2ADDR;
volatile int w;
int delay;
for (x = 0; x < 100; x++) {
*p++ = *s++; //copy routine to different pool
}
while (1) {
while (state != 1) ;
for (x = 0; x < 16 * 1024; x++) {
test_s32c1i_lock2(&lock, 2, 0, &ctr);
//Some random delay to increase chance of weirdness
if ((x & 0x1f) == 0) {
delay = rand() & 0x1f;
for (w = 0; w < delay; w++);
}
}
while (state != 2);
}
}
TEST_CASE("S32C1I vs AHB test (needs I2S)", "[hw]")
{
int i;
TaskHandle_t th[3];
state = 0;
printf("Creating tasks\n");
xTaskCreatePinnedToCore(tskTwo , "tsktwo" , 2048, NULL, 3, &th[1], 1);
xTaskCreatePinnedToCore(tskOne , "tskone" , 2048, NULL, 3, &th[0], 0);
xTaskCreatePinnedToCore(tskLcd , "tsklcd" , 2048, NULL, 3, &th[2], 0);
// Let stuff run for 20s
while (1) {
vTaskDelay(20000 / portTICK_PERIOD_MS);
}
//Shut down all the tasks
for (i = 0; i < 3; i++) {
vTaskDelete(th[i]);
}
}

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/*
This little bit of code is executed in-place by one CPU, but copied to a different memory region
by the other CPU. Make sure it stays position-independent.
*/
.text
.align 4
.global test_s32c1i_lock
.type test_s32c1i_lock,@function
//Args:
//a2 - lock addr
//a3 - val to lock with
//a4 - val to unlock with
//a5 - addr to increase
test_s32c1i_lock:
entry a1, 64
wsr a4, SCOMPARE1
lockloop:
mov a6, a3
s32c1i a6, a2, 0
bne a4, a6, lockloop
l32i a6, a5, 0
//Give other CPU the time to mess up the inc if the lock somehow malfunctions
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
addi a6, a6, 1
s32i a6, a5, 0
//No need to actually let this loop but hey, a hang indicates an error, right?
wsr a3, SCOMPARE1
unlockloop:
mov a6, a4
s32c1i a6, a2, 0
bne a3, a6, unlockloop
retw

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#include <esp_types.h>
#include <stdio.h>
#include "rom/ets_sys.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "freertos/queue.h"
#include "freertos/xtensa_api.h"
#include "unity.h"
#include "soc/uart_reg.h"
#include "soc/dport_reg.h"
#include "soc/io_mux_reg.h"
/*
This test tests the 'fast' peripherial bus at 0x3ff40000. This bus is connected directly to the core, and as such
can receive 'speculative' reads, that is, reads that may or may not actually be executed in the code flow. This
may mess with any FIFOs mapped in the region: if a byte gets dropped due to a missed speculative read, the fifo
may advance to the next byte anyway.
This code tests reading/writing from the UART1 FIFO, using both cores. For this to work, it's required that the
UARTs RX and TX lines are connected.
*/
void test_fastbus_cp(int fifo_addr, unsigned char *buf, int len, int *dummy);
static volatile int state = 0;
static volatile int xor = 0;
static unsigned char res[128];
static void tskOne(void *pvParameters)
{
int run = 0, err = 0;
int x;
int ct[256];
volatile int w;
int dummy;
while (1) {
state = 1;
for (x = 0; x < 64; x++) {
WRITE_PERI_REG(UART_FIFO_REG(1), x ^ xor);
}
for (w = 0; w < (1 << 14); w++); //delay
state = 2;
test_fastbus_cp(UART_FIFO_REG(1), &res[0], 64, &dummy);
for (w = 0; w < (1 << 10); w++); //delay
for (x = 0; x < 255; x++) {
ct[x] = 0; //zero ctrs
}
for (x = 0; x < 128; x++) {
ct[(int)res[x]^xor]++; //count values
}
for (x = 0; x < 255; x++) { //check counts
if (ct[x] != (x < 128 ? 1 : 0)) {
//Disregard first few loops; there may be crap in the fifo.
if (run > 2) {
err++;
printf("Error! Received value %d %d times!\n", x, ct[x]);
}
}
}
run++;
if ((run & 255) == 0) {
printf("Loop %d errct %d\n", run, err);
}
xor = (xor + 1) & 0xff;
}
}
#define FB2ADDR 0x40098000
static void tskTwo(void *pvParameters)
{
int x;
int dummy;
int *p = (int *)FB2ADDR;
int *s = (int *)test_fastbus_cp;
for (x = 0; x < 100; x++) {
*p++ = *s++;
}
void (*test_fastbus_cp2)(int fifo_addr, unsigned char * buf, int len, int * dummy) = (void *)FB2ADDR;
while (1) {
while (state != 1) ;
for (x = 64; x < 128; x++) {
WRITE_PERI_REG(UART_FIFO_REG(1), x ^ xor);
}
while (state != 2);
test_fastbus_cp2(UART_FIFO_REG(1), &res[64], 64, &dummy);
}
}
// TODO: split this thing into separate orthogonal tests
TEST_CASE("Fast I/O bus test", "[hw]")
{
int i;
if ((REG_UART_BASE(0) >> 16) != 0x3ff4) {
printf("Error! Uart base isn't on fast bus.\n");
TEST_ASSERT(0);
}
PIN_PULLUP_DIS(PERIPHS_IO_MUX_SD_DATA3_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA2_U, FUNC_SD_DATA2_U1RXD);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA3_U, FUNC_SD_DATA3_U1TXD);
int reg_val = (1 << UART_RXFIFO_FULL_THRHD_S);
WRITE_PERI_REG(UART_CONF1_REG(1), reg_val);
WRITE_PERI_REG(UART_CLKDIV_REG(1), 0x30); //semi-random
// CLEAR_PERI_REG_MASK(UART_INT_ENA_REG(1), UART_TXFIFO_EMPTY_INT_ENA|UART_RXFIFO_TOUT_INT_ENA);
TaskHandle_t th[2];
printf("Creating tasks\n");
xTaskCreatePinnedToCore(tskOne , "tskone" , 2048, NULL, 3, &th[0], 0);
xTaskCreatePinnedToCore(tskTwo , "tsktwo" , 2048, NULL, 3, &th[1], 1);
// Let stuff run for 20s
while (1) {
vTaskDelay(20000 / portTICK_PERIOD_MS);
}
//Shut down all the tasks
for (i = 0; i < 2; i++) {
vTaskDelete(th[i]);
}
xt_ints_off(1 << ETS_UART0_INUM);
}

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/*
This little bit of code is executed in-place by one CPU, but copied to a different memory region
by the other CPU. Make sure it stays position-independent.
*/
.text
.align 4
.global test_fastbus_cp
.type test_fastbus_cp,@function
//Args:
//a2 - fifo addr
//a3 - buf addr
//a4 - len
//a5 - ptr to int to use
test_fastbus_cp:
entry a1,64
back:
beqi a4, 0, out //check if loop done
s32i a4, a5, 0 //store value, for shits and/or giggles
memw //make sure write happens
l32i a4, a5, 0 //load value again, to thwart any prediction in the pipeline
bbsi a4, 0, pred //Random jump to check predictive reads. Both branches should do the same.
l32i a6, a2, 0 //read from fifo 1
j predout
pred:
l32i a6, a2, 0 //read from fifo 2
predout:
s8i a6, a3, 0 //store result
addi a3, a3, 1 //inc ptr
addi a4, a4, -1 //next
j back //loop again
out:
retw //and we are done

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#include <math.h>
#include <stdio.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "unity.h"
#if CONFIG_FP_TEST_ENABLE
static float addsf(float a, float b)
{
float result;
asm volatile (
"wfr f0, %1\n"
"wfr f1, %2\n"
"add.s f2, f0, f1\n"
"rfr %0, f2\n"
:"=r"(result):"r"(a), "r"(b)
);
return result;
}
static float mulsf(float a, float b)
{
float result;
asm volatile (
"wfr f0, %1\n"
"wfr f1, %2\n"
"mul.s f2, f0, f1\n"
"rfr %0, f2\n"
:"=r"(result):"r"(a), "r"(b)
);
return result;
}
static float divsf(float a, float b)
{
float result;
asm volatile (
"wfr f0, %1\n"
"wfr f1, %2\n"
"div0.s f3, f1 \n"
"nexp01.s f4, f1 \n"
"const.s f5, 1 \n"
"maddn.s f5, f4, f3 \n"
"mov.s f6, f3 \n"
"mov.s f7, f1 \n"
"nexp01.s f8, f0 \n"
"maddn.s f6, f5, f3 \n"
"const.s f5, 1 \n"
"const.s f2, 0 \n"
"neg.s f9, f8 \n"
"maddn.s f5,f4,f6 \n"
"maddn.s f2, f0, f3 \n"
"mkdadj.s f7, f0 \n"
"maddn.s f6,f5,f6 \n"
"maddn.s f9,f4,f2 \n"
"const.s f5, 1 \n"
"maddn.s f5,f4,f6 \n"
"maddn.s f2,f9,f6 \n"
"neg.s f9, f8 \n"
"maddn.s f6,f5,f6 \n"
"maddn.s f9,f4,f2 \n"
"addexpm.s f2, f7 \n"
"addexp.s f6, f7 \n"
"divn.s f2,f9,f6\n"
"rfr %0, f2\n"
:"=r"(result):"r"(a), "r"(b)
);
return result;
}
static float sqrtsf(float a)
{
float result;
asm volatile (
"wfr f0, %1\n"
"sqrt0.s f2, f0\n"
"const.s f5, 0\n"
"maddn.s f5, f2, f2\n"
"nexp01.s f3, f0\n"
"const.s f4, 3\n"
"addexp.s f3, f4\n"
"maddn.s f4, f5, f3\n"
"nexp01.s f5, f0\n"
"neg.s f6, f5\n"
"maddn.s f2, f4, f2\n"
"const.s f1, 0\n"
"const.s f4, 0\n"
"const.s f7, 0\n"
"maddn.s f1, f6, f2\n"
"maddn.s f4, f2, f3\n"
"const.s f6, 3\n"
"maddn.s f7, f6, f2\n"
"maddn.s f5, f1, f1\n"
"maddn.s f6, f4, f2\n"
"neg.s f3, f7\n"
"maddn.s f1, f5, f3\n"
"maddn.s f7, f6, f7\n"
"mksadj.s f2, f0\n"
"nexp01.s f5, f0\n"
"maddn.s f5, f1, f1\n"
"neg.s f3, f7\n"
"addexpm.s f1, f2\n"
"addexp.s f3, f2\n"
"divn.s f1, f5, f3\n"
"rfr %0, f1\n"
:"=r"(result):"r"(a)
);
return result;
}
TEST_CASE("test FP add", "[fp]")
{
float a = 100.0f;
float b = 0.5f;
float c = addsf(a, b);
float eps = c - 100.5f;
printf("a=%g b=%g c=%g eps=%g\r\n", a, b, c, eps);
TEST_ASSERT_TRUE(fabs(eps) < 0.000001);
}
TEST_CASE("test FP mul", "[fp]")
{
float a = 100.0f;
float b = 0.05f;
float c = mulsf(a, b);
float eps = c - 5.0f;
printf("a=%g b=%g c=%g eps=%g\r\n", a, b, c, eps);
TEST_ASSERT_TRUE(fabs(eps) < 0.000001);
}
TEST_CASE("test FP div", "[fp]")
{
float a = 100.0f;
float b = 5.0f;
float c = divsf(a, b);
float eps = c - 20.0f;
printf("a=%g b=%g c=%g eps=%g\r\n", a, b, c, eps);
TEST_ASSERT_TRUE(fabs(eps) < 0.000001);
}
TEST_CASE("test FP sqrt", "[fp]")
{
float a = 100.0f;
float c = sqrtsf(a);
float eps = c - 10.0f;
printf("a=%g c=%g eps=%g\r\n", a, c, eps);
TEST_ASSERT_TRUE(fabs(eps) < 0.000001);
}
struct TestFPState {
int fail;
int done;
};
static const int testFpIter = 100000;
static void tskTestFP(void *pvParameters)
{
struct TestFPState *state = (struct TestFPState *) pvParameters;
for (int i = 0; i < testFpIter; ++i) {
// calculate zero in a slightly obscure way
float y = sqrtsf(addsf(1.0f, divsf(mulsf(sqrtsf(2), sqrtsf(2)), 2.0f)));
y = mulsf(y, y);
y = addsf(y, -2.0f);
// check that result is not far from zero
float eps = fabs(y);
if (eps > 1e-6f) {
state->fail++;
printf("%s: i=%d y=%f eps=%f\r\n", __func__, i, y, eps);
}
}
state->done++;
vTaskDelete(NULL);
}
TEST_CASE("context switch saves FP registers", "[fp]")
{
struct TestFPState state;
state.done = 0;
state.fail = 0;
xTaskCreatePinnedToCore(tskTestFP, "tsk1", 2048, &state, 3, NULL, 0);
xTaskCreatePinnedToCore(tskTestFP, "tsk2", 2048, &state, 3, NULL, 0);
xTaskCreatePinnedToCore(tskTestFP, "tsk3", 2048, &state, 3, NULL, 1);
xTaskCreatePinnedToCore(tskTestFP, "tsk4", 2048, &state, 3, NULL, 0);
while (state.done != 4) {
vTaskDelay(100 / portTICK_PERIOD_MS);
}
if (state.fail) {
const int total = testFpIter * 4;
printf("Failed: %d, total: %d\r\n", state.fail, total);
}
TEST_ASSERT(state.fail == 0);
}
#endif

77
components/esp32/test/test_miniz.c Normal file
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@ -0,0 +1,77 @@
#include <stdio.h>
#include "rom/miniz.h"
#include "unity.h"
#define DATASIZE (1024*64)
TEST_CASE("Test miniz compression/decompression", "[miniz]")
{
int x;
char b;
char *inbuf, *outbuf;
tdefl_compressor *comp;
tinfl_decompressor *decomp;
tdefl_status status;
size_t inbytes = 0, outbytes = 0, inpos = 0, outpos = 0, compsz;
printf("Allocating data buffer and filling it with semi-random data\n");
inbuf = malloc(DATASIZE);
TEST_ASSERT(inbuf != NULL);
srand(0);
for (x = 0; x < DATASIZE; x++) {
inbuf[x] = (x & 1) ? rand() & 0xff : 0;
}
printf("Allocating compressor & outbuf (%d bytes)\n", sizeof(tdefl_compressor));
comp = malloc(sizeof(tdefl_compressor));
TEST_ASSERT(comp != NULL);
outbuf = malloc(DATASIZE);
TEST_ASSERT(outbuf != NULL);
printf("Compressing...\n");
status = tdefl_init(comp, NULL, NULL, TDEFL_WRITE_ZLIB_HEADER | 1500);
TEST_ASSERT(status == TDEFL_STATUS_OKAY);
while (inbytes != DATASIZE) {
outbytes = DATASIZE - outpos;
inbytes = DATASIZE - inpos;
tdefl_compress(comp, &inbuf[inpos], &inbytes, &outbuf[outpos], &outbytes, TDEFL_FINISH);
printf("...Compressed %d into %d bytes\n", inbytes, outbytes);
inpos += inbytes; outpos += outbytes;
}
compsz = outpos;
free(comp);
//Kill inbuffer
for (x = 0; x < DATASIZE; x++) {
inbuf[x] = 0;
}
free(inbuf);
inbuf = outbuf;
outbuf = malloc(DATASIZE);
TEST_ASSERT(outbuf != NULL);
printf("Reinflating...\n");
decomp = malloc(sizeof(tinfl_decompressor));
TEST_ASSERT(decomp != NULL);
tinfl_init(decomp);
inpos = 0; outpos = 0;
while (inbytes != compsz) {
outbytes = DATASIZE - outpos;
inbytes = compsz - inpos;
tinfl_decompress(decomp, (const mz_uint8 *)&inbuf[inpos], &inbytes, (uint8_t *)outbuf, (mz_uint8 *)&outbuf[outpos], &outbytes, TINFL_FLAG_PARSE_ZLIB_HEADER);
printf("...Decompressed %d into %d bytes\n", inbytes, outbytes);
inpos += inbytes; outpos += outbytes;
}
printf("Checking if same...\n");
srand(0);
for (x = 0; x < DATASIZE; x++) {
b = (x & 1) ? rand() & 0xff : 0;
if (outbuf[x] != b) {
printf("Pos %x: %hhx!=%hhx\n", x, outbuf[x], b);
TEST_ASSERT(0);
}
}
printf("Great Success!\n");
free(inbuf);
free(outbuf);
free(decomp);
}

91
components/esp32/test/test_tjpgd.c Normal file
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@ -0,0 +1,91 @@
#include <stdio.h>
#include "rom/tjpgd.h"
#include <string.h>
#include <stdlib.h>
#include <stdio.h>
#include "unity.h"
#include "test_tjpgd_logo.h"
typedef struct {
const unsigned char *inData;
int inPos;
unsigned char *outData;
int outW;
int outH;
} JpegDev;
static UINT infunc(JDEC *decoder, BYTE *buf, UINT len)
{
JpegDev *jd = (JpegDev *)decoder->device;
printf("Reading %d bytes from pos %d\n", len, jd->inPos);
if (buf != NULL) {
memcpy(buf, jd->inData + jd->inPos, len);
}
jd->inPos += len;
return len;
}
static UINT outfunc(JDEC *decoder, void *bitmap, JRECT *rect)
{
unsigned char *in = (unsigned char *)bitmap;
unsigned char *out;
int y;
printf("Rect %d,%d - %d,%d\n", rect->top, rect->left, rect->bottom, rect->right);
JpegDev *jd = (JpegDev *)decoder->device;
for (y = rect->top; y <= rect->bottom; y++) {
out = jd->outData + ((jd->outW * y) + rect->left) * 3;
memcpy(out, in, ((rect->right - rect->left) + 1) * 3);
in += ((rect->right - rect->left) + 1) * 3;
}
return 1;
}
#define TESTW 48
#define TESTH 48
#define WORKSZ 3100
TEST_CASE("Test JPEG decompression library", "[tjpgd]")
{
char aapix[] = " .:;+=xX$$";
unsigned char *decoded, *p;
char *work;
int r;
int x, y, v;
JDEC decoder;
JpegDev jd;
decoded = malloc(48 * 48 * 3);
for (x = 0; x < 48 * 48 * 3; x += 2) {
decoded[x] = 0; decoded[x + 1] = 0xff;
}
work = malloc(WORKSZ);
memset(work, 0, WORKSZ);
jd.inData = logo_jpg;
jd.inPos = 0;
jd.outData = decoded;
jd.outW = TESTW;
jd.outH = TESTH;
r = jd_prepare(&decoder, infunc, work, WORKSZ, (void *)&jd);
TEST_ASSERT_EQUAL(r, JDR_OK);
r = jd_decomp(&decoder, outfunc, 0);
TEST_ASSERT_EQUAL(r, JDR_OK);
p = decoded + 2;
for (y = 0; y < TESTH; y++) {
for (x = 0; x < TESTH; x++) {
v = ((*p) * (sizeof(aapix) - 2) * 2) / 256;
printf("%c%c", aapix[v / 2], aapix[(v + 1) / 2]);
p += 3;
}
printf("%c%c", ' ', '\n');
}
free(work);
free(decoded);
}

205
components/esp32/test/test_unal_dma.c Normal file
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@ -0,0 +1,205 @@
#include <esp_types.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "rom/ets_sys.h"
#include "rom/lldesc.h"
#include "rom/gpio.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "freertos/queue.h"
#include "freertos/xtensa_api.h"
#include "unity.h"
#include "soc/uart_reg.h"
#include "soc/dport_reg.h"
#include "soc/io_mux_reg.h"
#include "soc/gpio_sig_map.h"
#include "soc/gpio_reg.h"
#include "soc/i2s_reg.h"
#define DPORT_I2S0_CLK_EN (BIT(4))
#define DPORT_I2S0_RST (BIT(4))
static volatile lldesc_t dmaDesc[2];
//hacked up routine to essentially do a memcpy() using dma. Supports max 4K-1 bytes.
static void dmaMemcpy(void *in, void *out, int len)
{
volatile int i;
SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S0_CLK_EN);
CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST);
//Init pins to i2s functions
SET_PERI_REG_MASK(GPIO_ENABLE_W1TS_REG, (1 << 11) | (1 << 3) | (1 << 0) | (1 << 2) | (1 << 5) | (1 << 16) | (1 << 17) | (1 << 18) | (1 << 19) | (1 << 20)); //ENABLE GPIO oe_enable
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO0_U, 0);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, 0);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO5_U, 0);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO16_U, 0);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO17_U, 0);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO18_U, 0);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO19_U, 0);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO20_U, 0);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CMD_U, 2); //11
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO26_U, 0); //RS
WRITE_PERI_REG(GPIO_FUNC0_OUT_SEL_CFG_REG, (148 << GPIO_FUNC0_OUT_SEL_S));
WRITE_PERI_REG(GPIO_FUNC2_OUT_SEL_CFG_REG, (149 << GPIO_FUNC0_OUT_SEL_S));
WRITE_PERI_REG(GPIO_FUNC5_OUT_SEL_CFG_REG, (150 << GPIO_FUNC0_OUT_SEL_S));
WRITE_PERI_REG(GPIO_FUNC16_OUT_SEL_CFG_REG, (151 << GPIO_FUNC0_OUT_SEL_S));
WRITE_PERI_REG(GPIO_FUNC17_OUT_SEL_CFG_REG, (152 << GPIO_FUNC0_OUT_SEL_S));
WRITE_PERI_REG(GPIO_FUNC18_OUT_SEL_CFG_REG, (153 << GPIO_FUNC0_OUT_SEL_S));
WRITE_PERI_REG(GPIO_FUNC19_OUT_SEL_CFG_REG, (154 << GPIO_FUNC0_OUT_SEL_S));
WRITE_PERI_REG(GPIO_FUNC20_OUT_SEL_CFG_REG, (155 << GPIO_FUNC0_OUT_SEL_S));
WRITE_PERI_REG(GPIO_FUNC26_OUT_SEL_CFG_REG, (156 << GPIO_FUNC0_OUT_SEL_S)); //RS
WRITE_PERI_REG(GPIO_FUNC11_OUT_SEL_CFG_REG, (I2S0O_WS_OUT_IDX << GPIO_FUNC0_OUT_SEL_S));
// WRITE_PERI_REG(GPIO_FUNC11_OUT_SEL_CFG, (I2S0O_BCK_OUT_IDX<<GPIO_GPIO_FUNC0_OUT_SEL_S));
//GPIO_SET_GPIO_FUNC11_OUT_INV_SEL(1); //old
WRITE_PERI_REG(GPIO_FUNC11_OUT_SEL_CFG_REG, READ_PERI_REG(GPIO_FUNC11_OUT_SEL_CFG_REG) | GPIO_FUNC11_OUT_INV_SEL);
//Reset I2S subsystem
CLEAR_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_RESET | I2S_TX_RESET);
SET_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_RESET | I2S_TX_RESET);
CLEAR_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_RESET | I2S_TX_RESET);
WRITE_PERI_REG(I2S_CONF_REG(0), 0);//I2S_I2S_SIG_LOOPBACK);
WRITE_PERI_REG(I2S_CONF2_REG(0), 0);
WRITE_PERI_REG(I2S_SAMPLE_RATE_CONF_REG(0),
(16 << I2S_RX_BITS_MOD_S) |
(16 << I2S_TX_BITS_MOD_S) |
(1 << I2S_RX_BCK_DIV_NUM_S) |
(1 << I2S_TX_BCK_DIV_NUM_S));
WRITE_PERI_REG(I2S_CLKM_CONF_REG(0),
I2S_CLKA_ENA | I2S_CLK_EN |
(1 << I2S_CLKM_DIV_A_S) |
(1 << I2S_CLKM_DIV_B_S) |
(1 << I2S_CLKM_DIV_NUM_S));
WRITE_PERI_REG(I2S_FIFO_CONF_REG(0),
(32 << I2S_TX_DATA_NUM_S) | //Low watermark for IRQ
(32 << I2S_RX_DATA_NUM_S));
WRITE_PERI_REG(I2S_CONF1_REG(0), I2S_RX_PCM_BYPASS | I2S_TX_PCM_BYPASS);
WRITE_PERI_REG(I2S_CONF_CHAN_REG(0), (2 << I2S_TX_CHAN_MOD_S) | (2 << I2S_RX_CHAN_MOD_S));
//Invert WS to active-low
SET_PERI_REG_MASK(I2S_CONF_REG(0), I2S_TX_RIGHT_FIRST | I2S_RX_RIGHT_FIRST);
WRITE_PERI_REG(I2S_TIMING_REG(0), 0);
//--
//Fill DMA descriptor
dmaDesc[0].length = len;
dmaDesc[0].size = len;
dmaDesc[0].owner = 1;
dmaDesc[0].sosf = 0;
dmaDesc[0].buf = (uint8_t *)in;
dmaDesc[0].offset = 0; //unused in hw
dmaDesc[0].empty = 0;
dmaDesc[0].eof = 1;
dmaDesc[1].length = len;
dmaDesc[1].size = len;
dmaDesc[1].owner = 1;
dmaDesc[1].sosf = 0;
dmaDesc[1].buf = (uint8_t *)out;
dmaDesc[1].offset = 0; //unused in hw
dmaDesc[1].empty = 0;
dmaDesc[1].eof = 1;
//Reset DMA
SET_PERI_REG_MASK(I2S_LC_CONF_REG(0), I2S_IN_RST | I2S_OUT_RST | I2S_AHBM_RST | I2S_AHBM_FIFO_RST);
CLEAR_PERI_REG_MASK(I2S_LC_CONF_REG(0), I2S_IN_RST | I2S_OUT_RST | I2S_AHBM_RST | I2S_AHBM_FIFO_RST);
//Reset I2S FIFO
SET_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_RESET | I2S_TX_RESET | I2S_TX_FIFO_RESET | I2S_RX_FIFO_RESET);
CLEAR_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_RESET | I2S_TX_RESET | I2S_TX_FIFO_RESET | I2S_RX_FIFO_RESET);
//Set desc addr
CLEAR_PERI_REG_MASK(I2S_OUT_LINK_REG(0), I2S_OUTLINK_ADDR);
SET_PERI_REG_MASK(I2S_OUT_LINK_REG(0), ((uint32_t)(&dmaDesc[0]))&I2S_OUTLINK_ADDR);
CLEAR_PERI_REG_MASK(I2S_IN_LINK_REG(0), I2S_INLINK_ADDR);
SET_PERI_REG_MASK(I2S_IN_LINK_REG(0), ((uint32_t)(&dmaDesc[1]))&I2S_INLINK_ADDR);
SET_PERI_REG_MASK(I2S_FIFO_CONF_REG(0), I2S_DSCR_EN); //Enable DMA mode
WRITE_PERI_REG(I2S_RXEOF_NUM_REG(0), len);
//Enable and configure DMA
WRITE_PERI_REG(I2S_LC_CONF_REG(0), I2S_OUT_DATA_BURST_EN |
I2S_OUT_EOF_MODE | I2S_OUTDSCR_BURST_EN | I2S_OUT_DATA_BURST_EN |
I2S_INDSCR_BURST_EN | I2S_MEM_TRANS_EN);
//Start transmission
SET_PERI_REG_MASK(I2S_OUT_LINK_REG(0), I2S_OUTLINK_START);
SET_PERI_REG_MASK(I2S_IN_LINK_REG(0), I2S_INLINK_START);
SET_PERI_REG_MASK(I2S_CONF_REG(0), I2S_TX_START | I2S_RX_START);
//Clear int flags
WRITE_PERI_REG(I2S_INT_CLR_REG(0), 0xFFFFFFFF);
//--
//No need to finish if no DMA transfer going on
if (!(READ_PERI_REG(I2S_FIFO_CONF_REG(0))&I2S_DSCR_EN)) {
return;
}
//Wait till fifo done
while (!(READ_PERI_REG(I2S_INT_RAW_REG(0))&I2S_TX_REMPTY_INT_RAW)) ;
//Wait for last bytes to leave i2s xmit thing
//ToDo: poll bit in next hw
for (i = 0; i < (1 << 8); i++);
while (!(READ_PERI_REG(I2S_STATE_REG(0))&I2S_TX_IDLE));
//Reset I2S for next transfer
CLEAR_PERI_REG_MASK(I2S_CONF_REG(0), I2S_TX_START | I2S_RX_START);
CLEAR_PERI_REG_MASK(I2S_OUT_LINK_REG(0), I2S_OUTLINK_START | I2S_INLINK_START);
SET_PERI_REG_MASK(I2S_CONF_REG(0), I2S_TX_RESET | I2S_TX_FIFO_RESET | I2S_RX_RESET | I2S_RX_FIFO_RESET);
CLEAR_PERI_REG_MASK(I2S_CONF_REG(0), I2S_TX_RESET | I2S_TX_FIFO_RESET | I2S_RX_RESET | I2S_RX_FIFO_RESET);
// for (i=0; i<(1<<8); i++);
while ((READ_PERI_REG(I2S_STATE_REG(0))&I2S_TX_FIFO_RESET_BACK));
}
int mymemcmp(char *a, char *b, int len)
{
int x;
for (x = 0; x < len; x++) {
if (a[x] != b[x]) {
printf("Not equal at byte %d. a=%x, b=%x\n", x, (int)a[x], (int)b[x]);
return 1;
}
}
return 0;
}
TEST_CASE("Unaligned DMA test (needs I2S)", "[hw]")
{
int x;
char src[2049], dest[2049];
for (x = 0; x < sizeof(src); x++) {
src[x] = x & 0xff;
}
printf("Aligned dma\n");
memset(dest, 0, 2049);
dmaMemcpy(src, dest, 2048 + 1);
TEST_ASSERT(mymemcmp(src, dest, 2048) == 0);
printf("Src unaligned\n");
dmaMemcpy(src + 1, dest, 2048 + 1);
TEST_ASSERT(mymemcmp(src + 1, dest, 2048) == 0);
printf("Dst unaligned\n");
dmaMemcpy(src, dest + 1, 2048 + 2);
TEST_ASSERT(mymemcmp(src, dest + 1, 2048) == 0);
}

12
components/freertos/include/freertos/FreeRTOS.h
View file

@ -895,7 +895,8 @@ typedef struct xSTATIC_TCB
uint32_t ulDummy18;
uint32_t ucDummy19;
#endif
#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
#if( ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) \
|| ( portUSING_MPU_WRAPPERS == 1 ) )
uint8_t uxDummy20;
#endif
@ -927,7 +928,6 @@ typedef struct xSTATIC_QUEUE
StaticList_t xDummy3[ 2 ];
UBaseType_t uxDummy4[ 3 ];
BaseType_t ucDummy5[ 2 ];
#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
uint8_t ucDummy6;
@ -943,12 +943,12 @@ typedef struct xSTATIC_QUEUE
#endif
struct {
volatile uint32_t mux;
volatile uint32_t ucDummy10;
#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
const char *lastLockedFn;
int lastLockedLine;
void *pvDummy8;
UBaseType_t uxDummy11;
#endif
} mux;
} sDummy12;
} StaticQueue_t;
typedef StaticQueue_t StaticSemaphore_t;

13
components/freertos/include/freertos/list.h
View file

@ -190,6 +190,10 @@ struct xLIST_ITEM
};
typedef struct xLIST_ITEM ListItem_t; /* For some reason lint wants this as two separate definitions. */
#if __GNUC_PREREQ(4, 6)
_Static_assert(sizeof(StaticListItem_t) == sizeof(ListItem_t), "StaticListItem_t != ListItem_t");
#endif
struct xMINI_LIST_ITEM
{
listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
@ -199,6 +203,11 @@ struct xMINI_LIST_ITEM
};
typedef struct xMINI_LIST_ITEM MiniListItem_t;
#if __GNUC_PREREQ(4, 6)
_Static_assert(sizeof(StaticMiniListItem_t) == sizeof(MiniListItem_t), "StaticMiniListItem_t != MiniListItem_t");
#endif
/*
* Definition of the type of queue used by the scheduler.
*/
@ -211,6 +220,10 @@ typedef struct xLIST
listSECOND_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
} List_t;
#if __GNUC_PREREQ(4, 6)
_Static_assert(sizeof(StaticList_t) == sizeof(List_t), "StaticList_t != List_t");
#endif
/*
* Access macro to set the owner of a list item. The owner of a list item
* is the object (usually a TCB) that contains the list item.

5
components/freertos/queue.c
View file

@ -179,6 +179,11 @@ typedef struct QueueDefinition
name below to enable the use of older kernel aware debuggers. */
typedef xQUEUE Queue_t;
#if __GNUC_PREREQ(4, 6)
_Static_assert(sizeof(StaticQueue_t) == sizeof(Queue_t), "StaticQueue_t != Queue_t");
#endif
/*-----------------------------------------------------------*/
/*

4
components/freertos/tasks.c
View file

@ -242,6 +242,10 @@ typedef struct tskTaskControlBlock
below to enable the use of older kernel aware debuggers. */
typedef tskTCB TCB_t;
#if __GNUC_PREREQ(4, 6)
_Static_assert(sizeof(StaticTask_t) == sizeof(TCB_t), "StaticTask_t != TCB_t");
#endif
/*
* Some kernel aware debuggers require the data the debugger needs access to to
* be global, rather than file scope.

5
components/freertos/test/component.mk Normal file
View file

@ -0,0 +1,5 @@
#
#Component Makefile
#
COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive

229
components/freertos/test/test_freertos.c Normal file
View file

@ -0,0 +1,229 @@
/*
Test for multicore FreeRTOS. This test spins up threads, fiddles with queues etc.
*/
#include <esp_types.h>
#include <stdio.h>
#include "rom/ets_sys.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "freertos/queue.h"
#include "freertos/xtensa_api.h"
#include "unity.h"
#include "soc/uart_reg.h"
#include "soc/dport_reg.h"
#include "soc/io_mux_reg.h"
void ets_isr_unmask(uint32_t unmask);
static xQueueHandle myQueue;
static xQueueHandle uartRxQueue;
int ctr;
#if 1
//Idle-loop for delay. Tests involuntary yielding
static void cvTaskDelay(int dummy)
{
volatile int i;
for (i = 0; i < (1 << 17); i++);
}
#else
//Delay task execution using FreeRTOS methods. Tests voluntary yielding.
#define cvTaskDelay(x) vTaskDelay(x)
#endif
#if 0
static void dosegfault3(int i)
{
volatile char *p = (volatile char *)0;
*p = i;
}
static void dosegfault2(int i)
{
if (i > 3) {
dosegfault3(i);
}
}
static void dosegfault(int i)
{
if (i < 5) {
dosegfault(i + 1);
}
dosegfault2(i);
}
#endif
static void queueSender(void *pvParameters)
{
int myCtr = xPortGetCoreID() * 100000;
while (1) {
printf("Core %d: Send to queue: %d\n", xPortGetCoreID(), myCtr);
xQueueSend(myQueue, (void *)(&myCtr), portMAX_DELAY);
printf("Send to queue done.\n");
cvTaskDelay(100);
myCtr++;
}
}
static void queueReceiver(void *pvParameters)
{
int theCtr;
while (1) {
xQueueReceive(myQueue, &theCtr, portMAX_DELAY);
printf("Core %d: Receive from queue: %d\n", xPortGetCoreID(), theCtr);
}
}
static void tskone(void *pvParameters)
{
// char *p=(char *)0;
while (1) {
ctr++;
// if (ctr>60) dosegfault(3);
printf("Task1, core %d, ctr=%d\n", xPortGetCoreID(), ctr);
cvTaskDelay(500);
}
}
static void tsktwo(void *pvParameters)
{
while (1) {
ctr++;
printf("Task2, core %d, ctr=%d\n", xPortGetCoreID(), ctr);
cvTaskDelay(500);
}
}
static void tskthree(void *pvParameters)
{
while (1) {
ctr++;
printf("Task3, core %d, ctr=%d\n", xPortGetCoreID(), ctr);
cvTaskDelay(500);
}
}
static void tskfour(void *pvParameters)
{
while (1) {
ctr++;
printf("Task4, core %d, ctr=%d\n", xPortGetCoreID(), ctr);
cvTaskDelay(500);
}
}
static void tskfive(void *pvParameters)
{
while (1) {
ctr++;
printf("Task5, core %d, ctr=%d\n", xPortGetCoreID(), ctr);
cvTaskDelay(500);
}
}
static void tskyield(void *pvParameters)
{
while (1) {
portYIELD();
}
}
static void tskUartRecv(void *pvParameters)
{
char c;
while (1) {
xQueueReceive(uartRxQueue, &c, portMAX_DELAY);
printf("Uart received %c!\n", c);
}
}
static void uartIsrHdl(void *arg)
{
char c;
BaseType_t xHigherPriorityTaskWoken;
SET_PERI_REG_MASK(UART_INT_CLR_REG(0), UART_RXFIFO_FULL_INT_CLR);
while (READ_PERI_REG(UART_STATUS_REG(0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
c = READ_PERI_REG(UART_FIFO_REG(0));
xQueueSendFromISR(uartRxQueue, &c, &xHigherPriorityTaskWoken);
printf("ISR: %c\n", c);
}
if (xHigherPriorityTaskWoken) {
portYIELD_FROM_ISR();
}
}
static void uartRxInit(xQueueHandle q)
{
uint32_t reg_val;
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_U0RXD);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_U0TXD);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_U0RXD);
// reg_val = READ_PERI_REG(UART_CONF1(0));
reg_val = (1 << UART_RXFIFO_FULL_THRHD_S);
WRITE_PERI_REG(UART_CONF1_REG(0), reg_val);
CLEAR_PERI_REG_MASK(UART_INT_ENA_REG(0), UART_TXFIFO_EMPTY_INT_ENA | UART_RXFIFO_TOUT_INT_ENA);
SET_PERI_REG_MASK(UART_INT_ENA_REG(0), UART_RXFIFO_FULL_INT_ENA);
printf("Enabling int %d\n", ETS_UART0_INUM);
REG_SET_FIELD(DPORT_PRO_UART_INTR_MAP_REG, DPORT_PRO_UART_INTR_MAP, ETS_UART0_INUM);
REG_SET_FIELD(DPORT_PRO_UART1_INTR_MAP_REG, DPORT_PRO_UART1_INTR_MAP, ETS_UART0_INUM);
xt_set_interrupt_handler(ETS_UART0_INUM, uartIsrHdl, NULL);
xt_ints_on(1 << ETS_UART0_INUM);
}
// TODO: split this thing into separate orthogonal tests
TEST_CASE("Bunch of FreeRTOS tests", "[freertos]")
{
char *tst;
TaskHandle_t th[12];
int i;
printf("%s\n", __FUNCTION__);
tst = pvPortMalloc(16);
printf("Test malloc returns addr %p\n", tst);
printf("Free heap: %u\n", xPortGetFreeHeapSize());
myQueue = xQueueCreate(10, sizeof(int));
uartRxQueue = xQueueCreate(256, sizeof(char));
printf("Free heap: %u\n", xPortGetFreeHeapSize());
printf("Creating tasks\n");
xTaskCreatePinnedToCore(tskyield , "tskyield1" , 2048, NULL, 3, &th[0], 0);
xTaskCreatePinnedToCore(tskyield , "tskyield2" , 2048, NULL, 3, &th[1], 1);
xTaskCreatePinnedToCore(tskone , "tskone" , 2048, NULL, 3, &th[2], 0);
xTaskCreatePinnedToCore(tsktwo , "tsktwo" , 2048, NULL, 3, &th[3], 1);
xTaskCreatePinnedToCore(tskthree, "tskthree", 2048, NULL, 3, &th[4], 0);
xTaskCreatePinnedToCore(tskfour , "tskfour" , 2048, NULL, 3, &th[5], tskNO_AFFINITY);
xTaskCreatePinnedToCore(tskfive , "tskfive" , 2048, NULL, 3, &th[6], tskNO_AFFINITY);
xTaskCreatePinnedToCore(queueSender , "qsend1" , 2048, NULL, 3, &th[7], 0);
xTaskCreatePinnedToCore(queueSender , "qsend2" , 2048, NULL, 3, &th[8], 1);
xTaskCreatePinnedToCore(queueReceiver , "qrecv1" , 2048, NULL, 3, &th[9], 1);
xTaskCreatePinnedToCore(queueReceiver , "qrecv2" , 2048, NULL, 3, &th[10], 0);
xTaskCreatePinnedToCore(tskUartRecv , "tskuart" , 2048, NULL, 4, &th[11], 1);
printf("Free heap: %u\n", xPortGetFreeHeapSize());
uartRxInit(uartRxQueue);
// Let stuff run for 20s
vTaskDelay(20000 / portTICK_PERIOD_MS);
//Shut down all the tasks
for (i = 0; i < 12; i++) {
vTaskDelete(th[i]);
}
xt_ints_off(1 << ETS_UART0_INUM);
}

105
components/freertos/test/test_freertos_eventgroups.c Normal file
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@ -0,0 +1,105 @@
#include <stdio.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "freertos/queue.h"
#include "freertos/event_groups.h"
#include "unity.h"
#define BIT_CALL (1 << 0)
#define BIT_RESPONSE(TASK) (1 << (TASK+1))
#define ALL_RESPONSE_BITS (((1 << NUM_TASKS) - 1) << 1)
static const int NUM_TASKS = 4;
static const int COUNT = 4000;
static EventGroupHandle_t eg;
static void task_event_group_call_response(void *param)
{
int task_num = (int)param;
printf("Started %d\n", task_num);
for (int i = 0; i < COUNT; i++) {
/* Wait until the common "call" bit is set, starts off all tasks
(clear on return) */
while (!xEventGroupWaitBits(eg, BIT_CALL, true, false, portMAX_DELAY)) {
}
/* Set our individual "response" bit */
xEventGroupSetBits(eg, BIT_RESPONSE(task_num));
}
printf("Task %d done\n", task_num);
/* Delay is due to not-yet-fixed bug with deleting tasks at same time */
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelete(NULL);
}
TEST_CASE("FreeRTOS Event Groups", "[freertos]")
{
eg = xEventGroupCreate();
/* Note: task_event_group_call_response all have higher priority than us, so will block together.
This is important because we need to know they'll all have blocked on BIT_CALL each time we
signal it, or they get out of sync.
*/
for (int c = 0; c < NUM_TASKS; c++) {
xTaskCreatePinnedToCore(task_event_group_call_response, "tsk_call_resp", 4096, (void *)c, configMAX_PRIORITIES - 1, NULL, c % portNUM_PROCESSORS);
}
/* Scheduler weirdness, if we don't sleep a few ticks here then the tasks on the other CPU aren't running yet... */
vTaskDelay(10);
for (int i = 0; i < COUNT; i++) {
if (i % 100 == 0) {
//printf("Call %d\n", i);
}
/* signal all tasks with "CALL" bit... */
xEventGroupSetBits(eg, BIT_CALL);
while (xEventGroupWaitBits(eg, ALL_RESPONSE_BITS, true, true, portMAX_DELAY) != ALL_RESPONSE_BITS) {
}
}
}
#define BIT_DONE(X) (1<<(NUM_TASKS+1+X))
static void task_test_sync(void *param)
{
int task_num = (int)param;
printf("Started %d\n", task_num);
for (int i = 0; i < COUNT; i++) {
/* set our bit, and wait on all tasks to set their bits */
xEventGroupSync(eg, BIT_RESPONSE(task_num), ALL_RESPONSE_BITS, portMAX_DELAY);
/* clear our bit */
xEventGroupClearBits(eg, BIT_RESPONSE(task_num));
}
int after_done = xEventGroupSetBits(eg, BIT_DONE(task_num));
printf("Done %d = %x\n", task_num, after_done);
/* Delay is due to not-yet-fixed bug with deleting tasks at same time */
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelete(NULL);
}
TEST_CASE("FreeRTOS Event Group Sync", "[freertos]")
{
eg = xEventGroupCreate();
for (int c = 0; c < NUM_TASKS; c++) {
xTaskCreatePinnedToCore(task_test_sync, "task_test_sync", 4096, (void *)c, configMAX_PRIORITIES - 1, NULL, c % portNUM_PROCESSORS);
}
for (int c = 0; c < NUM_TASKS; c++) {
printf("Waiting on %d (%x)\n", c, BIT_DONE(c));
xEventGroupWaitBits(eg, BIT_DONE(c), false, false, portMAX_DELAY);
}
}

22
components/freertos/test/test_freertos_task_delete.c Normal file
View file

@ -0,0 +1,22 @@
#include <stdio.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "freertos/queue.h"
#include "freertos/event_groups.h"
#include "unity.h"
static void task_delete_self(void *param)
{
printf("Task %p running on core %d. Deleting shortly...\n", xTaskGetCurrentTaskHandle(), xPortGetCoreID());
vTaskDelete(NULL);
}
TEST_CASE("FreeRTOS Delete Tasks", "[freertos]")
{
xTaskCreatePinnedToCore(task_delete_self, "tsk_self_a", 4096, NULL, configMAX_PRIORITIES - 1, NULL, 0);
xTaskCreatePinnedToCore(task_delete_self, "tsk_self_a", 4096, NULL, configMAX_PRIORITIES - 1, NULL, 0);
vTaskDelay(200 / portTICK_PERIOD_MS);
printf("Done?\n");
}

60
components/freertos/test/test_newlib_reent.c Normal file
View file

@ -0,0 +1,60 @@
/*
Test for multicore FreeRTOS. This test spins up threads, fiddles with queues etc.
*/
#include <esp_types.h>
#include <stdio.h>
#include <stdlib.h>
#include "rom/ets_sys.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "freertos/queue.h"
#include "freertos/xtensa_api.h"
#include "unity.h"
#include "soc/uart_reg.h"
#include "soc/dport_reg.h"
#include "soc/io_mux_reg.h"
volatile static int done;
volatile static int error;
static void tskTestRand(void *pvParameters)
{
int l;
srand(0x1234);
vTaskDelay((int)pvParameters / portTICK_PERIOD_MS);
l = rand();
printf("Rand1: %d\n", l);
if (l != 869320854) {
error++;
}
vTaskDelay((int)pvParameters / portTICK_PERIOD_MS);
l = rand();
printf("Rand2: %d\n", l);
if (l != 1148737841) {
error++;
}
done++;
vTaskDelete(NULL);
}
// TODO: split this thing into separate orthogonal tests
TEST_CASE("Test for per-task non-reentrant tasks", "[freertos]")
{
done = 0;
error = 0;
xTaskCreatePinnedToCore(tskTestRand, "tsk1", 2048, (void *)100, 3, NULL, 0);
xTaskCreatePinnedToCore(tskTestRand, "tsk2", 2048, (void *)200, 3, NULL, 0);
xTaskCreatePinnedToCore(tskTestRand, "tsk3", 2048, (void *)300, 3, NULL, 1);
xTaskCreatePinnedToCore(tskTestRand, "tsk4", 2048, (void *)400, 3, NULL, 0);
while (done != 4) {
vTaskDelay(1000 / portTICK_PERIOD_MS);
}
TEST_ASSERT(error == 0);
}

26
components/freertos/test/test_panic.c Normal file
View file

@ -0,0 +1,26 @@
/*
Test for multicore FreeRTOS. This test spins up threads, fiddles with queues etc.
*/
#include <esp_types.h>
#include <stdio.h>
#include "rom/ets_sys.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "freertos/queue.h"
#include "freertos/xtensa_api.h"
#include "unity.h"
#include "soc/uart_reg.h"
#include "soc/dport_reg.h"
#include "soc/io_mux_reg.h"
TEST_CASE("Panic handler", "[freertos]")
{
volatile int *i;
i = (volatile int *)0x0;
*i = 1;
}

197
components/freertos/test/test_ringbuf.c Normal file
View file

@ -0,0 +1,197 @@
/*
Test for multicore FreeRTOS ringbuffer.
*/
#include <esp_types.h>
#include <stdio.h>
#include "rom/ets_sys.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "freertos/queue.h"
#include "freertos/ringbuf.h"
#include "freertos/xtensa_api.h"
#include "unity.h"
#include "soc/uart_reg.h"
#include "soc/dport_reg.h"
#include "soc/io_mux_reg.h"
#include <string.h>
#include <stdio.h>
void ets_isr_unmask(uint32_t unmask);
static RingbufHandle_t rb;
typedef enum {
TST_MOSTLYFILLED,
TST_MOSTLYEMPTY,
TST_INTTOTASK,
TST_TASKTOINT,
} testtype_t;
static volatile testtype_t testtype;
static void task1(void *arg)
{
testtype_t oldtest;
char buf[100];
int i = 0;
int x, r;
while (1) {
oldtest = testtype;
if (testtype == TST_MOSTLYFILLED || testtype == TST_MOSTLYEMPTY) {
for (x = 0; x < 10; x++) {
sprintf(buf, "This is test %d item %d.", (int)testtype, i++);
ets_printf("TSK w");
xRingbufferPrintInfo(rb);
r = xRingbufferSend(rb, buf, strlen(buf) + 1, 2000 / portTICK_PERIOD_MS);
if (!r) {
printf("Test %d: Timeout on send!\n", (int)testtype);
}
if (testtype == TST_MOSTLYEMPTY) {
vTaskDelay(1000 / portTICK_PERIOD_MS);
}
}
//Send NULL event to stop other side.
r = xRingbufferSend(rb, NULL, 0, 10000 / portTICK_PERIOD_MS);
}
while (oldtest == testtype) {
vTaskDelay(1000 / portTICK_PERIOD_MS);
}
}
}
static void task2(void *arg)
{
testtype_t oldtest;
char *buf;
size_t len;
while (1) {
oldtest = testtype;
if (testtype == TST_MOSTLYFILLED || testtype == TST_MOSTLYEMPTY) {
while (1) {
ets_printf("TSK r");
xRingbufferPrintInfo(rb);
buf = xRingbufferReceive(rb, &len, 2000 / portTICK_PERIOD_MS);
if (buf == NULL) {
printf("Test %d: Timeout on recv!\n", (int)testtype);
} else if (len == 0) {
printf("End packet received.\n");
vRingbufferReturnItem(rb, buf);
break;
} else {
printf("Received: %s (%d bytes, %p)\n", buf, len, buf);
vRingbufferReturnItem(rb, buf);
}
if (testtype == TST_MOSTLYFILLED) {
vTaskDelay(1000 / portTICK_PERIOD_MS);
}
}
}
while (oldtest == testtype) {
vTaskDelay(1000 / portTICK_PERIOD_MS);
}
}
}
static void uartIsrHdl(void *arg)
{
char c;
char buf[50];
char *item;
int r;
size_t len;
BaseType_t xHigherPriorityTaskWoken;
SET_PERI_REG_MASK(UART_INT_CLR_REG(0), UART_RXFIFO_FULL_INT_CLR);
while (READ_PERI_REG(UART_STATUS_REG(0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
c = READ_PERI_REG(UART_FIFO_REG(0));
if (c == 'r') {
ets_printf("ISR r");
xRingbufferPrintInfo(rb);
item = xRingbufferReceiveFromISR(rb, &len);
if (item == NULL) {
ets_printf("ISR recv fail!\n");
} else if (len == 0) {
ets_printf("ISR recv NULL!\n");
vRingbufferReturnItemFromISR(rb, item, &xHigherPriorityTaskWoken);
} else {
ets_printf("ISR recv '%s' (%d bytes, %p)\n", buf, len, buf);
vRingbufferReturnItemFromISR(rb, item, &xHigherPriorityTaskWoken);
}
} else {
sprintf(buf, "UART: %c", c);
ets_printf("ISR w");
xRingbufferPrintInfo(rb);
r = xRingbufferSendFromISR(rb, buf, strlen(buf) + 1, &xHigherPriorityTaskWoken);
if (!r) {
ets_printf("ISR send fail\n");
}
}
}
if (xHigherPriorityTaskWoken) {
portYIELD_FROM_ISR();
}
}
static void uartRxInit()
{
uint32_t reg_val;
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_U0RXD);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_U0TXD);
// reg_val = READ_PERI_REG(UART_CONF1(0));
reg_val = (1 << UART_RXFIFO_FULL_THRHD_S);
WRITE_PERI_REG(UART_CONF1_REG(0), reg_val);
CLEAR_PERI_REG_MASK(UART_INT_ENA_REG(0), UART_TXFIFO_EMPTY_INT_ENA | UART_RXFIFO_TOUT_INT_ENA);
SET_PERI_REG_MASK(UART_INT_ENA_REG(0), UART_RXFIFO_FULL_INT_ENA);
printf("Enabling int %d\n", ETS_UART0_INUM);
REG_SET_FIELD(DPORT_PRO_UART_INTR_MAP_REG, DPORT_PRO_UART_INTR_MAP, ETS_UART0_INUM);
REG_SET_FIELD(DPORT_PRO_UART1_INTR_MAP_REG, DPORT_PRO_UART1_INTR_MAP, ETS_UART0_INUM);
xt_set_interrupt_handler(ETS_UART0_INUM, uartIsrHdl, NULL);
xt_ints_on(1 << ETS_UART0_INUM);
}
static void testRingbuffer(int type)
{
TaskHandle_t th[2];
int i;
rb = xRingbufferCreate(32 * 3, type);
testtype = TST_MOSTLYFILLED;
xTaskCreatePinnedToCore(task1 , "tskone" , 2048, NULL, 3, &th[0], 0);
xTaskCreatePinnedToCore(task2 , "tsktwo" , 2048, NULL, 3, &th[1], 0);
uartRxInit();
printf("Press 'r' to read an event in isr, any other key to write one.\n");
printf("Test: mostlyfilled; putting 10 items in ringbuff ASAP, reading 1 a second\n");
vTaskDelay(15000 / portTICK_PERIOD_MS);
printf("Test: mostlyempty; putting 10 items in ringbuff @ 1/sec, reading as fast as possible\n");
testtype = TST_MOSTLYEMPTY;
vTaskDelay(15000 / portTICK_PERIOD_MS);
//Shut down all the tasks
for (i = 0; i < 2; i++) {
vTaskDelete(th[i]);
}
xt_ints_off(1 << ETS_UART0_INUM);
}
// TODO: split this thing into separate orthogonal tests
TEST_CASE("FreeRTOS ringbuffer test, no splitting items", "[freertos]")
{
testRingbuffer(0);
}
TEST_CASE("FreeRTOS ringbuffer test, w/ splitting items", "[freertos]")
{
testRingbuffer(1);
}

58
components/freertos/test/test_tls_deletecb.c Normal file
View file

@ -0,0 +1,58 @@
#include <esp_types.h>
#include <stdio.h>
#include "rom/ets_sys.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "freertos/queue.h"
#include "freertos/xtensa_api.h"
#include "unity.h"
#include "soc/uart_reg.h"
#include "soc/dport_reg.h"
#include "soc/io_mux_reg.h"
static void tskdelcb(int no, void *arg)
{
printf("Delete callback: %d = %p!\n", no, arg);
}
static void tska(void *pvParameters)
{
vTaskSetThreadLocalStoragePointerAndDelCallback(xTaskGetCurrentTaskHandle(), 0, (void *)0xAAAAAAAA, tskdelcb);
while (1) {
vTaskDelay(10000000 / portTICK_PERIOD_MS);
}
}
static void tskb(void *pvParameters)
{
vTaskSetThreadLocalStoragePointerAndDelCallback(xTaskGetCurrentTaskHandle(), 0, (void *)0xBBBBBBBB, tskdelcb);
vTaskDelay(2000 / portTICK_PERIOD_MS);
TaskHandle_t a = (TaskHandle_t)pvParameters;
printf("Killing task A\n");
vTaskDelete(a);
while (1) {
vTaskDelay(10000000 / portTICK_PERIOD_MS);
}
}
// TODO: split this thing into separate orthogonal tests
TEST_CASE("Freertos TLS delete cb", "[freertos]")
{
TaskHandle_t a, b;
xTaskCreatePinnedToCore(tska , "tska" , 2048, NULL, 3, &a, 0);
xTaskCreatePinnedToCore(tskb , "tska" , 2048, a, 3, &b, 0);
// Let stuff run for 20s
vTaskDelay(5000 / portTICK_PERIOD_MS);
printf("Killing task B\n");
//Shut down b
vTaskDelete(b);
}

6
components/lwip/api/sockets.c
View file

@ -2775,8 +2775,12 @@ lwip_setsockopt_impl(int s, int level, int optname, const void *optval, socklen_
case IPPROTO_IPV6:
switch (optname) {
case IPV6_V6ONLY:
/* @todo: this does not work for datagram sockets, yet */
/* @todo: this does not work for datagram sockets, yet */
#if CONFIG_MDNS
//LWIP_SOCKOPT_CHECK_OPTLEN_CONN_PCB_TYPE(sock, optlen, int, NETCONN_TCP);
#else
LWIP_SOCKOPT_CHECK_OPTLEN_CONN_PCB_TYPE(sock, optlen, int, NETCONN_TCP);
#endif
if (*(const int*)optval) {
netconn_set_ipv6only(sock->conn, 1);
} else {

7
components/lwip/core/ipv4/autoip.c
View file

@ -72,6 +72,7 @@
#include "lwip/netif.h"
#include "lwip/autoip.h"
#include "netif/etharp.h"
#include "lwip/dhcp.h"
#include <stdlib.h>
#include <string.h>
@ -269,6 +270,12 @@ autoip_bind(struct netif *netif)
netif_set_addr(netif, &autoip->llipaddr, &sn_mask, &gw_addr);
/* interface is used by routing now that an address is set */
#if ESP_LWIP
struct dhcp *dhcp = netif->dhcp;
if (dhcp->cb != NULL) {
dhcp->cb();
}
#endif
return ERR_OK;
}

22
components/lwip/core/ipv6/nd6.c
View file

@ -632,6 +632,22 @@ nd6_input(struct pbuf *p, struct netif *inp)
pbuf_free(p);
}
#ifdef ESP_LWIP
/** Set callback for ipv6 addr status changed .
*
* @param netif the netif from which to remove the struct dhcp
* @param cb callback for dhcp
*/
void nd6_set_cb(struct netif *netif, void (*cb)(struct netif *netif, u8_t ip_index))
{
LWIP_ASSERT("netif != NULL", netif != NULL);
if (netif != NULL && netif_is_up(netif)) {
netif->ipv6_addr_cb = cb;
}
}
#endif
/**
* Periodic timer for Neighbor discovery functions:
@ -797,6 +813,12 @@ nd6_tmr(void)
if ((netif->ip6_addr_state[i] & 0x07) >= LWIP_IPV6_DUP_DETECT_ATTEMPTS) {
/* No NA received in response. Mark address as valid. */
netif->ip6_addr_state[i] = IP6_ADDR_PREFERRED;
#ifdef ESP_LWIP
if (netif->ipv6_addr_cb != NULL) {
netif->ipv6_addr_cb(netif, i);
}
#endif
/* TODO implement preferred and valid lifetimes. */
} else if (netif->flags & NETIF_FLAG_UP) {
#if LWIP_IPV6_MLD

41
components/lwip/core/netif.c
View file

@ -968,9 +968,6 @@ netif_create_ip6_linklocal_address(struct netif *netif, u8_t from_mac_48bit)
}
}
#if ESP_LWIP
ip6_addr_set( ip_2_ip6(&netif->link_local_addr), ip_2_ip6(&netif->ip6_addr[0]) );
#endif
/* Set address state. */
#if LWIP_IPV6_DUP_DETECT_ATTEMPTS
@ -1022,44 +1019,6 @@ netif_add_ip6_address(struct netif *netif, const ip6_addr_t *ip6addr, s8_t *chos
return ERR_VAL;
}
#if ESP_LWIP
void
netif_create_ip4_linklocal_address(struct netif * netif)
{
#if 1
ip_addr_t linklocal;
ip_addr_t linklocal_mask;
ip4_addr_t addr = {0};
/* Link-local prefix and mask. */
IP4_ADDR(ip_2_ip4(&linklocal), 169, 254, 0, 0);
IP4_ADDR(ip_2_ip4(&linklocal_mask), 255, 255, 0, 0);
if (!ip4_addr_netcmp( ip_2_ip4(&linklocal), ip_2_ip4(&netif->link_local_addr), ip_2_ip4(&linklocal_mask) ) &&
!ip4_addr_isany(ip_2_ip4(&netif->ip_addr)) ) {
IP4_ADDR( ip_2_ip4(&netif->link_local_addr), 169, 254, ip4_addr3( ip_2_ip4(&netif->ip_addr) )
, ip4_addr4( ip_2_ip4(&netif->ip_addr) ) );
return;
}
while ( !(addr.addr) || !ip4_addr4(&addr) )
//os_get_random((unsigned char *)&addr, sizeof(addr));
addr.addr = LWIP_RAND();
if ( ip_2_ip4(&netif->netmask)->addr > IP_CLASSB_NET &&
!ip4_addr_isany( ip_2_ip4(&netif->ip_addr) )) { // random host address
IP4_ADDR( ip_2_ip4(&netif->link_local_addr), 169, 254, ip4_addr3( ip_2_ip4(&netif->ip_addr))
, ip4_addr4(&addr));
} else {
IP4_ADDR( ip_2_ip4(&netif->link_local_addr), 169, 254, ip4_addr3(&addr), ip4_addr4(&addr) );
}
#endif
}
#endif
/** Dummy IPv6 output function for netifs not supporting IPv6
*/
static err_t

5
components/lwip/include/lwip/lwip/autoip.h
View file

@ -68,8 +68,13 @@ extern "C" {
#define ANNOUNCE_NUM 2 /* (number of announcement packets) */
#define ANNOUNCE_INTERVAL 2 /* seconds (time between announcement packets) */
#define ANNOUNCE_WAIT 2 /* seconds (delay before announcing) */
#if CONFIG_MDNS
#define MAX_CONFLICTS 9 /* (max conflicts before rate limiting) */
#define RATE_LIMIT_INTERVAL 20 /* seconds (delay between successive attempts) */
#else
#define MAX_CONFLICTS 10 /* (max conflicts before rate limiting) */
#define RATE_LIMIT_INTERVAL 60 /* seconds (delay between successive attempts) */
#endif
#define DEFEND_INTERVAL 10 /* seconds (min. wait between defensive ARPs) */
/* AutoIP client states */

4
components/lwip/include/lwip/lwip/nd6.h
View file

@ -352,6 +352,10 @@ err_t nd6_queue_packet(s8_t neighbor_index, struct pbuf * p);
void nd6_reachability_hint(const ip6_addr_t * ip6addr);
#endif /* LWIP_ND6_TCP_REACHABILITY_HINTS */
#if ESP_LWIP
/** set nd6 callback when ipv6 addr state pref*/
void nd6_set_cb(struct netif *netif, void (*cb)(struct netif *netif, u8_t ip_index));
#endif
#ifdef __cplusplus
}
#endif

9
components/lwip/include/lwip/lwip/netif.h
View file

@ -190,11 +190,6 @@ struct netif {
/** pointer to next in linked list */
struct netif *next;
#if ESP_LWIP
//ip_addr_t is changed by marco IPV4, IPV6
ip_addr_t link_local_addr;
#endif
#if LWIP_IPV4
/** IP address configuration in network byte order */
ip_addr_t ip_addr;
@ -207,6 +202,10 @@ struct netif {
/** The state of each IPv6 address (Tentative, Preferred, etc).
* @see ip6_addr.h */
u8_t ip6_addr_state[LWIP_IPV6_NUM_ADDRESSES];
#if ESP_LWIP
void (*ipv6_addr_cb)(struct netif* netif, u8_t ip_idex); /* callback for ipv6 addr states changed */
#endif
#endif /* LWIP_IPV6 */
/** This function is called by the network device driver
* to pass a packet up the TCP/IP stack. */

51
components/lwip/include/lwip/port/lwipopts.h
View file

@ -65,8 +65,8 @@
*/
#define SMEMCPY(dst,src,len) memcpy(dst,src,len)
extern unsigned long os_random(void);
#define LWIP_RAND rand
#define LWIP_RAND rand
/*
------------------------------------
---------- Memory options ----------
@ -200,13 +200,35 @@ extern unsigned long os_random(void);
*/
#define LWIP_DHCP 1
#define DHCP_MAXRTX 0
#define DHCP_MAXRTX 0 //(*(volatile uint32*)0x600011E0)
/*
------------------------------------
---------- AUTOIP options ----------
------------------------------------
*/
#if CONFIG_MDNS
/**
* LWIP_AUTOIP==1: Enable AUTOIP module.
*/
#define LWIP_AUTOIP 1
/**
* LWIP_DHCP_AUTOIP_COOP==1: Allow DHCP and AUTOIP to be both enabled on
* the same interface at the same time.
*/
#define LWIP_DHCP_AUTOIP_COOP 1
/**
* LWIP_DHCP_AUTOIP_COOP_TRIES: Set to the number of DHCP DISCOVER probes
* that should be sent before falling back on AUTOIP. This can be set
* as low as 1 to get an AutoIP address very quickly, but you should
* be prepared to handle a changing IP address when DHCP overrides
* AutoIP.
*/
#define LWIP_DHCP_AUTOIP_COOP_TRIES 2
#endif
/*
----------------------------------
---------- SNMP options ----------
@ -308,6 +330,19 @@ extern unsigned long os_random(void);
---------- LOOPIF options ----------
------------------------------------
*/
#if CONFIG_MDNS
/**
* LWIP_NETIF_LOOPBACK==1: Support sending packets with a destination IP
* address equal to the netif IP address, looping them back up the stack.
*/
#define LWIP_NETIF_LOOPBACK 1
/**
* LWIP_LOOPBACK_MAX_PBUFS: Maximum number of pbufs on queue for loopback
* sending for each netif (0 = disabled)
*/
#define LWIP_LOOPBACK_MAX_PBUFS 8
#endif
/*
------------------------------------
@ -414,6 +449,15 @@ extern unsigned long os_random(void);
*/
#define SO_REUSE CONFIG_LWIP_SO_REUSE
#if CONFIG_MDNS
/**
* SO_REUSE_RXTOALL==1: Pass a copy of incoming broadcast/multicast packets
* to all local matches if SO_REUSEADDR is turned on.
* WARNING: Adds a memcpy for every packet if passing to more than one pcb!
*/
#define SO_REUSE_RXTOALL 1
#endif
/*
----------------------------------------
---------- Statistics options ----------
@ -515,6 +559,7 @@ extern unsigned long os_random(void);
/* Enable all Espressif-only options */
#define ESP_LWIP 1
#define ESP_LWIP_ARP 1
#define ESP_PER_SOC_TCP_WND 1
#define ESP_THREAD_SAFE 1
#define ESP_THREAD_SAFE_DEBUG LWIP_DBG_OFF

17
components/lwip/netif/etharp.c
View file

@ -1192,11 +1192,28 @@ etharp_query(struct netif *netif, const ip4_addr_t *ipaddr, struct pbuf *q)
}
#if ARP_QUEUE_LEN
if (qlen >= ARP_QUEUE_LEN) {
#if ESP_LWIP_ARP
int l;
struct etharp_q_entry *r;
l = qlen - 1;
r = arp_table[i].q;
while (l--)
r = r->next;
r->next = NULL;
pbuf_free(new_entry->p);
memp_free(MEMP_ARP_QUEUE, new_entry);
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue the packet %p (queue is full)\n", (void *)q));
return ERR_MEM;
#else
struct etharp_q_entry *old;
old = arp_table[i].q;
arp_table[i].q = arp_table[i].q->next;
pbuf_free(old->p);
memp_free(MEMP_ARP_QUEUE, old);
#endif
}
#endif
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: queued packet %p on ARP entry %"S16_F"\n", (void *)q, (s16_t)i));

48
components/lwip/port/netif/wlanif.c
View file

@ -118,37 +118,29 @@ low_level_init(struct netif *netif)
static err_t
low_level_output(struct netif *netif, struct pbuf *p)
{
struct pbuf *q;
wifi_interface_t wifi_if = tcpip_adapter_get_wifi_if(netif);
wifi_interface_t wifi_if = tcpip_adapter_get_wifi_if(netif);
struct pbuf *q = p;
err_t ret;
if (wifi_if >= WIFI_IF_MAX) {
return ERR_IF;
}
#if ESP_LWIP
q = p;
u16_t pbuf_x_len = 0;
pbuf_x_len = q->len;
if(q->next !=NULL)
{
//char cnt = 0;
struct pbuf *tmp = q->next;
while(tmp != NULL)
{
memcpy( (u8_t *)( (u8_t *)(q->payload) + pbuf_x_len), (u8_t *)tmp->payload , tmp->len );
pbuf_x_len += tmp->len;
//cnt++;
tmp = tmp->next;
if (wifi_if >= WIFI_IF_MAX) {
return ERR_IF;
}
if(q->next == NULL) {
ret = esp_wifi_internal_tx(wifi_if, q->payload, q->len);
} else {
LWIP_DEBUGF(PBUF_DEBUG, ("low_level_output: pbuf is a list, application may has bug"));
q = pbuf_alloc(PBUF_RAW_TX, p->tot_len, PBUF_RAM);
if (q != NULL) {
pbuf_copy(q, p);
} else {
return ERR_MEM;
}
ret = esp_wifi_internal_tx(wifi_if, q->payload, q->len);
pbuf_free(q);
}
return esp_wifi_internal_tx(wifi_if, q->payload, pbuf_x_len);
#else
for(q = p; q != NULL; q = q->next) {
esp_wifi_internal_tx(wifi_if, q->payload, q->len);
}
return ERR_OK;
#endif
return ret;
}
/**

37
components/mbedtls/Kconfig
View file

@ -22,7 +22,7 @@ config MBEDTLS_SSL_MAX_CONTENT_LEN
config MBEDTLS_DEBUG
bool "Enable mbedTLS debugging"
default "no"
default n
help
Enable mbedTLS debugging functions.
@ -34,4 +34,39 @@ config MBEDTLS_DEBUG
functionality. See the "https_request_main" example for a
sample function which connects the two together.
config MBEDTLS_HARDWARE_AES
bool "Enable hardware AES acceleration"
default y
help
Enable hardware accelerated AES encryption & decryption.
config MBEDTLS_HARDWARE_MPI
bool "Enable hardware MPI (bignum) acceleration"
default y
help
Enable hardware accelerated multiple precision integer operations.
Hardware accelerated multiplication, modulo multiplication,
and modular exponentiation for up to 4096 bit results.
These operations are used by RSA.
config MBEDTLS_MPI_USE_INTERRUPT
bool "Use interrupt for MPI operations"
depends on MBEDTLS_HARDWARE_MPI
default y
help
Use an interrupt to coordinate MPI operations.
This allows other code to run on the CPU while an MPI operation is pending.
Otherwise the CPU busy-waits.
config MBEDTLS_MPI_INTERRUPT_NUM
int "MPI Interrupt number"
depends on MBEDTLS_MPI_USE_INTERRUPT
default 18
help
CPU interrupt number for MPI interrupt to connect to. Must be otherwise unused.
Eventually this assignment will be handled automatically at runtime.
endmenu

8
components/mbedtls/library/bignum.c
View file

@ -1092,6 +1092,8 @@ int mbedtls_mpi_sub_int( mbedtls_mpi *X, const mbedtls_mpi *A, mbedtls_mpi_sint
return( mbedtls_mpi_sub_mpi( X, A, &_B ) );
}
#if !defined(MBEDTLS_MPI_MUL_MPI_ALT) || !defined(MBEDTLS_MPI_EXP_MOD_ALT)
/*
* Helper for mbedtls_mpi multiplication
*/
@ -1103,6 +1105,7 @@ static
*/
__attribute__ ((noinline))
#endif
void mpi_mul_hlp( size_t i, mbedtls_mpi_uint *s, mbedtls_mpi_uint *d, mbedtls_mpi_uint b )
{
mbedtls_mpi_uint c = 0, t = 0;
@ -1164,6 +1167,8 @@ void mpi_mul_hlp( size_t i, mbedtls_mpi_uint *s, mbedtls_mpi_uint *d, mbedtls_mp
while( c != 0 );
}
#endif
#if !defined(MBEDTLS_MPI_MUL_MPI_ALT)
/*
* Baseline multiplication: X = A * B (HAC 14.12)
@ -1526,6 +1531,8 @@ int mbedtls_mpi_mod_int( mbedtls_mpi_uint *r, const mbedtls_mpi *A, mbedtls_mpi_
return( 0 );
}
#if !defined(MBEDTLS_MPI_EXP_MOD_ALT)
/*
* Fast Montgomery initialization (thanks to Tom St Denis)
*/
@ -1600,7 +1607,6 @@ static int mpi_montred( mbedtls_mpi *A, const mbedtls_mpi *N, mbedtls_mpi_uint m
return( mpi_montmul( A, &U, N, mm, T ) );
}
#if !defined(MBEDTLS_MPI_EXP_MOD_ALT)
/*
* Sliding-window exponentiation: X = A^E mod N (HAC 14.85)
*/

902
components/mbedtls/port/esp_bignum.c
View file

@ -23,514 +23,528 @@
#include <stdio.h>
#include <string.h>
#include <malloc.h>
#include <limits.h>
#include <assert.h>
#include "mbedtls/bignum.h"
#include "mbedtls/bn_mul.h"
#include "rom/bigint.h"
#include "soc/hwcrypto_reg.h"
#include "esp_system.h"
#include "esp_log.h"
#include "esp_intr.h"
#include "esp_attr.h"
#if defined(MBEDTLS_MPI_MUL_MPI_ALT) || defined(MBEDTLS_MPI_EXP_MOD_ALT)
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
/* Constants from mbedTLS bignum.c */
#define ciL (sizeof(mbedtls_mpi_uint)) /* chars in limb */
#define biL (ciL << 3) /* bits in limb */
static const __attribute__((unused)) char *TAG = "bignum";
#if defined(CONFIG_MBEDTLS_MPI_USE_INTERRUPT)
static SemaphoreHandle_t op_complete_sem;
static IRAM_ATTR void rsa_complete_isr(void *arg)
{
BaseType_t higher_woken;
REG_WRITE(RSA_INTERRUPT_REG, 1);
xSemaphoreGiveFromISR(op_complete_sem, &higher_woken);
if (higher_woken) {
portYIELD_FROM_ISR();
}
}
static void rsa_isr_initialise()
{
if (op_complete_sem == NULL) {
op_complete_sem = xSemaphoreCreateBinary();
intr_matrix_set(xPortGetCoreID(), ETS_RSA_INTR_SOURCE, CONFIG_MBEDTLS_MPI_INTERRUPT_NUM);
xt_set_interrupt_handler(CONFIG_MBEDTLS_MPI_INTERRUPT_NUM, &rsa_complete_isr, NULL);
xthal_set_intclear(1 << CONFIG_MBEDTLS_MPI_INTERRUPT_NUM);
xt_ints_on(1 << CONFIG_MBEDTLS_MPI_INTERRUPT_NUM);
}
}
#endif /* CONFIG_MBEDTLS_MPI_USE_INTERRUPT */
static _lock_t mpi_lock;
/* At the moment these hardware locking functions aren't exposed publically
for MPI. If you want to use the ROM bigint functions and co-exist with mbedTLS,
please raise a feature request.
*/
static void esp_mpi_acquire_hardware( void )
void esp_mpi_acquire_hardware( void )
{
/* newlib locks lazy initialize on ESP-IDF */
_lock_acquire(&mpi_lock);
ets_bigint_enable();
#ifdef CONFIG_MBEDTLS_MPI_USE_INTERRUPT
rsa_isr_initialise();
#endif
}
static void esp_mpi_release_hardware( void )
void esp_mpi_release_hardware( void )
{
ets_bigint_disable();
_lock_release(&mpi_lock);
}
/*
* Helper for mbedtls_mpi multiplication
* copied/trimmed from mbedtls bignum.c
*/
static void mpi_mul_hlp( size_t i, mbedtls_mpi_uint *s, mbedtls_mpi_uint *d, mbedtls_mpi_uint b )
{
mbedtls_mpi_uint c = 0, t = 0;
/* Number of words used to hold 'mpi', rounded up to nearest
16 words (512 bits) to match hardware support.
for( ; i >= 16; i -= 16 )
{
MULADDC_INIT
MULADDC_CORE MULADDC_CORE
MULADDC_CORE MULADDC_CORE
MULADDC_CORE MULADDC_CORE
MULADDC_CORE MULADDC_CORE
Note that mpi->n (size of memory buffer) may be higher than this
number, if the high bits are mostly zeroes.
MULADDC_CORE MULADDC_CORE
MULADDC_CORE MULADDC_CORE
MULADDC_CORE MULADDC_CORE
MULADDC_CORE MULADDC_CORE
MULADDC_STOP
}
for( ; i >= 8; i -= 8 )
{
MULADDC_INIT
MULADDC_CORE MULADDC_CORE
MULADDC_CORE MULADDC_CORE
MULADDC_CORE MULADDC_CORE
MULADDC_CORE MULADDC_CORE
MULADDC_STOP
}
for( ; i > 0; i-- )
{
MULADDC_INIT
MULADDC_CORE
MULADDC_STOP
}
t++;
do {
*d += c; c = ( *d < c ); d++;
}
while( c != 0 );
}
/*
* Helper for mbedtls_mpi subtraction
* Copied/adapter from mbedTLS bignum.c
*/
static void mpi_sub_hlp( size_t n, mbedtls_mpi_uint *s, mbedtls_mpi_uint *d )
{
size_t i;
mbedtls_mpi_uint c, z;
for( i = c = 0; i < n; i++, s++, d++ )
{
z = ( *d < c ); *d -= c;
c = ( *d < *s ) + z; *d -= *s;
}
while( c != 0 )
{
z = ( *d < c ); *d -= c;
c = z; i++; d++;
}
}
/* The following 3 Montgomery arithmetic function are
copied from mbedTLS bigint.c verbatim as they are static.
TODO: find a way to support making the versions in mbedtls
non-static.
This implementation may cause the caller to leak a small amount of
timing information when an operation is performed (length of a
given mpi value, rounded to nearest 512 bits), but not all mbedTLS
RSA operations succeed if we use mpi->N as-is (buffers are too long).
*/
/*
* Fast Montgomery initialization (thanks to Tom St Denis)
*/
static void mpi_montg_init( mbedtls_mpi_uint *mm, const mbedtls_mpi *N )
static inline size_t hardware_words_needed(const mbedtls_mpi *mpi)
{
mbedtls_mpi_uint x, m0 = N->p[0];
unsigned int i;
x = m0;
x += ( ( m0 + 2 ) & 4 ) << 1;
for( i = biL; i >= 8; i /= 2 )
x *= ( 2 - ( m0 * x ) );
*mm = ~x + 1;
size_t res = 1;
for(size_t i = 0; i < mpi->n; i++) {
if( mpi->p[i] != 0 ) {
res = i + 1;
}
}
res = (res + 0xF) & ~0xF;
return res;
}
/*
* Montgomery multiplication: A = A * B * R^-1 mod N (HAC 14.36)
*/
static int mpi_montmul( mbedtls_mpi *A, const mbedtls_mpi *B, const mbedtls_mpi *N, mbedtls_mpi_uint mm,
const mbedtls_mpi *T )
/* Convert number of bits to number of words, rounded up to nearest
512 bit (16 word) block count.
*/
static inline size_t bits_to_hardware_words(size_t num_bits)
{
size_t i, n, m;
mbedtls_mpi_uint u0, u1, *d;
return ((num_bits + 511) / 512) * 16;
}
if( T->n < N->n + 1 || T->p == NULL )
return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA );
/* Copy mbedTLS MPI bignum 'mpi' to hardware memory block at 'mem_base'.
memset( T->p, 0, T->n * ciL );
If num_words is higher than the number of words in the bignum then
these additional words will be zeroed in the memory buffer.
*/
static inline void mpi_to_mem_block(uint32_t mem_base, const mbedtls_mpi *mpi, size_t num_words)
{
uint32_t *pbase = (uint32_t *)mem_base;
uint32_t copy_words = num_words < mpi->n ? num_words : mpi->n;
d = T->p;
n = N->n;
m = ( B->n < n ) ? B->n : n;
/* Copy MPI data to memory block registers */
memcpy(pbase, mpi->p, copy_words * 4);
for( i = 0; i < n; i++ )
{
/*
* T = (T + u0*B + u1*N) / 2^biL
*/
u0 = A->p[i];
u1 = ( d[0] + u0 * B->p[0] ) * mm;
/* Zero any remaining memory block data */
bzero(pbase + copy_words, (num_words - copy_words) * 4);
mpi_mul_hlp( m, B->p, d, u0 );
mpi_mul_hlp( n, N->p, d, u1 );
/* Note: not executing memw here, can do it before we start a bignum operation */
}
*d++ = u0; d[n + 1] = 0;
/* Read mbedTLS MPI bignum back from hardware memory block.
Reads num_words words from block.
Can return a failure result if fails to grow the MPI result.
*/
static inline int mem_block_to_mpi(mbedtls_mpi *x, uint32_t mem_base, int num_words)
{
int ret = 0;
MBEDTLS_MPI_CHK( mbedtls_mpi_grow(x, num_words) );
/* Copy data from memory block registers */
memcpy(x->p, (uint32_t *)mem_base, num_words * 4);
/* Zero any remaining limbs in the bignum, if the buffer is bigger
than num_words */
for(size_t i = num_words; i < x->n; i++) {
x->p[i] = 0;
}
memcpy( A->p, d, ( n + 1 ) * ciL );
if( mbedtls_mpi_cmp_abs( A, N ) >= 0 )
mpi_sub_hlp( n, N->p, A->p );
else
/* prevent timing attacks */
mpi_sub_hlp( n, A->p, T->p );
return( 0 );
asm volatile ("memw");
cleanup:
return ret;
}
/*
* Montgomery reduction: A = A * R^-1 mod N
/**
*
* There is a need for the value of integer N' such that B^-1(B-1)-N^-1N'=1,
* where B^-1(B-1) mod N=1. Actually, only the least significant part of
* N' is needed, hence the definition N0'=N' mod b. We reproduce below the
* simple algorithm from an article by Dusse and Kaliski to efficiently
* find N0' from N0 and b
*/
static int mpi_montred( mbedtls_mpi *A, const mbedtls_mpi *N, mbedtls_mpi_uint mm, const mbedtls_mpi *T )
static mbedtls_mpi_uint modular_inverse(const mbedtls_mpi *M)
{
mbedtls_mpi_uint z = 1;
mbedtls_mpi U;
int i;
uint64_t t = 1;
uint64_t two_2_i_minus_1 = 2; /* 2^(i-1) */
uint64_t two_2_i = 4; /* 2^i */
uint64_t N = M->p[0];
U.n = U.s = (int) z;
U.p = &z;
for (i = 2; i <= 32; i++) {
if ((mbedtls_mpi_uint) N * t % two_2_i >= two_2_i_minus_1) {
t += two_2_i_minus_1;
}
return( mpi_montmul( A, &U, N, mm, T ) );
two_2_i_minus_1 <<= 1;
two_2_i <<= 1;
}
return (mbedtls_mpi_uint)(UINT32_MAX - t + 1);
}
/* Allocate parameters used by hardware MPI multiply,
and copy mbedtls_mpi structures into them */
static int mul_pram_alloc(const mbedtls_mpi *A, const mbedtls_mpi *B, char **pA, char **pB, char **pX, size_t *bites)
{
char *sa, *sb, *sx;
// int algn;
int words, bytes;
int abytes, bbytes;
if (A->n > B->n)
words = A->n;
else
words = B->n;
bytes = (words / 16 + ((words % 16) ? 1 : 0 )) * 16 * 4 * 2;
abytes = A->n * 4;
bbytes = B->n * 4;
sa = malloc(bytes);
if (!sa) {
return -1;
}
sb = malloc(bytes);
if (!sb) {
free(sa);
return -1;
}
sx = malloc(bytes);
if (!sx) {
free(sa);
free(sb);
return -1;
}
memcpy(sa, A->p, abytes);
memset(sa + abytes, 0, bytes - abytes);
memcpy(sb, B->p, bbytes);
memset(sb + bbytes, 0, bytes - bbytes);
*pA = sa;
*pB = sb;
*pX = sx;
*bites = bytes * 4;
return 0;
}
#if defined(MBEDTLS_MPI_MUL_MPI_ALT)
int mbedtls_mpi_mul_mpi( mbedtls_mpi *X, const mbedtls_mpi *A, const mbedtls_mpi *B )
{
int ret = -1;
size_t i, j;
char *s1 = NULL, *s2 = NULL, *dest = NULL;
size_t bites;
mbedtls_mpi TA, TB;
mbedtls_mpi_init( &TA ); mbedtls_mpi_init( &TB );
if( X == A ) { MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &TA, A ) ); A = &TA; }
if( X == B ) { MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &TB, B ) ); B = &TB; }
for( i = A->n; i > 0; i-- )
if( A->p[i - 1] != 0 )
break;
for( j = B->n; j > 0; j-- )
if( B->p[j - 1] != 0 )
break;
MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, i + j ) );
MBEDTLS_MPI_CHK( mbedtls_mpi_lset( X, 0 ) );
if (mul_pram_alloc(A, B, &s1, &s2, &dest, &bites)) {
goto cleanup;
}
esp_mpi_acquire_hardware();
if (ets_bigint_mult_prepare((uint32_t *)s1, (uint32_t *)s2, bites)){
ets_bigint_wait_finish();
if (ets_bigint_mult_getz((uint32_t *)dest, bites) == true) {
memcpy(X->p, dest, (i + j) * 4);
ret = 0;
} else {
printf("ets_bigint_mult_getz failed\n");
}
} else{
printf("Baseline multiplication failed\n");
}
esp_mpi_release_hardware();
X->s = A->s * B->s;
free(s1);
free(s2);
free(dest);
cleanup:
mbedtls_mpi_free( &TB ); mbedtls_mpi_free( &TA );
return( ret );
}
#endif /* MBEDTLS_MPI_MUL_MPI_ALT */
#if defined(MBEDTLS_MPI_EXP_MOD_ALT)
/*
* Sliding-window exponentiation: X = A^E mod N (HAC 14.85)
/* Calculate Rinv = RR^2 mod M, where:
*
* R = b^n where b = 2^32, n=num_words,
* R = 2^N (where N=num_bits)
* RR = R^2 = 2^(2*N) (where N=num_bits=num_words*32)
*
* This calculation is computationally expensive (mbedtls_mpi_mod_mpi)
* so caller should cache the result where possible.
*
* DO NOT call this function while holding esp_mpi_acquire_hardware().
*
*/
int mbedtls_mpi_exp_mod( mbedtls_mpi* X, const mbedtls_mpi* A, const mbedtls_mpi* E, const mbedtls_mpi* N, mbedtls_mpi* _RR )
static int calculate_rinv(mbedtls_mpi *Rinv, const mbedtls_mpi *M, int num_words)
{
int ret;
size_t wbits, wsize, one = 1;
size_t i, j, nblimbs;
size_t bufsize, nbits;
mbedtls_mpi_uint ei, mm, state;
mbedtls_mpi RR, T, W[ 2 << MBEDTLS_MPI_WINDOW_SIZE ], Apos;
int neg;
size_t num_bits = num_words * 32;
mbedtls_mpi RR;
mbedtls_mpi_init(&RR);
MBEDTLS_MPI_CHK(mbedtls_mpi_set_bit(&RR, num_bits * 2, 1));
MBEDTLS_MPI_CHK(mbedtls_mpi_mod_mpi(Rinv, &RR, M));
if( mbedtls_mpi_cmp_int( N, 0 ) < 0 || ( N->p[0] & 1 ) == 0 )
return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA );
cleanup:
mbedtls_mpi_free(&RR);
return ret;
}
if( mbedtls_mpi_cmp_int( E, 0 ) < 0 )
return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA );
/*
* Init temps and window size
*/
mpi_montg_init( &mm, N );
mbedtls_mpi_init( &RR ); mbedtls_mpi_init( &T );
mbedtls_mpi_init( &Apos );
memset( W, 0, sizeof( W ) );
/* Execute RSA operation. op_reg specifies which 'START' register
to write to.
*/
static inline void execute_op(uint32_t op_reg)
{
/* Clear interrupt status */
REG_WRITE(RSA_INTERRUPT_REG, 1);
i = mbedtls_mpi_bitlen( E );
/* Note: above REG_WRITE includes a memw, so we know any writes
to the memory blocks are also complete. */
wsize = ( i > 671 ) ? 6 : ( i > 239 ) ? 5 :
( i > 79 ) ? 4 : ( i > 23 ) ? 3 : 1;
REG_WRITE(op_reg, 1);
if( wsize > MBEDTLS_MPI_WINDOW_SIZE )
wsize = MBEDTLS_MPI_WINDOW_SIZE;
#ifdef CONFIG_MBEDTLS_MPI_USE_INTERRUPT
if (!xSemaphoreTake(op_complete_sem, 2000 / portTICK_PERIOD_MS)) {
ESP_LOGE(TAG, "Timed out waiting for RSA operation (op_reg 0x%x int_reg 0x%x)",
op_reg, REG_READ(RSA_INTERRUPT_REG));
abort(); /* indicates a fundamental problem with driver */
}
#else
while(REG_READ(RSA_INTERRUPT_REG) != 1)
{ }
#endif
j = N->n + 1;
MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, j ) );
MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &W[1], j ) );
MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &T, j * 2 ) );
/* clear the interrupt */
REG_WRITE(RSA_INTERRUPT_REG, 1);
}
/*
* Compensate for negative A (and correct at the end)
*/
neg = ( A->s == -1 );
if( neg )
{
MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &Apos, A ) );
Apos.s = 1;
A = &Apos;
/* Sub-stages of modulo multiplication/exponentiation operations */
inline static int modular_multiply_finish(mbedtls_mpi *Z, const mbedtls_mpi *X, const mbedtls_mpi *Y, size_t num_words);
/* Z = (X * Y) mod M
Not an mbedTLS function
*/
int esp_mpi_mul_mpi_mod(mbedtls_mpi *Z, const mbedtls_mpi *X, const mbedtls_mpi *Y, const mbedtls_mpi *M)
{
int ret;
size_t num_words = hardware_words_needed(M);
mbedtls_mpi Rinv;
mbedtls_mpi_uint Mprime;
/* Calculate and load the first stage montgomery multiplication */
mbedtls_mpi_init(&Rinv);
MBEDTLS_MPI_CHK(calculate_rinv(&Rinv, M, num_words));
Mprime = modular_inverse(M);
esp_mpi_acquire_hardware();
/* Load M, X, Rinv, Mprime (Mprime is mod 2^32) */
mpi_to_mem_block(RSA_MEM_M_BLOCK_BASE, M, num_words);
mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, num_words);
mpi_to_mem_block(RSA_MEM_RB_BLOCK_BASE, &Rinv, num_words);
REG_WRITE(RSA_M_DASH_REG, (uint32_t)Mprime);
/* "mode" register loaded with number of 512-bit blocks, minus 1 */
REG_WRITE(RSA_MULT_MODE_REG, (num_words / 16) - 1);
/* Execute first stage montgomery multiplication */
execute_op(RSA_MULT_START_REG);
/* execute second stage */
MBEDTLS_MPI_CHK( modular_multiply_finish(Z, X, Y, num_words) );
esp_mpi_release_hardware();
cleanup:
mbedtls_mpi_free(&Rinv);
return ret;
}
#if defined(MBEDTLS_MPI_EXP_MOD_ALT)
/*
* Sliding-window exponentiation: Z = X^Y mod M (HAC 14.85)
*
* _Rinv is optional pre-calculated version of Rinv (via calculate_rinv()).
*
* (See RSA Accelerator section in Technical Reference for more about Mprime, Rinv)
*
*/
int mbedtls_mpi_exp_mod( mbedtls_mpi* Z, const mbedtls_mpi* X, const mbedtls_mpi* Y, const mbedtls_mpi* M, mbedtls_mpi* _Rinv )
{
int ret = 0;
size_t z_words = hardware_words_needed(Z);
size_t x_words = hardware_words_needed(X);
size_t y_words = hardware_words_needed(Y);
size_t m_words = hardware_words_needed(M);
size_t num_words;
mbedtls_mpi Rinv_new; /* used if _Rinv == NULL */
mbedtls_mpi *Rinv; /* points to _Rinv (if not NULL) othwerwise &RR_new */
mbedtls_mpi_uint Mprime;
/* "all numbers must be the same length", so choose longest number
as cardinal length of operation...
*/
num_words = z_words;
if (x_words > num_words) {
num_words = x_words;
}
if (y_words > num_words) {
num_words = y_words;
}
if (m_words > num_words) {
num_words = m_words;
}
/*
* If 1st call, pre-compute R^2 mod N
*/
if( _RR == NULL || _RR->p == NULL )
{
MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &RR, 1 ) );
MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &RR, N->n * 2 * biL ) );
MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &RR, &RR, N ) );
if( _RR != NULL )
memcpy( _RR, &RR, sizeof( mbedtls_mpi) );
}
else
memcpy( &RR, _RR, sizeof( mbedtls_mpi) );
/*
* W[1] = A * R^2 * R^-1 mod N = A * R mod N
*/
if( mbedtls_mpi_cmp_mpi( A, N ) >= 0 )
MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &W[1], A, N ) );
else
MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &W[1], A ) );
mpi_montmul( &W[1], &RR, N, mm, &T );
/*
* X = R^2 * R^-1 mod N = R mod N
*/
MBEDTLS_MPI_CHK( mbedtls_mpi_copy( X, &RR ) );
mpi_montred( X, N, mm, &T );
if( wsize > 1 )
{
/*
* W[1 << (wsize - 1)] = W[1] ^ (wsize - 1)
*/
j = one << ( wsize - 1 );
MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &W[j], N->n + 1 ) );
MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &W[j], &W[1] ) );
for( i = 0; i < wsize - 1; i++ )
mpi_montmul( &W[j], &W[j], N, mm, &T );
/*
* W[i] = W[i - 1] * W[1]
*/
for( i = j + 1; i < ( one << wsize ); i++ )
{
MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &W[i], N->n + 1 ) );
MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &W[i], &W[i - 1] ) );
mpi_montmul( &W[i], &W[1], N, mm, &T );
}
if (num_words * 32 > 4096) {
return MBEDTLS_ERR_MPI_NOT_ACCEPTABLE;
}
nblimbs = E->n;
bufsize = 0;
nbits = 0;
wbits = 0;
state = 0;
while( 1 )
{
if( bufsize == 0 )
{
if( nblimbs == 0 )
break;
nblimbs--;
bufsize = sizeof( mbedtls_mpi_uint ) << 3;
}
bufsize--;
ei = (E->p[nblimbs] >> bufsize) & 1;
/*
* skip leading 0s
*/
if( ei == 0 && state == 0 )
continue;
if( ei == 0 && state == 1 )
{
/*
* out of window, square X
*/
mpi_montmul( X, X, N, mm, &T );
continue;
}
/*
* add ei to current window
*/
state = 2;
nbits++;
wbits |= ( ei << ( wsize - nbits ) );
if( nbits == wsize )
{
/*
* X = X^wsize R^-1 mod N
*/
for( i = 0; i < wsize; i++ )
mpi_montmul( X, X, N, mm, &T );
/*
* X = X * W[wbits] R^-1 mod N
*/
mpi_montmul( X, &W[wbits], N, mm, &T );
state--;
nbits = 0;
wbits = 0;
}
/* Determine RR pointer, either _RR for cached value
or local RR_new */
if (_Rinv == NULL) {
mbedtls_mpi_init(&Rinv_new);
Rinv = &Rinv_new;
} else {
Rinv = _Rinv;
}
if (Rinv->p == NULL) {
MBEDTLS_MPI_CHK(calculate_rinv(Rinv, M, num_words));
}
/*
* process the remaining bits
*/
for( i = 0; i < nbits; i++ )
{
mpi_montmul( X, X, N, mm, &T );
Mprime = modular_inverse(M);
wbits <<= 1;
esp_mpi_acquire_hardware();
if( ( wbits & ( one << wsize ) ) != 0 )
mpi_montmul( X, &W[1], N, mm, &T );
/* "mode" register loaded with number of 512-bit blocks, minus 1 */
REG_WRITE(RSA_MODEXP_MODE_REG, (num_words / 16) - 1);
/* Load M, X, Rinv, M-prime (M-prime is mod 2^32) */
mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, num_words);
mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words);
mpi_to_mem_block(RSA_MEM_M_BLOCK_BASE, M, num_words);
mpi_to_mem_block(RSA_MEM_RB_BLOCK_BASE, Rinv, num_words);
REG_WRITE(RSA_M_DASH_REG, Mprime);
execute_op(RSA_START_MODEXP_REG);
ret = mem_block_to_mpi(Z, RSA_MEM_Z_BLOCK_BASE, num_words);
esp_mpi_release_hardware();
cleanup:
if (_Rinv == NULL) {
mbedtls_mpi_free(&Rinv_new);
}
/*
* X = A^E * R * R^-1 mod N = A^E mod N
*/
mpi_montred( X, N, mm, &T );
if( neg )
{
X->s = -1;
MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( X, N, X ) );
}
cleanup:
for( i = ( one << ( wsize - 1 ) ); i < ( one << wsize ); i++ )
mbedtls_mpi_free( &W[i] );
mbedtls_mpi_free( &W[1] ); mbedtls_mpi_free( &T ); mbedtls_mpi_free( &Apos );
if( _RR == NULL || _RR->p == NULL )
mbedtls_mpi_free( &RR );
return( ret );
return ret;
}
#endif /* MBEDTLS_MPI_EXP_MOD_ALT */
#endif /* MBEDTLS_MPI_MUL_MPI_ALT || MBEDTLS_MPI_EXP_MOD_ALT */
/* Second & final step of a modular multiply - load second multiplication
* factor Y, run the multiply, read back the result into Z.
*
* Called from both mbedtls_mpi_exp_mod and mbedtls_mpi_mod_mpi.
*
* @param Z result value
* @param X first multiplication factor (used to set sign of result).
* @param Y second multiplication factor.
* @param num_words size of modulo operation, in words (limbs).
* Should already be rounded up to a multiple of 16 words (512 bits) & range checked.
*
* Caller must have already called esp_mpi_acquire_hardware().
*/
static int modular_multiply_finish(mbedtls_mpi *Z, const mbedtls_mpi *X, const mbedtls_mpi *Y, size_t num_words)
{
int ret;
/* Load Y to X input memory block, rerun */
mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, Y, num_words);
execute_op(RSA_MULT_START_REG);
/* Read result into Z */
ret = mem_block_to_mpi(Z, RSA_MEM_Z_BLOCK_BASE, num_words);
Z->s = X->s * Y->s;
return ret;
}
#if defined(MBEDTLS_MPI_MUL_MPI_ALT) /* MBEDTLS_MPI_MUL_MPI_ALT */
static int mpi_mult_mpi_failover_mod_mult(mbedtls_mpi *Z, const mbedtls_mpi *X, const mbedtls_mpi *Y, size_t num_words);
/* Z = X * Y */
int mbedtls_mpi_mul_mpi( mbedtls_mpi *Z, const mbedtls_mpi *X, const mbedtls_mpi *Y )
{
int ret;
size_t bits_x, bits_y, words_x, words_y, words_mult, words_z;
/* Count words needed for X & Y in hardware */
bits_x = mbedtls_mpi_bitlen(X);
bits_y = mbedtls_mpi_bitlen(Y);
/* Convert bit counts to words, rounded up to 512-bit
(16 word) blocks */
words_x = bits_to_hardware_words(bits_x);
words_y = bits_to_hardware_words(bits_y);
/* Short-circuit eval if either argument is 0 or 1.
This is needed as the mpi modular division
argument will sometimes call in here when one
argument is too large for the hardware unit, but the other
argument is zero or one.
This leaks some timing information, although overall there is a
lot less timing variation than a software MPI approach.
*/
if (bits_x == 0 || bits_y == 0) {
mbedtls_mpi_lset(Z, 0);
return 0;
}
if (bits_x == 1) {
return mbedtls_mpi_copy(Z, Y);
}
if (bits_y == 1) {
return mbedtls_mpi_copy(Z, X);
}
words_mult = (words_x > words_y ? words_x : words_y);
/* Result Z has to have room for double the larger factor */
words_z = words_mult * 2;
/* If either factor is over 2048 bits, we can't use the standard hardware multiplier
(it assumes result is double longest factor, and result is max 4096 bits.)
However, we can fail over to mod_mult for up to 4096 bits of result (modulo
multiplication doesn't have the same restriction, so result is simply the
number of bits in X plus number of bits in in Y.)
*/
if (words_mult * 32 > 2048) {
/* Calculate new length of Z */
words_z = bits_to_hardware_words(bits_x + bits_y);
if (words_z * 32 > 4096) {
ESP_LOGE(TAG, "ERROR: %d bit result %d bits * %d bits too large for hardware unit\n", words_z * 32, bits_x, bits_y);
return MBEDTLS_ERR_MPI_NOT_ACCEPTABLE;
}
else {
return mpi_mult_mpi_failover_mod_mult(Z, X, Y, words_z);
}
}
/* Otherwise, we can use the (faster) multiply hardware unit */
esp_mpi_acquire_hardware();
/* Copy X (right-extended) & Y (left-extended) to memory block */
mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, words_mult);
mpi_to_mem_block(RSA_MEM_Z_BLOCK_BASE + words_mult * 4, Y, words_mult);
/* NB: as Y is left-extended, we don't zero the bottom words_mult words of Y block.
This is OK for now because zeroing is done by hardware when we do esp_mpi_acquire_hardware().
*/
REG_WRITE(RSA_M_DASH_REG, 0);
/* "mode" register loaded with number of 512-bit blocks in result,
plus 7 (for range 9-12). (this is ((N~ / 32) - 1) + 8))
*/
REG_WRITE(RSA_MULT_MODE_REG, (words_z / 16) + 7);
execute_op(RSA_MULT_START_REG);
/* Read back the result */
ret = mem_block_to_mpi(Z, RSA_MEM_Z_BLOCK_BASE, words_z);
Z->s = X->s * Y->s;
esp_mpi_release_hardware();
return ret;
}
/* Special-case of mbedtls_mpi_mult_mpi(), where we use hardware montgomery mod
multiplication to calculate an mbedtls_mpi_mult_mpi result where either
A or B are >2048 bits so can't use the standard multiplication method.
Result (A bits + B bits) must still be less than 4096 bits.
This case is simpler than the general case modulo multiply of
esp_mpi_mul_mpi_mod() because we can control the other arguments:
* Modulus is chosen with M=(2^num_bits - 1) (ie M=R-1), so output
isn't actually modulo anything.
* Mprime and Rinv are therefore predictable as follows:
Mprime = 1
Rinv = 1
(See RSA Accelerator section in Technical Reference for more about Mprime, Rinv)
*/
static int mpi_mult_mpi_failover_mod_mult(mbedtls_mpi *Z, const mbedtls_mpi *X, const mbedtls_mpi *Y, size_t num_words)
{
int ret = 0;
/* Load coefficients to hardware */
esp_mpi_acquire_hardware();
/* M = 2^num_words - 1, so block is entirely FF */
for(int i = 0; i < num_words; i++) {
REG_WRITE(RSA_MEM_M_BLOCK_BASE + i * 4, UINT32_MAX);
}
/* Mprime = 1 */
REG_WRITE(RSA_M_DASH_REG, 1);
/* "mode" register loaded with number of 512-bit blocks, minus 1 */
REG_WRITE(RSA_MULT_MODE_REG, (num_words / 16) - 1);
/* Load X */
mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, num_words);
/* Rinv = 1 */
REG_WRITE(RSA_MEM_RB_BLOCK_BASE, 1);
for(int i = 1; i < num_words; i++) {
REG_WRITE(RSA_MEM_RB_BLOCK_BASE + i * 4, 0);
}
execute_op(RSA_MULT_START_REG);
/* finish the modular multiplication */
MBEDTLS_MPI_CHK( modular_multiply_finish(Z, X, Y, num_words) );
esp_mpi_release_hardware();
cleanup:
return ret;
}
#endif /* MBEDTLS_MPI_MUL_MPI_ALT */

3
components/mbedtls/port/include/aes_alt.h
View file

@ -20,7 +20,6 @@
*
*
*/
#ifndef AES_ALT_H
#define AES_ALT_H
@ -56,4 +55,4 @@ typedef esp_aes_context mbedtls_aes_context;
}
#endif
#endif /* aes.h */
#endif

78
components/mbedtls/port/include/mbedtls/bignum.h Normal file
View file

@ -0,0 +1,78 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef __ESP_MBEDTLS_BIGNUM_H__
#define __ESP_MBEDTLS_BIGNUM_H__
#include_next "mbedtls/bignum.h"
/**
* This is a wrapper for the main mbedtls/bignum.h. This wrapper
* provides a few additional ESP32-only functions.
*
* This is because we don't set MBEDTLS_BIGNUM_ALT in the same way we
* do for AES, SHA, etc. Because we still use most of the bignum.h
* implementation and just replace a few hardware accelerated
* functions (see MBEDTLS_MPI_EXP_MOD_ALT & MBEDTLS_MPI_MUL_MPI_ALT in
* esp_config.h).
*
* @note Unlike the other hardware accelerator support functions in esp32/hwcrypto, there is no
* generic "hwcrypto/bignum.h" header for using these functions without mbedTLS. The reason for this
* is that all of the function implementations depend strongly upon the mbedTLS MPI implementation.
*/
/**
* @brief Lock access to RSA Accelerator (MPI/bignum operations)
*
* RSA Accelerator hardware unit can only be used by one
* consumer at a time.
*
* @note This function is non-recursive (do not call it twice from the
* same task.)
*
* @note You do not need to call this if you are using the mbedTLS bignum.h
* API or esp_mpi_xxx functions. This function is only needed if you
* want to call ROM RSA functions or access the registers directly.
*
*/
void esp_mpi_acquire_hardware(void);
/**
* @brief Unlock access to RSA Accelerator (MPI/bignum operations)
*
* Has to be called once for each call to esp_mpi_acquire_hardware().
*
* @note You do not need to call this if you are using the mbedTLS bignum.h
* API or esp_mpi_xxx functions. This function is only needed if you
* want to call ROM RSA functions or access the registers directly.
*/
void esp_mpi_release_hardware(void);
/* @brief MPI modular mupltiplication function
*
* Calculates Z = (X * Y) mod M using MPI hardware acceleration.
*
* This is not part of the standard mbedTLS bignum API.
*
* @note All of X, Y & Z should be less than 4096 bit long or an error is returned.
*
* @param Z Result bignum, should be pre-initialised with mbedtls_mpi_init().
* @param X First multiplication argument.
* @param Y Second multiplication argument.
* @param M Modulus value for result.
*
* @return 0 on success, mbedTLS MPI error codes on failure.
*/
int esp_mpi_mul_mpi_mod(mbedtls_mpi *Z, const mbedtls_mpi *X, const mbedtls_mpi *Y, const mbedtls_mpi *M);
#endif

10
components/mbedtls/port/include/mbedtls/esp_config.h
View file

@ -239,7 +239,9 @@
/* The following units have ESP32 hardware support,
uncommenting each _ALT macro will use the
hardware-accelerated implementation. */
#ifdef CONFIG_MBEDTLS_HARDWARE_AES
#define MBEDTLS_AES_ALT
#endif
/* Currently hardware SHA does not work with TLS handshake,
due to concurrency issue. Internal TW#7111. */
@ -250,11 +252,11 @@
/* The following MPI (bignum) functions have ESP32 hardware support,
Uncommenting these macros will use the hardware-accelerated
implementations.
Disabled as number of limbs limited by bug. Internal TW#7112.
*/
//#define MBEDTLS_MPI_EXP_MOD_ALT
//#define MBEDTLS_MPI_MUL_MPI_ALT
#ifdef CONFIG_MBEDTLS_HARDWARE_MPI
#define MBEDTLS_MPI_EXP_MOD_ALT
#define MBEDTLS_MPI_MUL_MPI_ALT
#endif
/**
* \def MBEDTLS_MD2_PROCESS_ALT

17
components/mbedtls/port/include/sha1_alt.h
View file

@ -1,7 +1,16 @@
/*
* copyright (c) 2010 - 2012 Espressif System
*
*/
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _SHA1_ALT_H_
#define _SHA1_ALT_H_

18
components/mbedtls/port/include/sha256_alt.h
View file

@ -1,8 +1,16 @@
/*
* copyright (c) 2010 - 2012 Espressif System
*
*/
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _SHA256_ALT_H_
#define _SHA256_ALT_H_
@ -30,4 +38,4 @@ typedef esp_sha_context mbedtls_sha256_context;
}
#endif
#endif /* sha256.h */
#endif

19
components/mbedtls/port/include/sha512_alt.h
View file

@ -1,9 +1,16 @@
/*
* copyright (c) 2010 - 2012 Espressif System
*
* esf Link List Descriptor
*/
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _SHA512_ALT_H_
#define _SHA512_ALT_H_
@ -30,4 +37,4 @@ typedef esp_sha_context mbedtls_sha512_context;
}
#endif
#endif /* sha512.h */
#endif

5
components/mbedtls/test/component.mk Normal file
View file

@ -0,0 +1,5 @@
#
#Component Makefile
#
COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive

134
components/mbedtls/test/test_mbedtls.c Normal file
View file

@ -0,0 +1,134 @@
/* mbedTLS internal tests wrapped into Unity
Focus on testing functionality where we use ESP32 hardware
accelerated crypto features.
See also test_hwcrypto.c
*/
#include <string.h>
#include <stdio.h>
#include "mbedtls/sha1.h"
#include "mbedtls/sha256.h"
#include "mbedtls/sha512.h"
#include "mbedtls/aes.h"
#include "mbedtls/bignum.h"
#include "unity.h"
static int mbedtls_alt_sha256_self_test( int verbose );
TEST_CASE("mbedtls SHA self-tests", "[mbedtls]")
{
TEST_ASSERT_FALSE_MESSAGE(mbedtls_sha1_self_test(1), "SHA1 self-tests should pass.");
TEST_ASSERT_FALSE_MESSAGE(mbedtls_alt_sha256_self_test(1), "SHA256 self-tests should pass.");
TEST_ASSERT_FALSE_MESSAGE(mbedtls_sha512_self_test(1), "SHA512 self-tests should pass.");
}
TEST_CASE("mbedtls AES self-tests", "[aes]")
{
TEST_ASSERT_FALSE_MESSAGE(mbedtls_aes_self_test(1), "AES self-tests should pass.");
}
TEST_CASE("mbedtls MPI self-tests", "[bignum]")
{
TEST_ASSERT_FALSE_MESSAGE(mbedtls_mpi_self_test(1), "MPI self-tests should pass.");
}
/* Following code is a copy of the mbedtls_sha256 test vectors,
with the SHA-224 support removed as we don't currently support this hash.
*/
/*
* FIPS-180-2 test vectors
*/
static const unsigned char sha256_test_buf[3][57] = {
{ "abc" },
{ "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq" },
{ "" }
};
static const int sha256_test_buflen[3] = {
3, 56, 1000
};
static const unsigned char sha256_test_sum[6][32] = {
/*
* SHA-256 test vectors
*/
{
0xBA, 0x78, 0x16, 0xBF, 0x8F, 0x01, 0xCF, 0xEA,
0x41, 0x41, 0x40, 0xDE, 0x5D, 0xAE, 0x22, 0x23,
0xB0, 0x03, 0x61, 0xA3, 0x96, 0x17, 0x7A, 0x9C,
0xB4, 0x10, 0xFF, 0x61, 0xF2, 0x00, 0x15, 0xAD
},
{
0x24, 0x8D, 0x6A, 0x61, 0xD2, 0x06, 0x38, 0xB8,
0xE5, 0xC0, 0x26, 0x93, 0x0C, 0x3E, 0x60, 0x39,
0xA3, 0x3C, 0xE4, 0x59, 0x64, 0xFF, 0x21, 0x67,
0xF6, 0xEC, 0xED, 0xD4, 0x19, 0xDB, 0x06, 0xC1
},
{
0xCD, 0xC7, 0x6E, 0x5C, 0x99, 0x14, 0xFB, 0x92,
0x81, 0xA1, 0xC7, 0xE2, 0x84, 0xD7, 0x3E, 0x67,
0xF1, 0x80, 0x9A, 0x48, 0xA4, 0x97, 0x20, 0x0E,
0x04, 0x6D, 0x39, 0xCC, 0xC7, 0x11, 0x2C, 0xD0
}
};
/*
* Checkup routine
*/
static int mbedtls_alt_sha256_self_test( int verbose )
{
int j, n, buflen, ret = 0;
unsigned char buf[1024];
unsigned char sha256sum[32];
mbedtls_sha256_context ctx;
for ( j = 0; j < 3; j++ ) {
mbedtls_sha256_init( &ctx );
if ( verbose != 0 ) {
printf( " SHA-%d test #%d: ", 256, j + 1 );
}
mbedtls_sha256_starts( &ctx, 0 );
if ( j == 2 ) {
memset( buf, 'a', buflen = 1000 );
for ( n = 0; n < 1000; n++ ) {
mbedtls_sha256_update( &ctx, buf, buflen );
}
} else
mbedtls_sha256_update( &ctx, sha256_test_buf[j],
sha256_test_buflen[j] );
mbedtls_sha256_finish( &ctx, sha256sum );
if ( memcmp( sha256sum, sha256_test_sum[j], 32 ) != 0 ) {
if ( verbose != 0 ) {
printf( "failed\n" );
}
mbedtls_sha256_free( &ctx );
ret = 1;
goto exit;
}
if ( verbose != 0 ) {
printf( "passed\n" );
}
mbedtls_sha256_free( &ctx );
}
if ( verbose != 0 ) {
printf( "\n" );
}
exit:
return ( ret );
}

5
components/newlib/test/component.mk Normal file
View file

@ -0,0 +1,5 @@
#
#Component Makefile
#
COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive

102
components/newlib/test/test_newlib.c Normal file
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@ -0,0 +1,102 @@
#include <stdio.h>
#include <ctype.h>
#include <errno.h>
#include <stdlib.h>
#include <time.h>
#include "unity.h"
TEST_CASE("test ctype functions", "[newlib]")
{
TEST_ASSERT_TRUE( isalnum('a') && isalnum('A') && isalnum('z') && isalnum('Z') && isalnum('0') && isalnum('9') );
TEST_ASSERT_FALSE( isalnum('(') || isalnum('-') || isalnum(' ') || isalnum('\x81') || isalnum('.') || isalnum('\\') );
TEST_ASSERT_TRUE( isalpha('a') && isalpha('A') && isalpha('z') && isalpha('Z') );
TEST_ASSERT_FALSE( isalpha('0') || isalpha('9') || isalpha(')') || isalpha('\t') || isalpha(' ') || isalpha('\x81') );
TEST_ASSERT_TRUE( isspace(' ') && isspace('\t') && isspace('\n') && isspace('\r') );
TEST_ASSERT_FALSE( isspace('0') || isspace('9') || isspace(')') || isspace('A') || isspace('*') || isspace('\x81') || isspace('a'));
}
TEST_CASE("test atoX functions", "[newlib]")
{
TEST_ASSERT_EQUAL_INT(-2147483648, atoi("-2147483648"));
TEST_ASSERT_EQUAL_INT(2147483647, atoi("2147483647"));
TEST_ASSERT_EQUAL_INT(42, atoi("000000042"));
TEST_ASSERT_EQUAL_INT(0, strtol("foo", NULL, 10));
}
TEST_CASE("test sprintf function", "[newlib]")
{
char *res = NULL;
asprintf(&res, "%d %011i %lu %p %x %c %.4f\n", 42, 2147483647, 2147483648UL, (void *) 0x40010000, 0x40020000, 'Q', 1.0f / 137.0f);
TEST_ASSERT_NOT_NULL(res);
TEST_ASSERT_EQUAL_STRING(res, "42 02147483647 2147483648 0x40010000 40020000 Q 0.0073\n");
free(res);
}
TEST_CASE("test sscanf function", "[newlib]")
{
const char *src = "42 02147483647 2147483648 0x40010000 40020000 Q 0.0073\n";
int fourty_two;
int int_max;
unsigned long int_max_plus_one;
void *iram_ptr;
int irom_ptr;
char department;
float inv_fine_structure_constant;
int res = sscanf(src, "%d %d %lu %p %x %c %f", &fourty_two, &int_max, &int_max_plus_one, &iram_ptr, &irom_ptr, &department, &inv_fine_structure_constant);
TEST_ASSERT_EQUAL(7, res);
TEST_ASSERT_EQUAL(42, fourty_two);
TEST_ASSERT_EQUAL(2147483647, int_max);
TEST_ASSERT_EQUAL_UINT32(2147483648UL, int_max_plus_one);
TEST_ASSERT_EQUAL(0x40010000, iram_ptr);
TEST_ASSERT_EQUAL(0x40020000, irom_ptr);
TEST_ASSERT_EQUAL('Q', department);
TEST_ASSERT_TRUE(1.0f / inv_fine_structure_constant > 136 && 1.0f / inv_fine_structure_constant < 138);
}
TEST_CASE("test time functions", "[newlib]")
{
time_t now = 1464248488;
setenv("TZ", "UTC-8", 1);
struct tm *tm_utc = gmtime(&now);
TEST_ASSERT_EQUAL( 28, tm_utc->tm_sec);
TEST_ASSERT_EQUAL( 41, tm_utc->tm_min);
TEST_ASSERT_EQUAL( 7, tm_utc->tm_hour);
TEST_ASSERT_EQUAL( 26, tm_utc->tm_mday);
TEST_ASSERT_EQUAL( 4, tm_utc->tm_mon);
TEST_ASSERT_EQUAL(116, tm_utc->tm_year);
TEST_ASSERT_EQUAL( 4, tm_utc->tm_wday);
TEST_ASSERT_EQUAL(146, tm_utc->tm_yday);
struct tm *tm_local = localtime(&now);
TEST_ASSERT_EQUAL( 28, tm_local->tm_sec);
TEST_ASSERT_EQUAL( 41, tm_local->tm_min);
TEST_ASSERT_EQUAL( 15, tm_local->tm_hour);
TEST_ASSERT_EQUAL( 26, tm_local->tm_mday);
TEST_ASSERT_EQUAL( 4, tm_local->tm_mon);
TEST_ASSERT_EQUAL(116, tm_local->tm_year);
TEST_ASSERT_EQUAL( 4, tm_local->tm_wday);
TEST_ASSERT_EQUAL(146, tm_local->tm_yday);
}
static int checkFnRom(void *fn, char *name)
{
int fnaddr = (int)fn;
printf("%s: 0X%x\n", name, fnaddr);
if ((fnaddr >= 0x40000000) && (fnaddr < 0x40070000)) {
return 1;
} else {
return 0;
}
}
TEST_CASE("check if ROM is used for functions", "[newlib]")
{
TEST_ASSERT(checkFnRom(printf, "printf"));
TEST_ASSERT(checkFnRom(sscanf, "sscanf"));
TEST_ASSERT(checkFnRom(atoi, "atoi"));
TEST_ASSERT(checkFnRom(strtol, "strtol"));
}

5
components/nvs_flash/test/component.mk Normal file
View file

@ -0,0 +1,5 @@
#
#Component Makefile
#
COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive

51
components/nvs_flash/test/test_nvs.c Normal file
View file

@ -0,0 +1,51 @@
#include <stdio.h>
#include <ctype.h>
#include <errno.h>
#include <stdlib.h>
#include <time.h>
#include "unity.h"
#include "nvs.h"
#include "nvs_flash.h"
#include "esp_spi_flash.h"
#include <string.h>
TEST_CASE("various nvs tests", "[nvs]")
{
nvs_handle handle_1;
TEST_ESP_OK(nvs_flash_init());
TEST_ESP_ERR(nvs_open("test_namespace1", NVS_READONLY, &handle_1), ESP_ERR_NVS_NOT_FOUND);
TEST_ESP_ERR(nvs_set_i32(handle_1, "foo", 0x12345678), ESP_ERR_NVS_INVALID_HANDLE);
nvs_close(handle_1);
TEST_ESP_OK(nvs_open("test_namespace2", NVS_READWRITE, &handle_1));
TEST_ESP_OK(nvs_erase_all(handle_1));
TEST_ESP_OK(nvs_set_i32(handle_1, "foo", 0x12345678));
TEST_ESP_OK(nvs_set_i32(handle_1, "foo", 0x23456789));
nvs_handle handle_2;
TEST_ESP_OK(nvs_open("test_namespace3", NVS_READWRITE, &handle_2));
TEST_ESP_OK(nvs_erase_all(handle_2));
TEST_ESP_OK(nvs_set_i32(handle_2, "foo", 0x3456789a));
const char* str = "value 0123456789abcdef0123456789abcdef";
TEST_ESP_OK(nvs_set_str(handle_2, "key", str));
int32_t v1;
TEST_ESP_OK(nvs_get_i32(handle_1, "foo", &v1));
TEST_ASSERT_EQUAL_INT32(0x23456789, v1);
int32_t v2;
TEST_ESP_OK(nvs_get_i32(handle_2, "foo", &v2));
TEST_ASSERT_EQUAL_INT32(0x3456789a, v2);
char buf[strlen(str) + 1];
size_t buf_len = sizeof(buf);
TEST_ESP_OK(nvs_get_str(handle_2, "key", buf, &buf_len));
TEST_ASSERT_EQUAL_INT32(0, strcmp(buf, str));
nvs_close(handle_1);
nvs_close(handle_2);
}

0
components/nvs_flash/test/Makefile → components/nvs_flash/test_nvs_host/Makefile
View file

0
components/nvs_flash/test/catch.hpp → components/nvs_flash/test_nvs_host/catch.hpp
View file

0
components/nvs_flash/test/crc.cpp → components/nvs_flash/test_nvs_host/crc.cpp
View file

0
components/nvs_flash/test/crc.h → components/nvs_flash/test_nvs_host/crc.h
View file

0
components/nvs_flash/test/main.cpp → components/nvs_flash/test_nvs_host/main.cpp
View file

0
components/nvs_flash/test/sdkconfig.h → components/nvs_flash/test_nvs_host/sdkconfig.h
View file

0
components/nvs_flash/test/spi_flash_emulation.cpp → components/nvs_flash/test_nvs_host/spi_flash_emulation.cpp
View file

0
components/nvs_flash/test/spi_flash_emulation.h → components/nvs_flash/test_nvs_host/spi_flash_emulation.h
View file

0
components/nvs_flash/test/test_compressed_enum_table.cpp → components/nvs_flash/test_nvs_host/test_compressed_enum_table.cpp
View file

0
components/nvs_flash/test/test_intrusive_list.cpp → components/nvs_flash/test_nvs_host/test_intrusive_list.cpp
View file

0
components/nvs_flash/test/test_nvs.cpp → components/nvs_flash/test_nvs_host/test_nvs.cpp
View file

0
components/nvs_flash/test/test_spi_flash_emulation.cpp → components/nvs_flash/test_nvs_host/test_spi_flash_emulation.cpp
View file

5
components/partition_table/test/component.mk Normal file
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@ -0,0 +1,5 @@
#
#Component Makefile
#
COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive

95
components/partition_table/test/test_partition.c Normal file
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@ -0,0 +1,95 @@
#include <stdio.h>
#include <stdlib.h>
#include "unity.h"
#include "esp_partition.h"
TEST_CASE("Can read partition table", "[partition]")
{
const esp_partition_t *p = esp_partition_find_first(ESP_PARTITION_TYPE_APP, ESP_PARTITION_SUBTYPE_ANY, NULL);
TEST_ASSERT_NOT_NULL(p);
TEST_ASSERT_EQUAL(p->address, 0x10000);
TEST_ASSERT_EQUAL(p->subtype, ESP_PARTITION_SUBTYPE_APP_FACTORY);
esp_partition_iterator_t it = esp_partition_find(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_ANY, NULL);
TEST_ASSERT_NOT_NULL(it);
int count = 0;
for (; it != NULL; it = esp_partition_next(it)) {
const esp_partition_t *p = esp_partition_get(it);
TEST_ASSERT_NOT_NULL(p);
++count;
}
esp_partition_iterator_release(it);
TEST_ASSERT_EQUAL(count, 2);
printf("%d\n", __builtin_clz(count));
}
TEST_CASE("Can write, read, mmap partition", "[partition]")
{
const esp_partition_t *p = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_ANY, NULL);
TEST_ASSERT_NOT_NULL(p);
const size_t max_size = 2 * SPI_FLASH_SEC_SIZE;
uint8_t *data = (uint8_t *) malloc(max_size);
TEST_ASSERT_NOT_NULL(data);
TEST_ASSERT_EQUAL(ESP_OK, esp_partition_erase_range(p, 0, p->size));
srand(0);
size_t block_size;
for (size_t offset = 0; offset < p->size; offset += block_size) {
block_size = ((rand() + 4) % max_size) & (~0x3);
size_t left = p->size - offset;
if (block_size > left) {
block_size = left;
}
for (size_t i = 0; i < block_size / 4; ++i) {
((uint32_t *) (data))[i] = rand();
if (i == 0 && offset == 0) {
printf("write: %08x\n", ((uint32_t *) (data))[i]);
}
}
TEST_ASSERT_EQUAL(ESP_OK, esp_partition_write(p, offset, data, block_size));
}
srand(0);
for (size_t offset = 0; offset < p->size; offset += block_size) {
block_size = ((rand() + 4) % max_size) & (~0x3);
size_t left = p->size - offset;
if (block_size > left) {
block_size = left;
}
TEST_ASSERT_EQUAL(ESP_OK, esp_partition_read(p, offset, data, block_size));
for (size_t i = 0; i < block_size / 4; ++i) {
TEST_ASSERT_EQUAL(rand(), ((uint32_t *) data)[i]);
}
}
free(data);
const uint32_t *mmap_data;
spi_flash_mmap_handle_t mmap_handle;
size_t begin = 3000;
size_t size = 12000;
TEST_ASSERT_EQUAL(ESP_OK, esp_partition_mmap(p, begin, size, SPI_FLASH_MMAP_DATA,
(const void **)&mmap_data, &mmap_handle));
srand(0);
for (size_t offset = 0; offset < p->size; offset += block_size) {
block_size = ((rand() + 4) % max_size) & (~0x3);
size_t left = p->size - offset;
if (block_size > left) {
block_size = left;
}
for (size_t i = 0; i < block_size / 4; ++i) {
size_t pos = offset + i * 4;
uint32_t expected = rand();
if (pos < begin || pos >= (begin + size)) {
continue;
}
TEST_ASSERT_EQUAL(expected, mmap_data[(pos - begin) / 4]);
}
}
spi_flash_munmap(mmap_handle);
}

5
components/spi_flash/test/component.mk Normal file
View file

@ -0,0 +1,5 @@
#
#Component Makefile
#
COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive

83
components/spi_flash/test/test_mmap.c Normal file
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@ -0,0 +1,83 @@
#include <stdio.h>
#include <stdlib.h>
#include <freertos/FreeRTOS.h>
#include <freertos/task.h>
#include <freertos/semphr.h>
#include <unity.h>
#include <esp_spi_flash.h>
#include <esp_attr.h>
uint32_t buffer[1024];
static const uint32_t start = 0x200000;
static const uint32_t end = 0x300000;
TEST_CASE("Prepare data for mmap tests", "[mmap]")
{
srand(0);
for (int block = start / 0x10000; block < end / 0x10000; ++block) {
printf("Writing block %d\n", block);
for (int sector = 0; sector < 16; ++sector) {
for (uint32_t word = 0; word < 1024; ++word) {
uint32_t val = rand();
if (block == start / 0x10000 && sector == 0 && word == 0) {
printf("first word: %08x\n", val);
}
buffer[word] = val;
}
uint32_t abs_sector = (block) * 16 + sector;
printf("Writing sector %d\n", abs_sector);
ESP_ERROR_CHECK( spi_flash_erase_sector((uint16_t) abs_sector) );
ESP_ERROR_CHECK( spi_flash_write(abs_sector * SPI_FLASH_SEC_SIZE, (const uint8_t *) buffer, sizeof(buffer)) );
}
}
}
TEST_CASE("Can mmap into data address space", "[mmap]")
{
printf("Mapping %x (+%x)\n", start, end - start);
spi_flash_mmap_handle_t handle1;
const void *ptr1;
ESP_ERROR_CHECK( spi_flash_mmap(start, end - start, SPI_FLASH_MMAP_DATA, &ptr1, &handle1) );
printf("mmap_res: handle=%d ptr=%p\n", handle1, ptr1);
spi_flash_mmap_dump();
srand(0);
const uint32_t *data = (const uint32_t *) ptr1;
for (int block = 0; block < (end - start) / 0x10000; ++block) {
for (int sector = 0; sector < 16; ++sector) {
for (uint32_t word = 0; word < 1024; ++word) {
TEST_ASSERT_EQUAL_UINT32(rand(), data[(block * 16 + sector) * 1024 + word]);
}
}
}
printf("Mapping %x (+%x)\n", start - 0x10000, 0x20000);
spi_flash_mmap_handle_t handle2;
const void *ptr2;
ESP_ERROR_CHECK( spi_flash_mmap(start - 0x10000, 0x20000, SPI_FLASH_MMAP_DATA, &ptr2, &handle2) );
printf("mmap_res: handle=%d ptr=%p\n", handle2, ptr2);
spi_flash_mmap_dump();
printf("Mapping %x (+%x)\n", start, 0x10000);
spi_flash_mmap_handle_t handle3;
const void *ptr3;
ESP_ERROR_CHECK( spi_flash_mmap(start, 0x10000, SPI_FLASH_MMAP_DATA, &ptr3, &handle3) );
printf("mmap_res: handle=%d ptr=%p\n", handle3, ptr3);
spi_flash_mmap_dump();
printf("Unmapping handle1\n");
spi_flash_munmap(handle1);
spi_flash_mmap_dump();
printf("Unmapping handle2\n");
spi_flash_munmap(handle2);
spi_flash_mmap_dump();
printf("Unmapping handle3\n");
spi_flash_munmap(handle3);
}

92
components/spi_flash/test/test_spi_flash.c Normal file
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@ -0,0 +1,92 @@
#include <stdio.h>
#include <freertos/FreeRTOS.h>
#include <freertos/task.h>
#include <freertos/semphr.h>
#include <unity.h>
#include <esp_spi_flash.h>
#include <esp_attr.h>
struct flash_test_ctx {
uint32_t offset[2];
bool fail[2];
SemaphoreHandle_t done;
};
static void flash_test_task(void *arg)
{
const uint32_t coreid = xPortGetCoreID();
ets_printf("t%d\n", coreid);
struct flash_test_ctx *ctx = (struct flash_test_ctx *) arg;
vTaskDelay(100 / portTICK_PERIOD_MS);
const uint32_t sector = ctx->offset[coreid];
ets_printf("es%d\n", coreid);
if (spi_flash_erase_sector(sector) != ESP_OK) {
ctx->fail[coreid] = true;
ets_printf("Erase failed\r\n");
xSemaphoreGive(ctx->done);
vTaskDelete(NULL);
}
ets_printf("ed%d\n", coreid);
vTaskDelay(0 / portTICK_PERIOD_MS);
uint32_t val = 0xabcd1234;
const uint32_t n = 4096;
for (uint32_t offset = 0; offset < n; offset += 4) {
if (spi_flash_write(sector * SPI_FLASH_SEC_SIZE + offset, (const uint8_t *) &val, 4) != ESP_OK) {
ets_printf("Write failed at offset=%d\r\n", offset);
ctx->fail[coreid] = true;
break;
}
}
ets_printf("wd%d\n", coreid);
vTaskDelay(0 / portTICK_PERIOD_MS);
uint32_t val_read;
for (uint32_t offset = 0; offset < n; offset += 4) {
if (spi_flash_read(sector * SPI_FLASH_SEC_SIZE + offset, (uint8_t *) &val_read, 4) != ESP_OK) {
ets_printf("Read failed at offset=%d\r\n", offset);
ctx->fail[coreid] = true;
break;
}
if (val_read != val) {
ets_printf("Read invalid value=%08x at offset=%d\r\n", val_read, offset);
ctx->fail[coreid] = true;
break;
}
}
ets_printf("td%d\n", coreid);
xSemaphoreGive(ctx->done);
vTaskDelete(NULL);
}
TEST_CASE("flash write and erase work both on PRO CPU and on APP CPU", "[spi_flash]")
{
TaskHandle_t procpu_task;
TaskHandle_t appcpu_task;
struct flash_test_ctx ctx;
ctx.offset[0] = 6;
ctx.offset[1] = 7;
ctx.fail[0] = 0;
ctx.fail[1] = 0;
ctx.done = xSemaphoreCreateBinary();
xTaskCreatePinnedToCore(flash_test_task, "1", 2048, &ctx, 3, &procpu_task, 0);
if (portNUM_PROCESSORS == 2) {
xTaskCreatePinnedToCore(flash_test_task, "2", 2048, &ctx, 3, &appcpu_task, 1);
}
xSemaphoreTake(ctx.done, portMAX_DELAY);
if (portNUM_PROCESSORS == 2) {
xSemaphoreTake(ctx.done, portMAX_DELAY);
}
TEST_ASSERT_EQUAL(false, ctx.fail[0]);
if (portNUM_PROCESSORS == 2) {
TEST_ASSERT_EQUAL(false, ctx.fail[1]);
}
}

37
components/tcpip_adapter/include/tcpip_adapter.h
View file

@ -64,18 +64,22 @@ typedef struct {
ip4_addr_t gw;
} tcpip_adapter_ip_info_t;
typedef struct {
ip6_addr_t ip;
} tcpip_adapter_ip6_info_t;
typedef dhcps_lease_t tcpip_adapter_dhcps_lease_t;
#if CONFIG_DHCP_STA_LIST
typedef struct {
uint8_t mac[6];
ip4_addr_t ip;
}tcpip_adapter_sta_info_t;
} tcpip_adapter_sta_info_t;
typedef struct {
tcpip_adapter_sta_info_t sta[ESP_WIFI_MAX_CONN_NUM];
int num;
}tcpip_adapter_sta_list_t;
} tcpip_adapter_sta_list_t;
#endif
#endif
@ -211,6 +215,35 @@ esp_err_t tcpip_adapter_get_ip_info(tcpip_adapter_if_t tcpip_if, tcpip_adapter_i
*/
esp_err_t tcpip_adapter_set_ip_info(tcpip_adapter_if_t tcpip_if, tcpip_adapter_ip_info_t *ip_info);
/**
* @brief create interface's linklocal IPv6 information
*
* @note this function will create a linklocal IPv6 address about input interface,
* if this address status changed to preferred, will call event call back ,
* notify user linklocal IPv6 address has been verified
*
* @param[in] tcpip_if: the interface which we want to set IP information
*
*
* @return ESP_OK
* ESP_ERR_TCPIP_ADAPTER_INVALID_PARAMS
*/
esp_err_t tcpip_adapter_create_ip6_linklocal(tcpip_adapter_if_t tcpip_if);
/**
* @brief get interface's linkloacl IPv6 information
*
* There has an IPv6 information copy in adapter library, if interface is up,and IPv6 info
* is preferred,it will get IPv6 linklocal IP successfully
*
* @param[in] tcpip_if: the interface which we want to set IP information
* @param[in] if_ip6: If successful, IPv6 information will be returned in this argument.
*
* @return ESP_OK
* ESP_ERR_TCPIP_ADAPTER_INVALID_PARAMS
*/
esp_err_t tcpip_adapter_get_ip6_linklocal(tcpip_adapter_if_t tcpip_if, ip6_addr_t *if_ip6);
#if 0
esp_err_t tcpip_adapter_get_mac(tcpip_adapter_if_t tcpip_if, uint8_t *mac);

67
components/tcpip_adapter/tcpip_adapter_lwip.c
View file

@ -23,7 +23,8 @@
#include "lwip/tcpip.h"
#include "lwip/dhcp.h"
#include "lwip/ip_addr.h"
#include "lwip/ip6_addr.h"
#include "lwip/nd6.h"
#include "netif/wlanif.h"
#include "apps/dhcpserver.h"
@ -32,6 +33,7 @@
static struct netif *esp_netif[TCPIP_ADAPTER_IF_MAX];
static tcpip_adapter_ip_info_t esp_ip[TCPIP_ADAPTER_IF_MAX];
static tcpip_adapter_ip6_info_t esp_ip6[TCPIP_ADAPTER_IF_MAX];
static tcpip_adapter_dhcp_status_t dhcps_status = TCPIP_ADAPTER_DHCP_INIT;
static tcpip_adapter_dhcp_status_t dhcpc_status = TCPIP_ADAPTER_DHCP_INIT;
@ -234,6 +236,69 @@ esp_err_t tcpip_adapter_set_ip_info(tcpip_adapter_if_t tcpip_if, tcpip_adapter_i
return ESP_OK;
}
static void tcpip_adapter_nd6_cb(struct netif *p_netif, uint8_t ip_idex)
{
tcpip_adapter_ip6_info_t *ip6_info;
if (!p_netif) {
TCPIP_ADAPTER_DEBUG("null p_netif=%p\n", p_netif);
return;
}
if (p_netif == esp_netif[TCPIP_ADAPTER_IF_STA]) {
ip6_info = &esp_ip6[TCPIP_ADAPTER_IF_STA];
} else if(p_netif == esp_netif[TCPIP_ADAPTER_IF_AP]) {
ip6_info = &esp_ip6[TCPIP_ADAPTER_IF_AP];
} else {
return;
}
system_event_t evt;
ip6_addr_set(&ip6_info->ip, ip_2_ip6(&p_netif->ip6_addr[ip_idex]));
//notify event
evt.event_id = SYSTEM_EVENT_AP_STA_GOT_IP6;
memcpy(&evt.event_info.got_ip6.ip6_info, ip6_info, sizeof(tcpip_adapter_ip6_info_t));
esp_event_send(&evt);
}
esp_err_t tcpip_adapter_create_ip6_linklocal(tcpip_adapter_if_t tcpip_if)
{
struct netif *p_netif;
if (tcpip_if >= TCPIP_ADAPTER_IF_MAX) {
return ESP_ERR_TCPIP_ADAPTER_INVALID_PARAMS;
}
p_netif = esp_netif[tcpip_if];
if(p_netif != NULL && netif_is_up(p_netif)) {
netif_create_ip6_linklocal_address(p_netif, 1);
nd6_set_cb(p_netif, tcpip_adapter_nd6_cb);
return ESP_OK;
} else {
return ESP_FAIL;
}
}
esp_err_t tcpip_adapter_get_ip6_linklocal(tcpip_adapter_if_t tcpip_if, ip6_addr_t *if_ip6)
{
struct netif *p_netif;
if (tcpip_if >= TCPIP_ADAPTER_IF_MAX || if_ip6 == NULL) {
return ESP_ERR_TCPIP_ADAPTER_INVALID_PARAMS;
}
p_netif = esp_netif[tcpip_if];
if (p_netif != NULL && netif_is_up(p_netif) && ip6_addr_ispreferred(netif_ip6_addr_state(p_netif, 0))) {
memcpy(if_ip6, &p_netif->ip6_addr[0], sizeof(ip6_addr_t));
} else {
return ESP_FAIL;
}
return ESP_OK;
}
#if 0
esp_err_t tcpip_adapter_get_mac(tcpip_adapter_if_t tcpip_if, uint8_t mac[6])
{

37
docs/Doxyfile
View file

@ -1,3 +1,18 @@
# This is Doxygen configuration file
#
# Doxygen provides over 260 configuration statements
# To make this file easier to follow,
# it contains only statements that are non-default
#
# NOTE:
# It is recommended not to change defaults unless specifically required
# Test any changes how they affect generated documentation
# Make sure that correct warnings are generated to flag issues with documented code
#
# For the complete list of configuration statements see:
# http://www.stack.nl/~dimitri/doxygen/manual/config.html
PROJECT_NAME = "ESP32 Programming Guide"
INPUT = ../components/esp32/include/esp_wifi.h \
@ -10,14 +25,18 @@ INPUT = ../components/esp32/include/esp_wifi.h \
../components/esp32/include/esp_int_wdt.h \
../components/esp32/include/esp_task_wdt.h
WARN_NO_PARAMDOC = YES
## Get warnings for functions that have no documentation for their parameters or return value
##
WARN_NO_PARAMDOC = YES
RECURSIVE = NO
CASE_SENSE_NAMES = NO
EXTRACT_ALL = NO
## Do not complain about not having dot
##
HAVE_DOT = NO
GENERATE_XML = YES
XML_OUTPUT = xml
## Generate XML that is required for Breathe
##
GENERATE_XML = YES
XML_OUTPUT = xml
GENERATE_HTML = NO
HAVE_DOT = NO
@ -25,5 +44,9 @@ GENERATE_LATEX = NO
GENERATE_MAN = YES
GENERATE_RTF = NO
## Skip distracting progress messages
##
QUIET = YES
## Log warnings in a file for further review
##
WARN_LOGFILE = "doxygen-warning-log.txt"

BIN
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11
docs/api/bt.rst
View file

@ -9,15 +9,19 @@ Overview
Application Example
-------------------
`Instructions`_
Check `/examples <https://github.com/espressif/esp-idf/tree/master/examples>`_ folder of `espressif/esp-idf <https://github.com/espressif/esp-idf/>`_ repository, that contains the following example:
API Reference
-------------
`05_ble_adv <https://github.com/espressif/esp-idf/blob/master/examples/05_ble_adv/main/app_bt.c>`_
This is a BLE advertising demo with virtual HCI interface. Send Reset/ADV_PARAM/ADV_DATA/ADV_ENABLE HCI command for BLE advertising.
`Instructions`_
.. _Instructions: template.html
API Reference
-------------
Header Files
^^^^^^^^^^^^
@ -35,4 +39,3 @@ Functions
.. doxygenfunction:: API_vhci_host_register_callback
.. doxygenfunction:: API_vhci_host_send_packet
.. doxygenfunction:: bt_controller_init

3
docs/api/ledc.rst
View file

@ -27,7 +27,10 @@ Data Structures
^^^^^^^^^^^^^^^
.. doxygenstruct:: ledc_channel_config_t
:members:
.. doxygenstruct:: ledc_timer_config_t
:members:
Macros
^^^^^^

19
docs/api/nvs_flash.rst
View file

@ -5,8 +5,23 @@ Application Example
Two examples are provided in ESP-IDF examples directory:
- `07_nvs_rw_value <https://github.com/espressif/esp-idf/tree/master/examples/07_nvs_rw_value>`_ demostrates how to read and write integer values
- `08_nvs_rw_blob <https://github.com/espressif/esp-idf/tree/master/examples/08_nvs_rw_blob>`_ demostrates how to read and write variable length binary values
`07_nvs_rw_value <https://github.com/espressif/esp-idf/blob/master/examples/07_nvs_rw_value/main/nvs_rw_value.c>`_
Demonstrates how to read and write a single integer value using NVS.
The value holds the number of ESP32 module restarts. Since it is written to NVS, the value is preserved between restarts.
Example also shows how to check if read / write operation was successful, or certain value is not initialized in NVS. Diagnostic is provided in plain text to help track program flow and capture any issues on the way.
`08_nvs_rw_blob <https://github.com/espressif/esp-idf/blob/master/examples/08_nvs_rw_blob/main/nvs_rw_blob.c>`_
Demonstrates how to read and write a single integer value and a blob (binary large object) using NVS to preserve them between ESP32 module restarts.
* value - tracks number of ESP32 module soft and hard restarts.
* blob - contains a table with module run times. The table is read from NVS to dynamically allocated RAM. New run time is added to the table on each manually triggered soft restart and written back to NVS. Triggering is done by pulling down GPIO0.
Example also shows how to implement diagnostics if read / write operation was successful.
API Reference
-------------

93
docs/api/rmt.rst Normal file
View file

@ -0,0 +1,93 @@
RMT
========
Overview
--------
The RMT (Remote Control) module driver can be used to send and receive infrared remote control signals. Due to flexibility of RMT module, the driver can also be used to generate many other types of signals.
Application Example
-------------------
NEC remote control TX and RX example: `examples/11_rmt_nec_tx_rx <https://github.com/espressif/esp-idf/tree/master/examples/11_rmt_nec_tx_rx>`_.
API Reference
-------------
Header Files
^^^^^^^^^^^^
* `driver/rmt.h <https://github.com/espressif/esp-idf/blob/master/components/driver/include/driver/rmt.h>`_
Macros
^^^^^^
.. doxygendefine:: RMT_MEM_BLOCK_BYTE_NUM
.. doxygendefine:: RMT_MEM_ITEM_NUM
Enumerations
^^^^^^^^^^^^
.. doxygenenum:: rmt_channel_t
.. doxygenenum:: rmt_mem_owner_t
.. doxygenenum:: rmt_source_clk_t
.. doxygenenum:: rmt_data_mode_t
.. doxygenenum:: rmt_mode_t
.. doxygenenum:: rmt_idle_level_t
.. doxygenenum:: rmt_carrier_level_t
Structures
^^^^^^^^^^
.. doxygenstruct:: rmt_tx_config_t
:members:
.. doxygenstruct:: rmt_rx_config_t
:members:
.. doxygenstruct:: rmt_config_t
:members:
Functions
^^^^^^^^^
.. doxygenfunction:: rmt_set_clk_div
.. doxygenfunction:: rmt_get_clk_div
.. doxygenfunction:: rmt_set_rx_idle_thresh
.. doxygenfunction:: rmt_get_rx_idle_thresh
.. doxygenfunction:: rmt_set_mem_block_num
.. doxygenfunction:: rmt_get_mem_block_num
.. doxygenfunction:: rmt_set_tx_carrier
.. doxygenfunction:: rmt_set_mem_pd
.. doxygenfunction:: rmt_get_mem_pd
.. doxygenfunction:: rmt_tx_start
.. doxygenfunction:: rmt_tx_stop
.. doxygenfunction:: rmt_rx_start
.. doxygenfunction:: rmt_rx_stop
.. doxygenfunction:: rmt_memory_rw_rst
.. doxygenfunction:: rmt_set_memory_owner
.. doxygenfunction:: rmt_get_memory_owner
.. doxygenfunction:: rmt_set_tx_loop_mode
.. doxygenfunction:: rmt_get_tx_loop_mode
.. doxygenfunction:: rmt_set_rx_filter
.. doxygenfunction:: rmt_set_source_clk
.. doxygenfunction:: rmt_get_source_clk
.. doxygenfunction:: rmt_set_idle_level
.. doxygenfunction:: rmt_get_status
.. doxygenfunction:: rmt_set_intr_enable_mask
.. doxygenfunction:: rmt_clr_intr_enable_mask
.. doxygenfunction:: rmt_set_rx_intr_en
.. doxygenfunction:: rmt_set_err_intr_en
.. doxygenfunction:: rmt_set_tx_intr_en
.. doxygenfunction:: rmt_set_evt_intr_en
.. doxygenfunction:: rmt_set_pin
.. doxygenfunction:: rmt_config
.. doxygenfunction:: rmt_isr_register
.. doxygenfunction:: rmt_fill_tx_items
.. doxygenfunction:: rmt_driver_install
.. doxygenfunction:: rmt_driver_uninstall
.. doxygenfunction:: rmt_write_items
.. doxygenfunction:: rmt_wait_tx_done
.. doxygenfunction:: rmt_get_ringbuf_handler

1
docs/api/vfs.rst
View file

@ -25,6 +25,7 @@ Structures
^^^^^^^^^^
.. doxygenstruct:: esp_vfs_t
:members:
Functions
^^^^^^^^^

15
docs/build_system.rst
View file

@ -57,6 +57,7 @@ Example Project
---------------
An example project directory tree might look like this::
- myProject/
- Makefile
- sdkconfig
@ -66,11 +67,11 @@ An example project directory tree might look like this::
- component2/ - component.mk
- Kconfig
- src1.c
- include/
- component2.h
- include/ - component2.h
- main/ - src1.c
- src2.c
- component.mk
- build/
This example "myProject" contains the following elements:
@ -101,6 +102,7 @@ Minimal Example Makefile
^^^^^^^^^^^^^^^^^^^^^^^^
::
PROJECT_NAME := myProject
include $(IDF_PATH)/make/project.mk
@ -135,7 +137,8 @@ Minimal Component Makefile
^^^^^^^^^^^^^^^^^^^^^^^^^^
The minimal ``component.mk`` file is an empty file(!). If the file is empty, the default component behaviour is set:
- All source files in the same directory as the makefile (*.c, *.cpp, *.S) will be compiled into the component library
- All source files in the same directory as the makefile (``*.c``, ``*.cpp``, ``*.S``) will be compiled into the component library
- A sub-directory "include" will be added to the global include search path for all other components.
- The component library will be linked into the project app.
@ -209,8 +212,8 @@ The following variables can be set inside ``component.mk`` to control the build
``COMPONENT_PRIV_INCLUDEDIRS`` variable, except these paths are not
expanded relative to the component directory.
- ``COMPONENT_SRCDIRS``: Directory paths, must be relative to the
component directory, which will be searched for source files (*.cpp,
*.c, *.S). Defaults to '.', ie the component directory
component directory, which will be searched for source files (``*.cpp``,
``*.c``, ``*.S``). Defaults to '.', ie the component directory
itself. Override this to specify a different list of directories
which contain source files.
- ``COMPONENT_OBJS``: Object files to compile. Default value is a .o
@ -366,12 +369,14 @@ The configuration system can be used to conditionally compile some files
depending on the options selected in ``make menuconfig``:
``Kconfig``::
config FOO_ENABLE_BAR
bool "Enable the BAR feature."
help
This enables the BAR feature of the FOO component.
``component.mk``::
COMPONENT_OBJS := foo_a.o foo_b.o
ifdef CONFIG_FOO_BAR

121
docs/documenting-code.rst
View file

@ -40,98 +40,91 @@ Go for it!
When writing code for this repository, please follow guidelines below.
1. Document all building blocks of code: functions, structs, typedefs, enums, macros, etc. Provide enough information on purpose, functionality and limitations of documented items, as you would like to see them documented when reading the code by others.
1. Document all building blocks of code: functions, structs, typedefs, enums, macros, etc. Provide enough information on purpose, functionality and limitations of documented items, as you would like to see them documented when reading the code by others.
2. Documentation of function should describe what this function does. If it accepts input parameters and returns some value, all of them should be explained.
2. Documentation of function should describe what this function does. If it accepts input parameters and returns some value, all of them should be explained.
3. Do not add a data type before parameter or any other characters besides spaces. All spaces and line breaks are compressed into a single space. If you like to break a line, then break it twice.
3. Do not add a data type before parameter or any other characters besides spaces. All spaces and line breaks are compressed into a single space. If you like to break a line, then break it twice.
.. image:: _static/doc-code-function.png
:align: center
:alt: Sample function documented inline and after rendering
.. image:: _static/doc-code-function.png
:align: center
:alt: Sample function documented inline and after rendering
4. If function has void input or does not return any value, then skip ``@param`` or ``@return``
4. If function has void input or does not return any value, then skip ``@param`` or ``@return``
.. image:: _static/doc-code-void-function.png
:align: center
:alt: Sample void function documented inline and after rendering
.. image:: _static/doc-code-void-function.png
:align: center
:alt: Sample void function documented inline and after rendering
5. When documenting members of a ``struct``, ``typedef`` or ``enum``, place specific comment like below after each member.
5. When documenting a ``define`` as well as members of a ``struct`` or ``enum``, place specific comment like below after each member.
.. image:: _static/doc-code-member.png
:align: center
:alt: Sample of member documentation inline and after rendering
.. image:: _static/doc-code-member.png
:align: center
:alt: Sample of member documentation inline and after rendering
6. To provide well formatted lists, break the line after command (like ``@return`` in example below).
::
*
* @return
* - ESP_OK if erase operation was successful
* - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL
* - ESP_ERR_NVS_READ_ONLY if handle was opened as read only
* - ESP_ERR_NVS_NOT_FOUND if the requested key doesn't exist
* - other error codes from the underlying storage driver
*
6. To provide well formatted lists, break the line after command (like ``@return`` in example below).
.. code-block:: c
...
*
* @return
* - ESP_OK if erase operation was successful
* - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL
* - ESP_ERR_NVS_READ_ONLY if handle was opened as read only
* - ESP_ERR_NVS_NOT_FOUND if the requested key doesn't exist
* - other error codes from the underlying storage driver
*
...
7. Overview of functionality of documented header file, or group of files that make a library, should be placed in the same directory in a separate ``README.rst`` file. If directory contains header files for different APIs, then the file name should be ``apiname-readme.rst``.
7. Overview of functionality of documented header file, or group of files that make a library, should be placed in the same directory in a separate ``README.rst`` file. If directory contains header files for different APIs, then the file name should be ``apiname-readme.rst``.
Go one extra mile
-----------------
There is couple of tips, how you can make your documentation even better and more useful to the reader.
1. Add code snippets to illustrate implementation. To do so, enclose snippet using ``@code{c}`` and ``@endcode`` commands.
1. Add code snippets to illustrate implementation. To do so, enclose snippet using ``@code{c}`` and ``@endcode`` commands.
.. code-block:: c
::
...
*
* @code{c}
* // Example of using nvs_get_i32:
* int32_t max_buffer_size = 4096; // default value
* esp_err_t err = nvs_get_i32(my_handle, "max_buffer_size", &max_buffer_size);
* assert(err == ESP_OK || err == ESP_ERR_NVS_NOT_FOUND);
* // if ESP_ERR_NVS_NOT_FOUND was returned, max_buffer_size will still
* // have its default value.
* @endcode
*
...
*
* @code{c}
* // Example of using nvs_get_i32:
* int32_t max_buffer_size = 4096; // default value
* esp_err_t err = nvs_get_i32(my_handle, "max_buffer_size", &max_buffer_size);
* assert(err == ESP_OK || err == ESP_ERR_NVS_NOT_FOUND);
* // if ESP_ERR_NVS_NOT_FOUND was returned, max_buffer_size will still
* // have its default value.
* @endcode
*
The code snippet should be enclosed in a comment block of the function that it illustrates.
The code snippet should be enclosed in a comment block of the function that it illustrates.
2. To highlight some important information use command ``@attention`` or ``@note``.
2. To highlight some important information use command ``@attention`` or ``@note``.
.. code-block:: c
::
...
*
* @attention
* 1. This API only impact WIFI_MODE_STA or WIFI_MODE_APSTA mode
* 2. If the ESP32 is connected to an AP, call esp_wifi_disconnect to disconnect.
*
...
*
* @attention
* 1. This API only impact WIFI_MODE_STA or WIFI_MODE_APSTA mode
* 2. If the ESP32 is connected to an AP, call esp_wifi_disconnect to disconnect.
*
Above example also shows how to use a numbered list.
Above example also shows how to use a numbered list.
3. Use markdown to make your documentation even more readable. You will add headers, links, tables and more.
3. Use markdown to make your documentation even more readable. You will add headers, links, tables and more.
.. code-block:: c
::
...
*
* [ESP32 Technical Reference](http://espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf)
*
...
*
* [ESP32 Technical Reference](http://espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf)
*
.. note::
.. note::
Code snippets, notes, links, etc. will not make it to the documentation, if not enclosed in a comment block associated with one of documented objects.
5. Prepare one or more complete code examples together with description. Place them in a separate file ``example.rst`` in the same directory as the API header files. If directory contains header files for different APIs, then the file name should be ``apiname-example.rst``.
5. Prepare one or more complete code examples together with description. Place them in a separate file ``example.rst`` in the same directory as the API header files. If directory contains header files for different APIs, then the file name should be ``apiname-example.rst``.
Put it all together
-------------------

2
docs/doxygen_xml_to_rst.xslt
View file

@ -40,6 +40,8 @@
<xsl:text>.. doxygenstruct:: </xsl:text>
<xsl:value-of select="."/>
<xsl:text>&#xA;</xsl:text>
<xsl:text> :members:&#xA;</xsl:text>
<xsl:text>&#xA;</xsl:text>
</xsl:for-each>
<xsl:text>&#xA;</xsl:text>

18
docs/index.rst
View file

@ -5,6 +5,9 @@ ESP32 Programming Guide
Until ESP-IDF release 1.0, this documentation is a draft. It is incomplete and may have mistakes. Please mind your step!
Documentation adressed to developers of applications for `ESP32 <https://espressif.com/en/products/hardware/esp32/overview>`_ by `Espressif <https://espressif.com/>`_ using `esp-idf <https://github.com/espressif/esp-idf>`_.
Contents:
.. toctree::
@ -41,7 +44,7 @@ Contents:
1. System - TBA
1.1. Fundamentals of multiprocessor programming with FreeRTOS - TBA
1.2. Application startup flow - TBA
1.3. Flash encryption and secure boot: how they work and APIs - TBA
1.3. Flash encryption and secure boot: how they work and APIs
1.4. Lower Power Coprocessor - TBA
1.5. Watchdogs <api/wdts>
1.6. ...
@ -61,7 +64,7 @@ Contents:
6.1. GPIO
6.2. ADC - TBA
6.3. DAC - TBA
6.4. UART - TBA
6.4. UART
6.5. I2C - TBA
6.6. I2S - TBA
6.7. SPI - TBA
@ -78,9 +81,9 @@ Contents:
7.3. Touch Sensor - TBA
8. Protocols - TBA
9. Components
9.1. Logging <api/log>
9.2 Non-Volatile Storage <api/nvs_flash>
9.3 Virtual Filesystem <api/vfs>
9.1. Logging
9.2 Non-Volatile Storage
9.3 Virtual Filesystem
9.3. Http sever - TBA
10. Applications - TBA
..
@ -98,6 +101,7 @@ Contents:
api/gpio
api/uart
api/ledc
api/rmt
SPI Flash and Partition APIs <api/spi_flash>
Logging <api/log>
Non-Volatile Storage <api/nvs_flash>
@ -128,11 +132,9 @@ Contents:
COPYRIGHT
.. About - TBA
Indices
=======
-------
* :ref:`genindex`
* :ref:`search`

8
docs/security/secure-boot.rst
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@ -27,18 +27,18 @@ This is a high level overview of the secure boot process. Step by step instructi
2. Secure Boot Configuration includes "Secure boot signing key", which is a file path. This file is a ECDSA public/private key pair in a PEM format file.
2. The software bootloader image is built by esp-idf with secure boot support enabled and the public key (signature verification) portion of the secure boot signing key compiled in. This software bootloader image is flashed at offset 0x1000.
3. The software bootloader image is built by esp-idf with secure boot support enabled and the public key (signature verification) portion of the secure boot signing key compiled in. This software bootloader image is flashed at offset 0x1000.
3. On first boot, the software bootloader follows the following process to enable secure boot:
4. On first boot, the software bootloader follows the following process to enable secure boot:
- Hardware secure boot support generates a device secure bootloader key (generated via hardware RNG, then stored read/write protected in efuse), and a secure digest. The digest is derived from the key, an IV, and the bootloader image contents.
- The secure digest is flashed at offset 0x0 in the flash.
- Depending on Secure Boot Configuration, efuses are burned to disable JTAG and the ROM BASIC interpreter (it is strongly recommended these options are turned on.)
- Bootloader permanently enables secure boot by burning the ABS_DONE_0 efuse. The software bootloader then becomes protected (the chip will only boot a bootloader image if the digest matches.)
4. On subsequent boots the ROM bootloader sees that the secure boot efuse is burned, reads the saved digest at 0x0 and uses hardware secure boot support to compare it with a newly calculated digest. If the digest does not match then booting will not continue. The digest and comparison are performed entirely by hardware, and the calculated digest is not readable by software. For technical details see `Hardware Secure Boot Support`.
5. On subsequent boots the ROM bootloader sees that the secure boot efuse is burned, reads the saved digest at 0x0 and uses hardware secure boot support to compare it with a newly calculated digest. If the digest does not match then booting will not continue. The digest and comparison are performed entirely by hardware, and the calculated digest is not readable by software. For technical details see `Hardware Secure Boot Support`.
5. When running in secure boot mode, the software bootloader uses the secure boot signing key (the public key of which is embedded in the bootloader itself, and therefore validated as part of the bootloader) to verify the signature appended to all subsequent partition tables and app images before they are booted.
6. When running in secure boot mode, the software bootloader uses the secure boot signing key (the public key of which is embedded in the bootloader itself, and therefore validated as part of the bootloader) to verify the signature appended to all subsequent partition tables and app images before they are booted.
Keys
----

9
examples/11_rmt_nec_tx_rx/Makefile Normal file
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@ -0,0 +1,9 @@
#
# This is a project Makefile. It is assumed the directory this Makefile resides in is a
# project subdirectory.
#
PROJECT_NAME := infrared_nec
include $(IDF_PATH)/make/project.mk

4
examples/11_rmt_nec_tx_rx/main/component.mk Normal file
View file

@ -0,0 +1,4 @@
#
# Main Makefile. This is basically the same as a component makefile.
#
# (Uses default behaviour of compiling all source files in directory, adding 'include' to include path.)

359
examples/11_rmt_nec_tx_rx/main/infrared_nec.c Normal file
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@ -0,0 +1,359 @@
/* NEC remote infrared RMT example
This example code is in the Public Domain (or CC0 licensed, at your option.)
Unless required by applicable law or agreed to in writing, this
software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
CONDITIONS OF ANY KIND, either express or implied.
*/
#include <stdio.h>
#include <string.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/queue.h"
#include "freertos/semphr.h"
#include "esp_err.h"
#include "esp_log.h"
#include "driver/rmt.h"
#include "driver/periph_ctrl.h"
#include "soc/rmt_reg.h"
static const char* NEC_TAG = "NEC";
//CHOOSE SELF TEST OR NORMAL TEST
#define RMT_RX_SELF_TEST 1
/******************************************************/
/***** SELF TEST: *****/
/*Connect RMT_TX_GPIO_NUM with RMT_RX_GPIO_NUM */
/*TX task will send NEC data with carrier disabled */
/*RX task will print NEC data it receives. */
/******************************************************/
#if RMT_RX_SELF_TEST
#define RMT_RX_ACTIVE_LEVEL 1 /*!< Data bit is active high for self test mode */
#define RMT_TX_CARRIER_EN 0 /*!< Disable carrier for self test mode */
#else
//Test with infrared LED, we have to enable carrier for transmitter
//When testing via IR led, the receiver waveform is usually active-low.
#define RMT_RX_ACTIVE_LEVEL 0 /*!< If we connect with a IR receiver, the data is active low */
#define RMT_TX_CARRIER_EN 1 /*!< Enable carrier for IR transmitter test with IR led */
#endif
#define RMT_TX_CHANNEL 1 /*!< RMT channel for transmitter */
#define RMT_TX_GPIO_NUM 16 /*!< GPIO number for transmitter signal */
#define RMT_RX_CHANNEL 0 /*!< RMT channel for receiver */
#define RMT_RX_GPIO_NUM 19 /*!< GPIO number for receiver */
#define RMT_INTR_NUM 19 /*!< RMT interrupt number, select from soc.h */
#define RMT_CLK_DIV 100 /*!< RMT counter clock divider */
#define RMT_TICK_10_US (80000000/RMT_CLK_DIV/100000) /*!< RMT counter value for 10 us.(Source clock is APB clock) */
#define NEC_HEADER_HIGH_US 9000 /*!< NEC protocol header: positive 9ms */
#define NEC_HEADER_LOW_US 4500 /*!< NEC protocol header: negative 4.5ms*/
#define NEC_BIT_ONE_HIGH_US 560 /*!< NEC protocol data bit 1: positive 0.56ms */
#define NEC_BIT_ONE_LOW_US (2250-NEC_BIT_ONE_HIGH_US) /*!< NEC protocol data bit 1: negative 1.69ms */
#define NEC_BIT_ZERO_HIGH_US 560 /*!< NEC protocol data bit 0: positive 0.56ms */
#define NEC_BIT_ZERO_LOW_US (1120-NEC_BIT_ZERO_HIGH_US) /*!< NEC protocol data bit 0: negative 0.56ms */
#define NEC_BIT_END 560 /*!< NEC protocol end: positive 0.56ms */
#define NEC_BIT_MARGIN 20 /*!< NEC parse margin time */
#define NEC_ITEM_DURATION(d) ((d & 0x7fff)*10/RMT_TICK_10_US) /*!< Parse duration time from memory register value */
#define NEC_DATA_ITEM_NUM 34 /*!< NEC code item number: header + 32bit data + end */
#define RMT_TX_DATA_NUM 100 /*!< NEC tx test data number */
#define rmt_item32_tIMEOUT_US 9500 /*!< RMT receiver timeout value(us) */
/*
* @brief Build register value of waveform for NEC one data bit
*/
inline void nec_fill_item_level(rmt_item32_t* item, int high_us, int low_us)
{
item->level0 = 1;
item->duration0 = (high_us) / 10 * RMT_TICK_10_US;
item->level1 = 0;
item->duration1 = (low_us) / 10 * RMT_TICK_10_US;
}
/*
* @brief Generate NEC header value: active 9ms + negative 4.5ms
*/
static void nec_fill_item_header(rmt_item32_t* item)
{
nec_fill_item_level(item, NEC_HEADER_HIGH_US, NEC_HEADER_LOW_US);
}
/*
* @brief Generate NEC data bit 1: positive 0.56ms + negative 1.69ms
*/
static void nec_fill_item_bit_one(rmt_item32_t* item)
{
nec_fill_item_level(item, NEC_BIT_ONE_HIGH_US, NEC_BIT_ONE_LOW_US);
}
/*
* @brief Generate NEC data bit 0: positive 0.56ms + negative 0.56ms
*/
static void nec_fill_item_bit_zero(rmt_item32_t* item)
{
nec_fill_item_level(item, NEC_BIT_ZERO_HIGH_US, NEC_BIT_ZERO_LOW_US);
}
/*
* @brief Generate NEC end signal: positive 0.56ms
*/
static void nec_fill_item_end(rmt_item32_t* item)
{
nec_fill_item_level(item, NEC_BIT_END, 0x7fff);
}
/*
* @brief Check whether duration is around target_us
*/
inline bool nec_check_in_range(int duration_ticks, int target_us, int margin_us)
{
if(( NEC_ITEM_DURATION(duration_ticks) < (target_us + margin_us))
&& ( NEC_ITEM_DURATION(duration_ticks) > (target_us - margin_us))) {
return true;
} else {
return false;
}
}
/*
* @brief Check whether this value represents an NEC header
*/
static bool nec_header_if(rmt_item32_t* item)
{
if((item->level0 == RMT_RX_ACTIVE_LEVEL && item->level1 != RMT_RX_ACTIVE_LEVEL)
&& nec_check_in_range(item->duration0, NEC_HEADER_HIGH_US, NEC_BIT_MARGIN)
&& nec_check_in_range(item->duration1, NEC_HEADER_LOW_US, NEC_BIT_MARGIN)) {
return true;
}
return false;
}
/*
* @brief Check whether this value represents an NEC data bit 1
*/
static bool nec_bit_one_if(rmt_item32_t* item)
{
if((item->level0 == RMT_RX_ACTIVE_LEVEL && item->level1 != RMT_RX_ACTIVE_LEVEL)
&& nec_check_in_range(item->duration0, NEC_BIT_ONE_HIGH_US, NEC_BIT_MARGIN)
&& nec_check_in_range(item->duration1, NEC_BIT_ONE_LOW_US, NEC_BIT_MARGIN)) {
return true;
}
return false;
}
/*
* @brief Check whether this value represents an NEC data bit 0
*/
static bool nec_bit_zero_if(rmt_item32_t* item)
{
if((item->level0 == RMT_RX_ACTIVE_LEVEL && item->level1 != RMT_RX_ACTIVE_LEVEL)
&& nec_check_in_range(item->duration0, NEC_BIT_ZERO_HIGH_US, NEC_BIT_MARGIN)
&& nec_check_in_range(item->duration1, NEC_BIT_ZERO_LOW_US, NEC_BIT_MARGIN)) {
return true;
}
return false;
}
/*
* @brief Parse NEC 32 bit waveform to address and command.
*/
static int nec_parse_items(rmt_item32_t* item, int item_num, uint16_t* addr, uint16_t* data)
{
int w_len = item_num;
if(w_len < NEC_DATA_ITEM_NUM) {
return -1;
}
int i = 0, j = 0;
if(!nec_header_if(item++)) {
return -1;
}
uint16_t addr_t = 0;
for(j = 0; j < 16; j++) {
if(nec_bit_one_if(item)) {
addr_t |= (1 << j);
} else if(nec_bit_zero_if(item)) {
addr_t |= (0 << j);
} else {
return -1;
}
item++;
i++;
}
uint16_t data_t = 0;
for(j = 0; j < 16; j++) {
if(nec_bit_one_if(item)) {
data_t |= (1 << j);
} else if(nec_bit_zero_if(item)) {
data_t |= (0 << j);
} else {
return -1;
}
item++;
i++;
}
*addr = addr_t;
*data = data_t;
return i;
}
/*
* @brief Build NEC 32bit waveform.
*/
static int nec_build_items(int channel, rmt_item32_t* item, int item_num, uint16_t addr, uint16_t cmd_data)
{
int i = 0, j = 0;
if(item_num < NEC_DATA_ITEM_NUM) {
return -1;
}
nec_fill_item_header(item++);
i++;
for(j = 0; j < 16; j++) {
if(addr & 0x1) {
nec_fill_item_bit_one(item);
} else {
nec_fill_item_bit_zero(item);
}
item++;
i++;
addr >>= 1;
}
for(j = 0; j < 16; j++) {
if(cmd_data & 0x1) {
nec_fill_item_bit_one(item);
} else {
nec_fill_item_bit_zero(item);
}
item++;
i++;
cmd_data >>= 1;
}
nec_fill_item_end(item);
i++;
return i;
}
/*
* @brief RMT transmitter initialization
*/
static void rmt_tx_init()
{
rmt_config_t rmt_tx;
rmt_tx.channel = RMT_TX_CHANNEL;
rmt_tx.gpio_num = RMT_TX_GPIO_NUM;
rmt_tx.mem_block_num = 1;
rmt_tx.clk_div = RMT_CLK_DIV;
rmt_tx.tx_config.loop_en = false;
rmt_tx.tx_config.carrier_duty_percent = 50;
rmt_tx.tx_config.carrier_freq_hz = 38000;
rmt_tx.tx_config.carrier_level = 1;
rmt_tx.tx_config.carrier_en = RMT_TX_CARRIER_EN;
rmt_tx.tx_config.idle_level = 0;
rmt_tx.tx_config.idle_output_en = true;
rmt_tx.rmt_mode = 0;
rmt_config(&rmt_tx);
rmt_driver_install(rmt_tx.channel, 0, RMT_INTR_NUM);
}
/*
* @brief RMT receiver initialization
*/
void rmt_rx_init()
{
rmt_config_t rmt_rx;
rmt_rx.channel = RMT_RX_CHANNEL;
rmt_rx.gpio_num = RMT_RX_GPIO_NUM;
rmt_rx.clk_div = RMT_CLK_DIV;
rmt_rx.mem_block_num = 1;
rmt_rx.rmt_mode = RMT_MODE_RX;
rmt_rx.rx_config.filter_en = true;
rmt_rx.rx_config.filter_ticks_thresh = 100;
rmt_rx.rx_config.idle_threshold = rmt_item32_tIMEOUT_US / 10 * (RMT_TICK_10_US);
rmt_config(&rmt_rx);
rmt_driver_install(rmt_rx.channel, 1000, RMT_INTR_NUM);
}
/**
* @brief RMT receiver demo, this task will print each received NEC data.
*
*/
void rmt_nec_rx_task()
{
int channel = RMT_RX_CHANNEL;
rmt_rx_init();
RingbufHandle_t rb = NULL;
//get RMT RX ringbuffer
rmt_get_ringbuf_handler(channel, &rb);
rmt_rx_start(channel, 1);
while(rb) {
size_t rx_size = 0;
//try to receive data from ringbuffer.
//RMT driver will push all the data it receives to its ringbuffer.
//We just need to parse the value and return the spaces of ringbuffer.
rmt_item32_t* item = (rmt_item32_t*) xRingbufferReceive(rb, &rx_size, 1000);
if(item) {
uint16_t rmt_addr;
uint16_t rmt_cmd;
int offset = 0;
while(1) {
//parse data value from ringbuffer.
int res = nec_parse_items(item + offset, rx_size / 4 - offset, &rmt_addr, &rmt_cmd);
if(res > 0) {
offset += res + 1;
ESP_LOGI(NEC_TAG, "RMT RCV --- addr: 0x%04x cmd: 0x%04x", rmt_addr, rmt_cmd);
} else {
break;
}
}
//after parsing the data, return spaces to ringbuffer.
vRingbufferReturnItem(rb, (void*) item);
} else {
break;
}
}
vTaskDelete(NULL);
}
/**
* @brief RMT transmitter demo, this task will periodically send NEC data. (100 * 32 bits each time.)
*
*/
void rmt_nec_tx_task()
{
vTaskDelay(10);
rmt_tx_init();
esp_log_level_set(NEC_TAG, ESP_LOG_INFO);
int channel = RMT_TX_CHANNEL;
uint16_t cmd = 0x0;
uint16_t addr = 0x11;
int nec_tx_num = RMT_TX_DATA_NUM;
for(;;) {
ESP_LOGI(NEC_TAG, "RMT TX DATA");
size_t size = (sizeof(rmt_item32_t) * NEC_DATA_ITEM_NUM * nec_tx_num);
//each item represent a cycle of waveform.
rmt_item32_t* item = (rmt_item32_t*) malloc(size);
int item_num = NEC_DATA_ITEM_NUM * nec_tx_num;
memset((void*) item, 0, size);
int i, offset = 0;
while(1) {
//To build a series of waveforms.
i = nec_build_items(channel, item + offset, item_num - offset, ((~addr) << 8) | addr, cmd);
if(i < 0) {
break;
}
cmd++;
addr++;
offset += i;
}
//To send data according to the waveform items.
rmt_write_items(channel, item, item_num, true);
//Wait until sending is done.
rmt_wait_tx_done(channel);
//before we free the data, make sure sending is already done.
free(item);
vTaskDelay(2000 / portTICK_RATE_MS);
}
vTaskDelete(NULL);
}

23
examples/11_rmt_nec_tx_rx/main/infrared_nec_main.c Normal file
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@ -0,0 +1,23 @@
/* NEC remote infrared RMT example
This example code is in the Public Domain (or CC0 licensed, at your option.)
Unless required by applicable law or agreed to in writing, this
software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
CONDITIONS OF ANY KIND, either express or implied.
*/
#include <stdio.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "esp_system.h"
#include "nvs_flash.h"
#include "driver/rmt.h"
#include "driver/periph_ctrl.h"
extern void rmt_nec_tx_task();
extern void rmt_nec_rx_task();
void app_main()
{
xTaskCreate(rmt_nec_rx_task, "rmt_nec_rx_task", 2048, NULL, 10, NULL);
xTaskCreate(rmt_nec_tx_task, "rmt_nec_tx_task", 2048, NULL, 10, NULL);
}

32
examples/12_pcnt/main/pcnt_test.c
View file

@ -23,9 +23,9 @@
/**
* TEST CODE BRIEF
* Use PCNT module to count rising edges generated by LEDC module.
* GPIO18 is used as ouput pin, GPIO4 is used as pulse input pin and GPIO5 is used as control input pin
* GPIO18 is used as output pin, GPIO4 is used as pulse input pin and GPIO5 is used as control input pin
*
* Open serial port to view the message printed on you screen
* Open serial port to view the message printed on your screen
*
* To do this test, you should connect GPIO18 with GPIO4
* GPIO5 is the control signal, you can leave it floating with internal pulled up, or connect it to ground.
@ -35,7 +35,7 @@
* When counter value reaches l_lim value or h_lim value, counter value will be reset to zero and trigger interrupt.
*/
static const char* TAG = "PCNT_TEST";
#define PCNT_TEST_UNIT PCNT_UNIT0
#define PCNT_TEST_UNIT PCNT_UNIT_0
#define PCNT_H_LIM_VAL (10)
#define PCNT_L_LIM_VAL (-10)
#define PCNT_THRESH1_VAL (5)
@ -74,7 +74,6 @@ void IRAM_ATTR pcnt_intr_handler(void* arg)
static void ledc_init(void)
{
periph_module_enable(PERIPH_LEDC_MODULE);
ledc_channel_config_t ledc_channel;
/*use GPIO18 as output pin*/
ledc_channel.gpio_num = LEDC_OUPUT_IO;
@ -136,13 +135,13 @@ static void pcnt_init(void)
pcnt_filter_enable(PCNT_TEST_UNIT);
/*Set value for watch point thresh1*/
pcnt_set_event_value(PCNT_TEST_UNIT, PCNT_EVT_THRES1, PCNT_THRESH1_VAL);
pcnt_set_event_value(PCNT_TEST_UNIT, PCNT_EVT_THRES_1, PCNT_THRESH1_VAL);
/*Enable watch point event of thresh1*/
pcnt_event_enable(PCNT_TEST_UNIT, PCNT_EVT_THRES1);
pcnt_event_enable(PCNT_TEST_UNIT, PCNT_EVT_THRES_1);
/*Set value for watch point thresh0*/
pcnt_set_event_value(PCNT_TEST_UNIT, PCNT_EVT_THRES0, PCNT_THRESH0_VAL);
pcnt_set_event_value(PCNT_TEST_UNIT, PCNT_EVT_THRES_0, PCNT_THRESH0_VAL);
/*Enable watch point event of thresh0*/
pcnt_event_enable(PCNT_TEST_UNIT, PCNT_EVT_THRES0);
pcnt_event_enable(PCNT_TEST_UNIT, PCNT_EVT_THRES_0);
/*Enable watch point event of h_lim*/
pcnt_event_enable(PCNT_TEST_UNIT, PCNT_EVT_H_LIM);
/*Enable watch point event of l_lim*/
@ -162,8 +161,13 @@ static void pcnt_init(void)
pcnt_counter_resume(PCNT_TEST_UNIT);
}
void pcnt_task(void *pvParameter)
void app_main()
{
/*Init LEDC for pulse input signal */
ledc_init();
/*Init PCNT functions*/
pcnt_init();
int16_t count = 0;
while(1)
{
@ -173,13 +177,3 @@ void pcnt_task(void *pvParameter)
}
}
void app_main()
{
/*Init LEDC for pulse input signal */
ledc_init();
/*Init PCNT functions*/
pcnt_init();
/*Create task to display PCNT counter value every one second*/
xTaskCreate(&pcnt_task, "pcnt_task", 1024, NULL, 5, NULL);
}

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