components/esp32/ipc.c: In function 'esp_ipc_init':
components/esp32/ipc.c:82:31: error: '%d' directive writing between 1 and 11 bytes into a region of size 5 [-Werror=format-overflow=]
sprintf(task_name,"ipc%d",i);
^~
components/esp32/ipc.c:82:27: note: directive argument in the range [-2147483648, 1]
sprintf(task_name,"ipc%d",i);
^~~~~~~
components/esp32/ipc.c:82:9: note: 'sprintf' output between 5 and 15 bytes into a destination of size 8
sprintf(task_name,"ipc%d",i);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~
INTERRUPT and CCOUNT registers will change outside of program control.
Making the inline assembly used to read these registers volatile
indicates this fact to the compiler.
Fixes https://github.com/espressif/esp-idf/issues/2127
coap client parse a string by `coap_split_uri`,fetch host should by `host.length`
otherwise, would cause `gethostbyname` failed because of inappropriate parameter.
The fix is for the situation when cache disabling mechanism causes
a deadlock with user tasks. Situation is as follows:
1. spi_flash operation is started from low-priority task on CPU0
2. It uses IPC to wake up high-priority IPC1 task on CPU1, preventing
all other tasks on CPU1 from running. This is needed to safely
disable the cache.
3. While the task which started spi_flash operation is waiting for IPC1
task to acknowledge that CPU1 is not using cache anymore, it is
preempted by a higher priority application task ("app0").
4. Task app0 busy-waits for some operation on CPU1 to complete. But
since application tasks are blocked out by IPC1 task, this never
happens. Since app0 is busy-waiting, the task doing spi flash
operation never runs.
The more or less logical soltion to the problem would be to also do
cache disabling on CPU0 and the SPI flash operation itself from IPC0
task. However IPC0 task stack would need to be increased to allow doing
SPI flash operation (and IPC1 stack as well). This would waste some
memory. An alternative approach adopted in this fix is to call FreeRTOS
functions to temporary increase the priority of SPI flash operation task
to the same level as the IPC task.
Fixes https://github.com/espressif/arduino-esp32/issues/740
Fixes https://github.com/espressif/esp-idf/issues/1157
1. fix BLE connection missing in coex mode
2. modify other parameters to make coex priority more reasonable
3. fix modem sleep procedure trap cause Wifi disable RF when BT is
working. Such cause that BR/EDR is difficult to be connected, BLE
connection stability decrease and so on.
4. modify BR/EDR coexist duration to imrove BR/EDR connect success
ratio.
5. Due to the hardware coexist bug, BLE scan interval/window should
be less than 0x100(about 160ms). Therefore, it will cause BLE cannot
scan any advertising packet while WiFi have higher priority
behaviour(such like RX beacon, scan, TX/RX VO packets and etc.).
