Commit graph

82 commits

Author SHA1 Message Date
Ivan Grokhotkov
59b7d98fec Merge branch 'feature/dfs' into 'master'
Dynamic frequency scaling

See merge request !1189
2017-10-22 12:34:11 +08:00
Ivan Grokhotkov
b6f37bda97 Merge branch 'feature/i2s_built_in_adc' into 'master'
feature(I2S-ADC): add ADC mode for I2S.

See merge request !1077
2017-10-20 15:52:56 +08:00
Ivan Grokhotkov
099565635b soc: correct values of SOC_BYTE_ACCESSIBLE_LOW, SOC_MEM_INTERNAL_LOW
Internal byte accessible memory starts with Internal ROM 1 at 0x3FF90000.
Region of RTC fast memory starting at 0x3FF80000 is not used in IDF as
it is mapped to PRO CPU only.
2017-10-19 21:35:21 +08:00
Ivan Grokhotkov
fba9678c56 uart: add support for REF_TICK 2017-10-18 14:19:20 +08:00
Ivan Grokhotkov
b03e08dc4e soc/rtc: add function to convert CPU frequency in MHz to rtc_cpu_freq_t 2017-10-18 14:19:15 +08:00
Ivan Grokhotkov
a242ae6d0b soc/rtc: add fast paths for switching between PLL and XTAL 2017-10-18 14:19:14 +08:00
Jeroen Domburg
740f8a79f0 Add logic to make external RAM usable with malloc() 2017-09-28 17:17:50 +08:00
michael
9d9e771933 fix(global, log): fix esp_log(_early)_timestamp readings after startup by correct the CCOUNT register when switching CPU clock.
TW#13332, Closes #700
2017-09-26 15:18:17 +08:00
Tian Hao
3e2ee24e4f component/bt : support bluetooth controller DRAM release dynamically
1. remove CONFIG_BT_DRAM_RELEASE from Kconfig
2. add API to release bluetooth controller DRAM to heap
2017-09-21 14:31:20 +08:00
michael
8244fa95fe feat(log): add new function to log buffer with level and hex dump. 2017-09-18 11:44:54 +08:00
Wangjialin
2fceec4d85 feature(I2S-ADC): add ADC mode for I2S.
1. Support built-in ADC for I2S.
2. Modify code of ADC, made no change to the original APIs.
3. Add APIs in I2S:
esp_err_t i2s_set_adc_mode(adc_unit_t adc_unit, adc1_channel_t adc_channel);
4. Add I2S ADC/DAC example code.
5. add old-fashion definition to make it more compatible
6. replase spi_flash_ APIs with esp_partition_ APIs
7. add example of generating audio table from wav
8. change example sound
2017-09-14 13:24:08 +08:00
Jeroen Domburg
875ae6a134 Add option to allocate external RAM using heap_alloc_caps 2017-09-14 10:47:44 +08:00
Ivan Grokhotkov
1e7c3854d3 Merge branch 'bugfix/warn_on_invalid_xtal_freq' into 'master'
soc/rtc: warn if detected XTAL frequency does not match configured one

See merge request !1242
2017-09-11 18:15:11 +08:00
Ivan Grokhotkov
de038f502c Merge branch 'feature/gpio_channel_macro' into 'master'
feat(global): add macros for GPIO->channel lookup

See merge request !1170
2017-09-11 12:15:08 +08:00
Ivan Grokhotkov
5a88f90a33 soc/rtc: warn if detected XTAL frequency does not match configured one
Since 9a8c0392, XTAL frequency is set to 40MHz by default, and users
of 26MHz boards need to select 26MHz manually. Most users are not aware
of this change, and existing getting started guides do not mention that
XTAL frequency needs to be set for some boards. So users are left with
garbage output from UART without any clue what to check.

This change adds a warning in case specific XTAL frequency was set, and
it does not match automatically detected one. This should help users
fix the issue.
2017-09-11 11:42:26 +08:00
Angus Gratton
1c7b8aa3a5 Heap tracing support 2017-09-07 16:32:05 +10:00
michael
08b9fbc242 feat(global): add macros for GPIO->channel lookup
including: macros for dac, adc, touch, rtc_gpio, uart and clk_out.

TW#13970
2017-09-07 10:40:25 +08:00
Jeroen Domburg
34372a091c Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet. 2017-09-04 12:05:49 +08:00
Ivan Grokhotkov
5666fc0a56 Merge branch 'feature/esp_timer_improvements' into 'master'
esp_timer improvements

See merge request !1172
2017-09-01 16:14:01 +08:00
Ivan Grokhotkov
d2acf1ce77 sleep: add light sleep, factor out APIs common for deep/light sleep 2017-09-01 10:36:14 +08:00
Ivan Grokhotkov
f8b719d911 soc/rtc: add sleep flag to control powerdown of VDD_SDIO 2017-09-01 10:36:14 +08:00
Ivan Grokhotkov
c743bdac88 soc/rtc: round APB clock frequency to nearest MHz 2017-09-01 10:34:36 +08:00
Ivan Grokhotkov
a25eb825e1 Merge branch 'bugfix/dport_protect_crypto' into 'master'
add protection for crypto registers in DPORT

See merge request !928
2017-08-30 11:45:35 +08:00
Ivan Grokhotkov
547ef83020 Merge branch 'feature/disable_some_perip_clk_when_cpu_start' into 'master'
Disable some peripheral clocks when cpu starts

See merge request !1089
2017-08-30 11:43:38 +08:00
XiaXiaotian
4776f73ca4 Disable some peripheral clocks when cpu starts
All peripheral clocks are default enabled after chip is powered on.
    When CPU starts, if reset reason is CPU reset, disable those clocks
    that are not enabled before reset. Otherwise, disable all those
    useless clocks.
    These peripheral clocks must be enabled when the peripherals are
    initialized and disabled when they are deinitialized.
2017-08-29 11:18:42 +08:00
michael
c7173e0d08 fix(struct_h): add extern "C" protection to *_struct.h header files. 2017-08-28 18:10:46 +08:00
Ivan Grokhotkov
82763a02af Merge branch 'feature/ets_timer' into 'master'
esp_timer: add high-resolution timer api

See merge request !1090
2017-08-28 16:38:11 +08:00
Ivan Grokhotkov
d8b66e5088 soc: release interrupts which are not reserved by timers any more 2017-08-28 11:35:27 +08:00
Ivan Grokhotkov
b636f81619 Merge branch 'bugfix/spi_command' into 'master'
fix(spi_master): fix the command field to make it more intuitive to use.

See merge request !1119
2017-08-28 10:29:56 +08:00
Angus Gratton
2624e10055 esp32 hwcrypto: Use AES registers directly 2017-08-25 16:08:03 +10:00
Angus Gratton
cb31222e8b dport access: Add _DPORT_REG_SET_BIT & _DPORT_REG_CLR_BIT 2017-08-25 16:08:02 +10:00
Ivan Grokhotkov
08287852ab esp32: add protection for DPORT registers of RSA 2017-08-25 16:08:02 +10:00
Ivan Grokhotkov
a66df0826e soc: fix/update definitions related to FRC timers
1. BIT(8) of CTRL is actually read-only bit indicating interrupt status

2. BIT(0) or CTRL had inverted meaning: 1 is “level”, 0 is “edge”

3. Add definitions of prescaler values
2017-08-24 16:33:12 +08:00
Wang Jia Lin
f1ecffb46c Merge branch 'bugfix/touch_pad_driver' into 'master'
driver(touch): fix bug and add more features

See merge request !1056
2017-08-23 19:12:39 +08:00
Wangjialin
842caaab21 driver(touch): fix bug and add more features
1. add sens_struct.h
2. add definition of RTCCNTL and RTCIO
3. modify touch pad examples
4. update example code.
5. add comments add option in menuconfig
6. fix issue that pad index 8 and 9 are mismatched
7. add touch_pad_read_filtered() api to get value filtered by iir filter
8. modify touch pad isr func
9. Make the items in perihperal.ld in the sequence of address
10. delete Kconfig for touch pad
11. add touchpad filter APIs to adjust the filter
12. add touch_pad into index.rst
13. add touch_pad in Doxyfile
14. add touch_pad.rst
2017-08-22 21:21:39 +08:00
michael
4c9754726f fix(spi_master): fix the command field to make it more intuitive to use. 2017-08-21 20:37:57 +08:00
michael
ed1d084aea fix(spi_master): make the address field more intuitive to use.
The address field should be placed at the highest bits of address and slv_wr_status registers. Instead of breaking the address into two parts and fill in each register, move the address to the highest bits and write to the registers respectively.

Breaking change: if you fill-in the SPI address filed in a previous version in some way and it works correctly, you still have to rewrite the address, in a more intuitive way.
2017-08-15 14:49:31 +08:00
michael
99769f0b00 fix(spi_master): fix the bug that VSPI no respond when host changed
from HSPI to VSPI, and vice versa.

fix the SPI control bits written wrong in the headers.

TW#12123, Github#477
2017-07-21 14:50:17 +08:00
Angus Gratton
17adb40ca8 bootloader: Calculate SHA256 hash of image on every boot
Makes app image booting more reliable (256-bit rather than 8-bit verification.)

Some measurements, time to boot a 655KB app.bin file and run to app_main() execution.

(All for rev 1 silicon, ie no 340ms spurious WDT delay.)

80MHz QIO mode:
before = 300ms
after = 140ms

40MHz DIO mode:
before = 712ms
after = 577ms

40MHz DIO mode, secure boot enabled
before = 1380ms
after = 934ms

(Secure boot involves two ECC signature verifications (partition table, app) that take approx 300ms each with 80MHz CPU.)
2017-07-19 18:31:59 +10:00
Ivan Grokhotkov
0ae916d555 Merge branch 'feature/high_level_interrupts' into 'master'
Break out high-level interrupts so a component can override them

See merge request !675
2017-07-18 10:42:31 +08:00
Ivan Grokhotkov
7fc25f18d2 Merge branch 'feature/enable_brownout_detector' into 'master'
Enable brownout detector

See merge request !811
2017-07-13 11:40:37 +08:00
Angus Gratton
ad60c30de0 heap: Rename memory "tags" to "types" to avoid confusion w/ old tag allocator API 2017-07-10 17:46:03 +08:00
Angus Gratton
8d7074ed5c soc: Move esp_ptr_dma_capable() function to soc_memory_layout.h 2017-07-10 17:46:03 +08:00
Angus Gratton
71c70cb15c heap: Refactor heap regions/capabilities out of FreeRTOS
Remove tagged heap API, rename caps_xxx to heap_caps_xxx

Also includes additional heap_caps_xxx inspection functions.
2017-07-10 17:46:03 +08:00
Angus Gratton
5ee49fd311 heap: Add new multi_heap heap implementation to replace FreeRTOS-based tagged heaps 2017-07-10 17:46:03 +08:00
Ivan Grokhotkov
01b185977c brownout detector: enable by default
Because of errata related to BOD reset function, brownout is handled as follows:

- attach an ISR to brownout interrupt
- when ISR happens, print a message and do a software restart
- esp_restart_nonos enables RTC watchdog, so if restart fails,
  there will be  one more attempt to restart (using the RTC
  watchdog)
2017-07-10 17:25:55 +08:00
Ivan Grokhotkov
780569c04a esp32: fix RTC watchdog configuration in esp_restart
RTC watchdog didn’t have any actions configured for any of the stages.
This change configures it to use SW_SYSTEM_RESET at stage 0 and a
full reset at stage 1. The timeout is now calculated based on
RTC_SLOW_CLK frequency.
2017-07-10 17:21:49 +08:00
Tian Hao
7a79d31db0 fix reg operation missing 2017-07-07 20:04:24 +08:00
Jeroen Domburg
d3290479b2 Merge panic and dport high level interrupt code to both use int level 4 2017-07-07 12:51:33 +08:00
Ivan Grokhotkov
6b2e16e51b soc: fix typo in register name 2017-07-06 12:36:06 +08:00