2017-01-08 21:54:04 +00:00
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// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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2016-12-19 14:19:47 +00:00
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "unity.h"
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#include "driver/gpio.h"
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#include "driver/sdmmc_host.h"
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2017-07-04 05:58:36 +00:00
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#include "driver/sdspi_host.h"
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2016-12-19 14:19:47 +00:00
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#include "driver/sdmmc_defs.h"
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#include "sdmmc_cmd.h"
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#include "esp_log.h"
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2017-07-31 18:24:25 +00:00
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#include "esp_heap_caps.h"
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2016-12-19 14:19:47 +00:00
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#include <time.h>
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#include <sys/time.h>
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2018-04-23 06:47:00 +00:00
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#include <unistd.h>
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2016-12-19 14:19:47 +00:00
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2018-06-04 14:00:26 +00:00
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// Can't test eMMC (slot 0) and PSRAM together
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2019-04-30 10:51:55 +00:00
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#ifndef CONFIG_ESP32_SPIRAM_SUPPORT
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2018-06-04 14:00:26 +00:00
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#define WITH_EMMC_TEST
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#endif
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/* power supply enable pin */
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#define SD_TEST_BOARD_VSEL_EN_GPIO 27
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/* power supply voltage select pin */
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#define SD_TEST_BOARD_VSEL_GPIO 26
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#define SD_TEST_BOARD_VSEL_3V3 1
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#define SD_TEST_BOARD_VSEL_1V8 0
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/* time to wait for reset / power-on */
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#define SD_TEST_BOARD_PWR_RST_DELAY_MS 5
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#define SD_TEST_BOARD_PWR_ON_DELAY_MS 50
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/* gpio which is not connected to actual CD pin, used to simulate CD behavior */
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#define CD_WP_TEST_GPIO 18
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static void sd_test_board_power_on()
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{
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gpio_set_direction(SD_TEST_BOARD_VSEL_GPIO, GPIO_MODE_OUTPUT);
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gpio_set_level(SD_TEST_BOARD_VSEL_GPIO, SD_TEST_BOARD_VSEL_3V3);
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gpio_set_direction(SD_TEST_BOARD_VSEL_EN_GPIO, GPIO_MODE_OUTPUT);
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gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 0);
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usleep(SD_TEST_BOARD_PWR_RST_DELAY_MS * 1000);
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gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 1);
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usleep(SD_TEST_BOARD_PWR_ON_DELAY_MS * 1000);
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}
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static void sd_test_board_power_off()
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{
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gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 0);
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gpio_set_direction(SD_TEST_BOARD_VSEL_GPIO, GPIO_MODE_INPUT);
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gpio_set_level(SD_TEST_BOARD_VSEL_GPIO, 0);
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gpio_set_direction(SD_TEST_BOARD_VSEL_EN_GPIO, GPIO_MODE_INPUT);
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}
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2017-07-12 11:44:17 +00:00
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TEST_CASE("MMC_RSP_BITS", "[sd]")
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{
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uint32_t data[2] = { 0x01234567, 0x89abcdef };
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TEST_ASSERT_EQUAL_HEX32(0x7, MMC_RSP_BITS(data, 0, 4));
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TEST_ASSERT_EQUAL_HEX32(0x567, MMC_RSP_BITS(data, 0, 12));
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TEST_ASSERT_EQUAL_HEX32(0xf0, MMC_RSP_BITS(data, 28, 8));
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TEST_ASSERT_EQUAL_HEX32(0x3, MMC_RSP_BITS(data, 1, 3));
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TEST_ASSERT_EQUAL_HEX32(0x11, MMC_RSP_BITS(data, 59, 5));
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}
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2016-12-19 14:19:47 +00:00
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2018-06-04 14:00:26 +00:00
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static void probe_sd(int slot, int width, int freq_khz, int ddr)
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2016-12-19 14:19:47 +00:00
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{
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2018-06-04 14:00:26 +00:00
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sd_test_board_power_on();
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2016-12-19 14:19:47 +00:00
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sdmmc_host_t config = SDMMC_HOST_DEFAULT();
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2018-06-04 14:00:26 +00:00
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config.slot = slot;
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config.max_freq_khz = freq_khz;
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2016-12-19 14:19:47 +00:00
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sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
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2018-06-04 14:00:26 +00:00
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if (width == 1) {
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config.flags = SDMMC_HOST_FLAG_1BIT;
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slot_config.width = 1;
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} else if (width == 4) {
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config.flags &= ~SDMMC_HOST_FLAG_8BIT;
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slot_config.width = 4;
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} else {
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assert(!ddr && "host driver does not support 8-line DDR mode yet");
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}
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if (!ddr) {
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config.flags &= ~SDMMC_HOST_FLAG_DDR;
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}
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2017-07-04 05:58:36 +00:00
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TEST_ESP_OK(sdmmc_host_init());
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2018-06-04 14:00:26 +00:00
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TEST_ESP_OK(sdmmc_host_init_slot(slot, &slot_config));
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2016-12-19 14:19:47 +00:00
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sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
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TEST_ASSERT_NOT_NULL(card);
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TEST_ESP_OK(sdmmc_card_init(&config, card));
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sdmmc_card_print_info(stdout, card);
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2018-06-04 14:00:26 +00:00
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uint8_t* buffer = heap_caps_malloc(512, MALLOC_CAP_DMA);
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TEST_ESP_OK(sdmmc_read_sectors(card, buffer, 0, 1));
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free(buffer);
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2017-07-04 05:58:36 +00:00
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TEST_ESP_OK(sdmmc_host_deinit());
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2016-12-19 14:19:47 +00:00
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free(card);
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2018-06-04 14:00:26 +00:00
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sd_test_board_power_off();
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2016-12-19 14:19:47 +00:00
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}
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2018-06-04 14:00:26 +00:00
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static void probe_spi(int freq_khz, int pin_miso, int pin_mosi, int pin_sck, int pin_cs)
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2018-01-23 11:24:14 +00:00
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{
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2018-06-04 14:00:26 +00:00
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sd_test_board_power_on();
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sdmmc_host_t config = SDSPI_HOST_DEFAULT();
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sdspi_slot_config_t slot_config = SDSPI_SLOT_CONFIG_DEFAULT();
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slot_config.gpio_miso = pin_miso;
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slot_config.gpio_mosi = pin_mosi;
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slot_config.gpio_sck = pin_sck;
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slot_config.gpio_cs = pin_cs;
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2018-01-23 11:24:14 +00:00
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2018-06-04 14:00:26 +00:00
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TEST_ESP_OK(sdspi_host_init());
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TEST_ESP_OK(sdspi_host_init_slot(config.slot, &slot_config));
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2018-01-23 11:24:14 +00:00
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sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
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TEST_ASSERT_NOT_NULL(card);
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TEST_ESP_OK(sdmmc_card_init(&config, card));
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sdmmc_card_print_info(stdout, card);
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2018-06-04 14:00:26 +00:00
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TEST_ESP_OK(sdspi_host_deinit());
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2018-01-23 11:24:14 +00:00
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free(card);
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2018-06-04 14:00:26 +00:00
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sd_test_board_power_off();
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2018-01-23 11:24:14 +00:00
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}
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2018-06-04 14:00:26 +00:00
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TEST_CASE("probe SD, slot 1, 4-bit", "[sd][test_env=UT_T1_SDMODE]")
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{
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probe_sd(SDMMC_HOST_SLOT_1, 4, SDMMC_FREQ_PROBING, 0);
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probe_sd(SDMMC_HOST_SLOT_1, 4, SDMMC_FREQ_DEFAULT, 0);
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probe_sd(SDMMC_HOST_SLOT_1, 4, SDMMC_FREQ_HIGHSPEED, 0);
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}
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2017-08-11 07:25:55 +00:00
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2018-06-04 14:00:26 +00:00
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TEST_CASE("probe SD, slot 1, 1-bit", "[sd][test_env=UT_T1_SDMODE]")
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2017-07-04 05:58:36 +00:00
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{
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2018-06-04 14:00:26 +00:00
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probe_sd(SDMMC_HOST_SLOT_1, 1, SDMMC_FREQ_PROBING, 0);
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probe_sd(SDMMC_HOST_SLOT_1, 1, SDMMC_FREQ_DEFAULT, 0);
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probe_sd(SDMMC_HOST_SLOT_1, 1, SDMMC_FREQ_HIGHSPEED, 0);
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}
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#ifdef WITH_EMMC_TEST
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TEST_CASE("probe eMMC, slot 0, 4-bit, DDR", "[sd][test_env=EMMC]")
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{
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probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_HIGHSPEED, 1);
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}
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TEST_CASE("probe eMMC, slot 0, 8-bit", "[sd][test_env=EMMC]")
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{
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probe_sd(SDMMC_HOST_SLOT_0, 8, SDMMC_FREQ_PROBING, 0);
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probe_sd(SDMMC_HOST_SLOT_0, 8, SDMMC_FREQ_DEFAULT, 0);
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probe_sd(SDMMC_HOST_SLOT_0, 8, SDMMC_FREQ_HIGHSPEED, 0);
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}
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#endif // WITH_EMMC_TEST
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TEST_CASE("probe SD, slot 0, 4-bit", "[sd][test_env=UT_T1_SDCARD][ignore]")
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{
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probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_PROBING, 0);
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probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_DEFAULT, 0);
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probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_HIGHSPEED, 0);
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}
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TEST_CASE("probe SD, slot 0, 1-bit", "[sd][test_env=UT_T1_SDCARD][ignore]")
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{
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probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_PROBING, 0);
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probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_DEFAULT, 0);
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probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_HIGHSPEED, 0);
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}
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TEST_CASE("probe SD in SPI mode, slot 1", "[sd][test_env=UT_T1_SPIMODE]")
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{
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probe_spi(SDMMC_FREQ_DEFAULT, 2, 15, 14, 13);
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2017-07-04 05:58:36 +00:00
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}
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2016-12-19 14:19:47 +00:00
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2018-06-04 14:00:26 +00:00
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TEST_CASE("probe SD in SPI mode, slot 0", "[sd][test_env=UT_T1_SDCARD][ignore]")
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{
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probe_spi(SDMMC_FREQ_DEFAULT, 7, 11, 6, 10);
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}
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2017-07-31 18:24:25 +00:00
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// Fill buffer pointed to by 'dst' with 'count' 32-bit ints generated
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// from 'rand' with the starting value of 'seed'
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static void fill_buffer(uint32_t seed, uint8_t* dst, size_t count) {
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srand(seed);
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for (size_t i = 0; i < count; ++i) {
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uint32_t val = rand();
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memcpy(dst + i * sizeof(uint32_t), &val, sizeof(val));
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}
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}
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// Check if the buffer pointed to by 'dst' contains 'count' 32-bit
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// ints generated from 'rand' with the starting value of 'seed'
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static void check_buffer(uint32_t seed, const uint8_t* src, size_t count) {
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srand(seed);
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for (size_t i = 0; i < count; ++i) {
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uint32_t val;
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memcpy(&val, src + i * sizeof(uint32_t), sizeof(val));
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TEST_ASSERT_EQUAL_HEX32(rand(), val);
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}
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}
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2016-12-19 14:19:47 +00:00
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static void do_single_write_read_test(sdmmc_card_t* card,
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2017-07-31 18:24:25 +00:00
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size_t start_block, size_t block_count, size_t alignment)
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2016-12-19 14:19:47 +00:00
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{
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size_t block_size = card->csd.sector_size;
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size_t total_size = block_size * block_count;
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2017-07-31 18:24:25 +00:00
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printf(" %8d | %3d | %d | %4.1f ", start_block, block_count, alignment, total_size / 1024.0f);
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uint32_t* buffer = heap_caps_malloc(total_size + 4, MALLOC_CAP_DMA);
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size_t offset = alignment % 4;
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uint8_t* c_buffer = (uint8_t*) buffer + offset;
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fill_buffer(start_block, c_buffer, total_size / sizeof(buffer[0]));
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2016-12-19 14:19:47 +00:00
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struct timeval t_start_wr;
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gettimeofday(&t_start_wr, NULL);
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2017-07-31 18:24:25 +00:00
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TEST_ESP_OK(sdmmc_write_sectors(card, c_buffer, start_block, block_count));
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2016-12-19 14:19:47 +00:00
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struct timeval t_stop_wr;
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gettimeofday(&t_stop_wr, NULL);
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float time_wr = 1e3f * (t_stop_wr.tv_sec - t_start_wr.tv_sec) + 1e-3f * (t_stop_wr.tv_usec - t_start_wr.tv_usec);
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2017-07-31 18:24:25 +00:00
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memset(buffer, 0xbb, total_size + 4);
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2016-12-19 14:19:47 +00:00
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struct timeval t_start_rd;
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gettimeofday(&t_start_rd, NULL);
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2017-07-31 18:24:25 +00:00
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TEST_ESP_OK(sdmmc_read_sectors(card, c_buffer, start_block, block_count));
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2016-12-19 14:19:47 +00:00
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struct timeval t_stop_rd;
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gettimeofday(&t_stop_rd, NULL);
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float time_rd = 1e3f * (t_stop_rd.tv_sec - t_start_rd.tv_sec) + 1e-3f * (t_stop_rd.tv_usec - t_start_rd.tv_usec);
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2017-07-31 18:24:25 +00:00
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printf(" | %6.2f | %5.2f | %6.2f | %5.2f\n",
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2016-12-19 14:19:47 +00:00
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time_wr, total_size / (time_wr / 1000) / (1024 * 1024),
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time_rd, total_size / (time_rd / 1000) / (1024 * 1024));
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2017-07-31 18:24:25 +00:00
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check_buffer(start_block, c_buffer, total_size / sizeof(buffer[0]));
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2016-12-19 14:19:47 +00:00
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free(buffer);
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}
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2017-07-04 05:58:36 +00:00
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static void read_write_test(sdmmc_card_t* card)
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2016-12-19 14:19:47 +00:00
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{
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sdmmc_card_print_info(stdout, card);
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2017-07-31 18:24:25 +00:00
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printf(" sector | count | align | size(kB) | wr_time(ms) | wr_speed(MB/s) | rd_time(ms) | rd_speed(MB/s)\n");
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do_single_write_read_test(card, 0, 1, 4);
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do_single_write_read_test(card, 0, 4, 4);
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do_single_write_read_test(card, 1, 16, 4);
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do_single_write_read_test(card, 16, 32, 4);
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do_single_write_read_test(card, 48, 64, 4);
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do_single_write_read_test(card, 128, 128, 4);
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do_single_write_read_test(card, card->csd.capacity - 64, 32, 4);
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do_single_write_read_test(card, card->csd.capacity - 64, 64, 4);
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do_single_write_read_test(card, card->csd.capacity - 8, 1, 4);
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do_single_write_read_test(card, card->csd.capacity/2, 1, 4);
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do_single_write_read_test(card, card->csd.capacity/2, 4, 4);
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do_single_write_read_test(card, card->csd.capacity/2, 8, 4);
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do_single_write_read_test(card, card->csd.capacity/2, 16, 4);
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do_single_write_read_test(card, card->csd.capacity/2, 32, 4);
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|
do_single_write_read_test(card, card->csd.capacity/2, 64, 4);
|
|
|
|
do_single_write_read_test(card, card->csd.capacity/2, 128, 4);
|
|
|
|
do_single_write_read_test(card, card->csd.capacity/2, 1, 1);
|
|
|
|
do_single_write_read_test(card, card->csd.capacity/2, 8, 1);
|
|
|
|
do_single_write_read_test(card, card->csd.capacity/2, 128, 1);
|
2017-07-04 05:58:36 +00:00
|
|
|
}
|
|
|
|
|
2018-06-04 14:00:26 +00:00
|
|
|
void test_sd_rw_blocks(int slot, int width)
|
2017-07-04 05:58:36 +00:00
|
|
|
{
|
|
|
|
sdmmc_host_t config = SDMMC_HOST_DEFAULT();
|
|
|
|
config.max_freq_khz = SDMMC_FREQ_HIGHSPEED;
|
2018-06-04 14:00:26 +00:00
|
|
|
config.slot = slot;
|
2017-07-04 05:58:36 +00:00
|
|
|
sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
|
2018-06-04 14:00:26 +00:00
|
|
|
if (width != 0) {
|
|
|
|
slot_config.width = width;
|
|
|
|
}
|
|
|
|
if (slot_config.width == 8) {
|
|
|
|
config.flags &= ~SDMMC_HOST_FLAG_DDR;
|
|
|
|
}
|
|
|
|
TEST_ESP_OK(sdmmc_host_init());
|
|
|
|
TEST_ESP_OK(sdmmc_host_init_slot(slot, &slot_config));
|
2017-07-04 05:58:36 +00:00
|
|
|
sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
|
|
|
|
TEST_ASSERT_NOT_NULL(card);
|
|
|
|
TEST_ESP_OK(sdmmc_card_init(&config, card));
|
|
|
|
read_write_test(card);
|
|
|
|
free(card);
|
|
|
|
TEST_ESP_OK(sdmmc_host_deinit());
|
|
|
|
}
|
|
|
|
|
2018-06-04 14:00:26 +00:00
|
|
|
TEST_CASE("SDMMC read/write test (SD slot 1)", "[sd][test_env=UT_T1_SDMODE]")
|
|
|
|
{
|
|
|
|
sd_test_board_power_on();
|
|
|
|
test_sd_rw_blocks(1, 4);
|
|
|
|
sd_test_board_power_off();
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef WITH_EMMC_TEST
|
|
|
|
TEST_CASE("SDMMC read/write test (eMMC slot 0, 4 line DDR)", "[sd][test_env=EMMC]")
|
|
|
|
{
|
|
|
|
sd_test_board_power_on();
|
|
|
|
test_sd_rw_blocks(0, 4);
|
|
|
|
sd_test_board_power_off();
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_CASE("SDMMC read/write test (eMMC slot 0, 8 line)", "[sd][test_env=EMMC]")
|
|
|
|
{
|
|
|
|
sd_test_board_power_on();
|
|
|
|
test_sd_rw_blocks(0, 8);
|
|
|
|
sd_test_board_power_off();
|
|
|
|
}
|
|
|
|
#endif // WITH_EMMC_TEST
|
|
|
|
|
|
|
|
TEST_CASE("SDMMC read/write test (SD slot 1, in SPI mode)", "[sdspi][test_env=UT_T1_SPIMODE]")
|
2017-07-04 05:58:36 +00:00
|
|
|
{
|
2018-06-04 14:00:26 +00:00
|
|
|
sd_test_board_power_on();
|
2017-07-04 05:58:36 +00:00
|
|
|
sdmmc_host_t config = SDSPI_HOST_DEFAULT();
|
|
|
|
sdspi_slot_config_t slot_config = SDSPI_SLOT_CONFIG_DEFAULT();
|
|
|
|
TEST_ESP_OK(sdspi_host_init());
|
|
|
|
TEST_ESP_OK(sdspi_host_init_slot(config.slot, &slot_config));
|
2020-06-30 09:29:49 +00:00
|
|
|
// This test can only run under 20MHz on ESP32, because the runner connects the card to
|
|
|
|
// non-IOMUX pins of HSPI.
|
2017-07-04 05:58:36 +00:00
|
|
|
sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
|
|
|
|
TEST_ASSERT_NOT_NULL(card);
|
|
|
|
TEST_ESP_OK(sdmmc_card_init(&config, card));
|
|
|
|
read_write_test(card);
|
2016-12-19 14:19:47 +00:00
|
|
|
free(card);
|
2017-07-04 05:58:36 +00:00
|
|
|
TEST_ESP_OK(sdspi_host_deinit());
|
2018-06-04 14:00:26 +00:00
|
|
|
sd_test_board_power_off();
|
2016-12-19 14:19:47 +00:00
|
|
|
}
|
2017-07-04 05:58:36 +00:00
|
|
|
|
2018-04-23 12:14:23 +00:00
|
|
|
TEST_CASE("reads and writes with an unaligned buffer", "[sd][test_env=UT_T1_SDMODE]")
|
2017-07-31 18:24:25 +00:00
|
|
|
{
|
2018-06-04 14:00:26 +00:00
|
|
|
sd_test_board_power_on();
|
2017-07-31 18:24:25 +00:00
|
|
|
sdmmc_host_t config = SDMMC_HOST_DEFAULT();
|
|
|
|
sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
|
2017-08-11 07:25:55 +00:00
|
|
|
TEST_ESP_OK(sdmmc_host_init());
|
|
|
|
|
2017-07-31 18:24:25 +00:00
|
|
|
TEST_ESP_OK(sdmmc_host_init_slot(SDMMC_HOST_SLOT_1, &slot_config));
|
|
|
|
sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
|
|
|
|
TEST_ASSERT_NOT_NULL(card);
|
|
|
|
TEST_ESP_OK(sdmmc_card_init(&config, card));
|
|
|
|
|
|
|
|
const size_t buffer_size = 4096;
|
|
|
|
const size_t block_count = buffer_size / 512;
|
|
|
|
const size_t extra = 4;
|
|
|
|
uint8_t* buffer = heap_caps_malloc(buffer_size + extra, MALLOC_CAP_DMA);
|
|
|
|
|
|
|
|
// Check read behavior: do aligned write, then unaligned read
|
|
|
|
const uint32_t seed = 0x89abcdef;
|
|
|
|
fill_buffer(seed, buffer, buffer_size / sizeof(uint32_t));
|
|
|
|
TEST_ESP_OK(sdmmc_write_sectors(card, buffer, 0, block_count));
|
|
|
|
memset(buffer, 0xcc, buffer_size + extra);
|
|
|
|
TEST_ESP_OK(sdmmc_read_sectors(card, buffer + 1, 0, block_count));
|
|
|
|
check_buffer(seed, buffer + 1, buffer_size / sizeof(uint32_t));
|
|
|
|
|
|
|
|
// Check write behavior: do unaligned write, then aligned read
|
|
|
|
fill_buffer(seed, buffer + 1, buffer_size / sizeof(uint32_t));
|
|
|
|
TEST_ESP_OK(sdmmc_write_sectors(card, buffer + 1, 8, block_count));
|
|
|
|
memset(buffer, 0xcc, buffer_size + extra);
|
|
|
|
TEST_ESP_OK(sdmmc_read_sectors(card, buffer, 8, block_count));
|
|
|
|
check_buffer(seed, buffer, buffer_size / sizeof(uint32_t));
|
|
|
|
|
|
|
|
free(buffer);
|
|
|
|
free(card);
|
|
|
|
TEST_ESP_OK(sdmmc_host_deinit());
|
2018-06-04 14:00:26 +00:00
|
|
|
sd_test_board_power_off();
|
2017-07-31 18:24:25 +00:00
|
|
|
}
|
2018-04-23 06:47:00 +00:00
|
|
|
|
|
|
|
static void test_cd_input(int gpio_cd_num, const sdmmc_host_t* config)
|
|
|
|
{
|
|
|
|
sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
|
|
|
|
TEST_ASSERT_NOT_NULL(card);
|
|
|
|
|
|
|
|
// SDMMC host should have configured CD as input.
|
|
|
|
// Enable output as well (not using the driver, to avoid touching input
|
|
|
|
// enable bits).
|
|
|
|
gpio_matrix_out(gpio_cd_num, SIG_GPIO_OUT_IDX, false, false);
|
|
|
|
REG_WRITE(GPIO_ENABLE_W1TS_REG, BIT(gpio_cd_num));
|
|
|
|
|
|
|
|
// Check that card initialization fails if CD is high
|
|
|
|
REG_WRITE(GPIO_OUT_W1TS_REG, BIT(gpio_cd_num));
|
2018-06-04 14:00:26 +00:00
|
|
|
usleep(1000);
|
2018-04-23 06:47:00 +00:00
|
|
|
TEST_ESP_ERR(ESP_ERR_NOT_FOUND, sdmmc_card_init(config, card));
|
|
|
|
|
|
|
|
// Check that card initialization succeeds if CD is low
|
|
|
|
REG_WRITE(GPIO_OUT_W1TC_REG, BIT(gpio_cd_num));
|
2018-06-04 14:00:26 +00:00
|
|
|
usleep(1000);
|
2018-04-23 06:47:00 +00:00
|
|
|
TEST_ESP_OK(sdmmc_card_init(config, card));
|
|
|
|
|
|
|
|
free(card);
|
|
|
|
}
|
|
|
|
|
2018-06-04 14:00:26 +00:00
|
|
|
TEST_CASE("CD input works in SD mode", "[sd][test_env=UT_T1_SDMODE]")
|
2018-04-23 06:47:00 +00:00
|
|
|
{
|
2018-06-04 14:00:26 +00:00
|
|
|
sd_test_board_power_on();
|
2018-04-23 06:47:00 +00:00
|
|
|
sdmmc_host_t config = SDMMC_HOST_DEFAULT();
|
|
|
|
sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
|
2018-06-04 14:00:26 +00:00
|
|
|
slot_config.gpio_cd = CD_WP_TEST_GPIO;
|
2018-04-23 06:47:00 +00:00
|
|
|
TEST_ESP_OK(sdmmc_host_init());
|
|
|
|
TEST_ESP_OK(sdmmc_host_init_slot(SDMMC_HOST_SLOT_1, &slot_config));
|
|
|
|
|
2018-06-04 14:00:26 +00:00
|
|
|
test_cd_input(CD_WP_TEST_GPIO, &config);
|
2018-04-23 06:47:00 +00:00
|
|
|
|
|
|
|
TEST_ESP_OK(sdmmc_host_deinit());
|
2018-06-04 14:00:26 +00:00
|
|
|
sd_test_board_power_off();
|
2018-04-23 06:47:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
TEST_CASE("CD input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]")
|
|
|
|
{
|
2018-06-04 14:00:26 +00:00
|
|
|
sd_test_board_power_on();
|
2018-04-23 06:47:00 +00:00
|
|
|
sdmmc_host_t config = SDSPI_HOST_DEFAULT();
|
|
|
|
sdspi_slot_config_t slot_config = SDSPI_SLOT_CONFIG_DEFAULT();
|
2018-06-04 14:00:26 +00:00
|
|
|
slot_config.gpio_cd = CD_WP_TEST_GPIO;
|
2018-04-23 06:47:00 +00:00
|
|
|
TEST_ESP_OK(sdspi_host_init());
|
|
|
|
TEST_ESP_OK(sdspi_host_init_slot(config.slot, &slot_config));
|
|
|
|
|
2018-06-04 14:00:26 +00:00
|
|
|
test_cd_input(CD_WP_TEST_GPIO, &config);
|
2018-04-23 06:47:00 +00:00
|
|
|
|
|
|
|
TEST_ESP_OK(sdspi_host_deinit());
|
2018-06-04 14:00:26 +00:00
|
|
|
sd_test_board_power_off();
|
2018-04-23 06:47:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void test_wp_input(int gpio_wp_num, const sdmmc_host_t* config)
|
|
|
|
{
|
|
|
|
sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
|
|
|
|
TEST_ASSERT_NOT_NULL(card);
|
|
|
|
|
|
|
|
// SDMMC host should have configured WP as input.
|
|
|
|
// Enable output as well (not using the driver, to avoid touching input
|
|
|
|
// enable bits).
|
|
|
|
gpio_matrix_out(gpio_wp_num, SIG_GPIO_OUT_IDX, false, false);
|
|
|
|
REG_WRITE(GPIO_ENABLE_W1TS_REG, BIT(gpio_wp_num));
|
|
|
|
|
|
|
|
// Check that the card can be initialized with WP low
|
|
|
|
REG_WRITE(GPIO_OUT_W1TC_REG, BIT(gpio_wp_num));
|
|
|
|
TEST_ESP_OK(sdmmc_card_init(config, card));
|
|
|
|
|
|
|
|
uint32_t* data = heap_caps_calloc(1, 512, MALLOC_CAP_DMA);
|
|
|
|
|
|
|
|
// Check that card write succeeds if WP is high
|
|
|
|
REG_WRITE(GPIO_OUT_W1TS_REG, BIT(gpio_wp_num));
|
2018-06-04 14:00:26 +00:00
|
|
|
usleep(1000);
|
2018-04-23 06:47:00 +00:00
|
|
|
TEST_ESP_OK(sdmmc_write_sectors(card, &data, 0, 1));
|
|
|
|
|
|
|
|
// Check that write fails if WP is low
|
|
|
|
REG_WRITE(GPIO_OUT_W1TC_REG, BIT(gpio_wp_num));
|
2018-06-04 14:00:26 +00:00
|
|
|
usleep(1000);
|
2018-04-23 06:47:00 +00:00
|
|
|
TEST_ESP_ERR(ESP_ERR_INVALID_STATE, sdmmc_write_sectors(card, &data, 0, 1));
|
|
|
|
// ...but reads still work
|
|
|
|
TEST_ESP_OK(sdmmc_read_sectors(card, &data, 0, 1));
|
|
|
|
|
|
|
|
free(data);
|
|
|
|
free(card);
|
|
|
|
}
|
|
|
|
|
2018-06-04 14:00:26 +00:00
|
|
|
TEST_CASE("WP input works in SD mode", "[sd][test_env=UT_T1_SDMODE]")
|
2018-04-23 06:47:00 +00:00
|
|
|
{
|
2018-06-04 14:00:26 +00:00
|
|
|
sd_test_board_power_on();
|
2018-04-23 06:47:00 +00:00
|
|
|
sdmmc_host_t config = SDMMC_HOST_DEFAULT();
|
|
|
|
sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
|
2018-06-04 14:00:26 +00:00
|
|
|
slot_config.gpio_wp = CD_WP_TEST_GPIO;
|
2018-04-23 06:47:00 +00:00
|
|
|
TEST_ESP_OK(sdmmc_host_init());
|
|
|
|
TEST_ESP_OK(sdmmc_host_init_slot(SDMMC_HOST_SLOT_1, &slot_config));
|
|
|
|
|
2018-06-04 14:00:26 +00:00
|
|
|
test_wp_input(CD_WP_TEST_GPIO, &config);
|
2018-04-23 06:47:00 +00:00
|
|
|
|
|
|
|
TEST_ESP_OK(sdmmc_host_deinit());
|
2018-06-04 14:00:26 +00:00
|
|
|
sd_test_board_power_off();
|
2018-04-23 06:47:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
TEST_CASE("WP input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]")
|
|
|
|
{
|
2018-06-04 14:00:26 +00:00
|
|
|
sd_test_board_power_on();
|
2018-04-23 06:47:00 +00:00
|
|
|
sdmmc_host_t config = SDSPI_HOST_DEFAULT();
|
|
|
|
sdspi_slot_config_t slot_config = SDSPI_SLOT_CONFIG_DEFAULT();
|
2018-06-04 14:00:26 +00:00
|
|
|
slot_config.gpio_wp = CD_WP_TEST_GPIO;
|
2018-04-23 06:47:00 +00:00
|
|
|
TEST_ESP_OK(sdspi_host_init());
|
|
|
|
TEST_ESP_OK(sdspi_host_init_slot(config.slot, &slot_config));
|
|
|
|
|
2018-06-04 14:00:26 +00:00
|
|
|
test_wp_input(CD_WP_TEST_GPIO, &config);
|
2018-04-23 06:47:00 +00:00
|
|
|
|
|
|
|
TEST_ESP_OK(sdspi_host_deinit());
|
2018-06-04 14:00:26 +00:00
|
|
|
sd_test_board_power_off();
|
2018-04-23 06:47:00 +00:00
|
|
|
}
|