5.4 KiB
5.4 KiB
| 1 | # field_name, | efuse_block, | bit_start, | bit_count, |comment # |
|---|---|
| 2 | # | (EFUSE_BLK0 | (0..255) | (1..-) | # |
| 3 | # | EFUSE_BLK1 | |MAX_BLK_LEN*| # |
| 4 | # | EFUSE_BLK2 | | | # |
| 5 | # | EFUSE_BLK3) | | | # |
| 6 | ########################################################################## |
| 7 | # !!!!!!!!!!! # |
| 8 | # this will generate new source files, next rebuild all the sources. |
| 9 | # !!!!!!!!!!! # |
| 10 | # Factory MAC address # |
| 11 | ####################### |
| 12 | MAC_FACTORY, EFUSE_BLK0, 72, 8, Factory MAC addr [0] |
| 13 | , EFUSE_BLK0, 64, 8, Factory MAC addr [1] |
| 14 | , EFUSE_BLK0, 56, 8, Factory MAC addr [2] |
| 15 | , EFUSE_BLK0, 48, 8, Factory MAC addr [3] |
| 16 | , EFUSE_BLK0, 40, 8, Factory MAC addr [4] |
| 17 | , EFUSE_BLK0, 32, 8, Factory MAC addr [5] |
| 18 | MAC_FACTORY_CRC, EFUSE_BLK0, 80, 8, CRC8 for factory MAC address |
| 19 | # Custom MAC address # |
| 20 | ###################### |
| 21 | MAC_CUSTOM_CRC, EFUSE_BLK3, 0, 8, CRC8 for custom MAC address. |
| 22 | MAC_CUSTOM, EFUSE_BLK3, 8, 48, Custom MAC |
| 23 | MAC_CUSTOM_VER, EFUSE_BLK3, 184, 8, Custom MAC version |
| 24 | # Security boot # |
| 25 | ################# |
| 26 | ABS_DONE_0, EFUSE_BLK0, 196, 1, Secure boot is enabled for bootloader image. EFUSE_RD_ABS_DONE_0 |
| 27 | # Flash encrypt # |
| 28 | ################# |
| 29 | ENCRYPT_CONFIG, EFUSE_BLK0, 188, 4, Flash encrypt. EFUSE_FLASH_CRYPT_CONFIG_M |
| 30 | DISABLE_DL_ENCRYPT, EFUSE_BLK0, 199, 1, Flash encrypt. Disable UART bootloader encryption. EFUSE_DISABLE_DL_ENCRYPT. |
| 31 | DISABLE_DL_DECRYPT, EFUSE_BLK0, 200, 1, Flash encrypt. Disable UART bootloader decryption. EFUSE_DISABLE_DL_DECRYPT. |
| 32 | DISABLE_DL_CACHE, EFUSE_BLK0, 201, 1, Flash encrypt. Disable UART bootloader MMU cache. EFUSE_DISABLE_DL_CACHE. |
| 33 | FLASH_CRYPT_CNT, EFUSE_BLK0, 20, 7, Flash encrypt. Flash encryption is enabled if this field has an odd number of bits set. EFUSE_FLASH_CRYPT_CNT. |
| 34 | # Misc Security # |
| 35 | DISABLE_JTAG, EFUSE_BLK0, 198, 1, Disable JTAG. EFUSE_RD_DISABLE_JTAG. |
| 36 | CONSOLE_DEBUG_DISABLE, EFUSE_BLK0, 194, 1, Disable ROM BASIC interpreter fallback. EFUSE_RD_CONSOLE_DEBUG_DISABLE. |
| 37 | UART_DOWNLOAD_DIS, EFUSE_BLK0, 27, 1, Disable UART download mode. Valid for ESP32 V3 and newer, only. |
| 38 | # Write protection # |
| 39 | #################### |
| 40 | WR_DIS_FLASH_CRYPT_CNT, EFUSE_BLK0, 2, 1, Flash encrypt. Write protection FLASH_CRYPT_CNT, UART_DOWNLOAD_DIS. EFUSE_WR_DIS_FLASH_CRYPT_CNT |
| 41 | WR_DIS_BLK1, EFUSE_BLK0, 7, 1, Flash encrypt. Write protection encryption key. EFUSE_WR_DIS_BLK1 |
| 42 | WR_DIS_BLK2, EFUSE_BLK0, 8, 1, Security boot. Write protection security key. EFUSE_WR_DIS_BLK2 |
| 43 | WR_DIS_BLK3, EFUSE_BLK0, 9, 1, Write protection for EFUSE_BLK3. EFUSE_WR_DIS_BLK3 |
| 44 | # Read protection # |
| 45 | ################### |
| 46 | RD_DIS_BLK1, EFUSE_BLK0, 16, 1, Flash encrypt. efuse_key_read_protected. EFUSE_RD_DIS_BLK1 |
| 47 | RD_DIS_BLK2, EFUSE_BLK0, 17, 1, Security boot. efuse_key_read_protected. EFUSE_RD_DIS_BLK2 |
| 48 | RD_DIS_BLK3, EFUSE_BLK0, 18, 1, Read protection for EFUSE_BLK3. EFUSE_RD_DIS_BLK3 |
| 49 | # Chip info # |
| 50 | ############# |
| 51 | CHIP_VER_DIS_APP_CPU, EFUSE_BLK0, 96, 1, EFUSE_RD_CHIP_VER_DIS_APP_CPU |
| 52 | CHIP_VER_DIS_BT, EFUSE_BLK0, 97, 1, EFUSE_RD_CHIP_VER_DIS_BT |
| 53 | CHIP_VER_PKG, EFUSE_BLK0, 105, 3, EFUSE_RD_CHIP_VER_PKG |
| 54 | CHIP_CPU_FREQ_LOW, EFUSE_BLK0, 108, 1, EFUSE_RD_CHIP_CPU_FREQ_LOW |
| 55 | CHIP_CPU_FREQ_RATED, EFUSE_BLK0, 109, 1, EFUSE_RD_CHIP_CPU_FREQ_RATED |
| 56 | CHIP_VER_REV1, EFUSE_BLK0, 111, 1, EFUSE_RD_CHIP_VER_REV1 |
| 57 | CHIP_VER_REV2, EFUSE_BLK0, 180, 1, EFUSE_RD_CHIP_VER_REV2 |
| 58 | XPD_SDIO_REG, EFUSE_BLK0, 142, 1, EFUSE_RD_XPD_SDIO_REG |
| 59 | SDIO_TIEH, EFUSE_BLK0, 143, 1, EFUSE_RD_SDIO_TIEH |
| 60 | SDIO_FORCE, EFUSE_BLK0, 144, 1, EFUSE_RD_SDIO_FORCE |
| 61 | #SDIO_DREFH, EFUSE_BLK0, 136, 2, EFUSE_RD_SDIO_DREFH |
| 62 | #SDIO_DREFM, EFUSE_BLK0, 138, 2, EFUSE_RD_SDIO_DREFM |
| 63 | #SDIO_DREFL, EFUSE_BLK0, 140, 2, EFUSE_RD_SDIO_DREFL |
| 64 | # esp_adc_cal # |
| 65 | ############### |
| 66 | ADC_VREF_AND_SDIO_DREF, EFUSE_BLK0, 136, 6, EFUSE_RD_ADC_VREF[0..4] or ( SDIO_DREFH[0 1], SDIO_DREFM[2 3], SDIO_DREFL[4 5] ) |
| 67 | ADC1_TP_LOW, EFUSE_BLK3, 96, 7, TP_REG EFUSE_RD_ADC1_TP_LOW |
| 68 | ADC2_TP_LOW, EFUSE_BLK3, 112, 7, TP_REG EFUSE_RD_ADC2_TP_LOW |
| 69 | ADC1_TP_HIGH, EFUSE_BLK3, 103, 9, TP_REG EFUSE_RD_ADC1_TP_HIGH |
| 70 | ADC2_TP_HIGH, EFUSE_BLK3, 119, 9, TP_REG EFUSE_RD_ADC2_TP_HIGH |
| 71 | # anti-rollback # |
| 72 | ################# |
| 73 | SECURE_VERSION, EFUSE_BLK3, 128, 32, Secure version for anti-rollback |