jack 24011ddd05 header files: modify rom code and soc header files ... 1. timer reg file for both time group 0 and time group 1, not only timer group 0 2. fix bug that io mux header file mismatch with chip 3. fix bug that some BASE address not correct 4. add some static function to eagle.fpga32.rom.addr.v7.ld 5. add interrupts usage table 6. add some comments for rom code functions		2016-09-12 17:47:49 +08:00
..
elf_to_ld.sh	Initial public version	2016-08-17 23:08:22 +08:00
esp32.bt.ld	ld: add ld for bt/trace, choose different ld by menuconfig	2016-08-25 11:34:21 +08:00
esp32.bt.trace.ld	ld: add ld for bt/trace, choose different ld by menuconfig	2016-08-25 11:34:21 +08:00
esp32.common.ld	ld: seperate/rename eagle.xxx.ld to esp32.xxx.ld	2016-08-25 11:07:53 +08:00
esp32.ld	ld: fix ld to use ram as much as possible, rearrange heap_alloc area	2016-08-25 11:07:53 +08:00
esp32.rom.ld	header files: modify rom code and soc header files	2016-09-12 17:47:49 +08:00
esp32.trace.ld	ld: add ld for bt/trace, choose different ld by menuconfig	2016-08-25 11:34:21 +08:00