407 lines
13 KiB
C
407 lines
13 KiB
C
// Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef _SOC_EFUSE_STRUCT_H_
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#define _SOC_EFUSE_STRUCT_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef volatile struct {
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union {
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struct {
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uint32_t rd_efuse_wr_dis: 16;
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uint32_t rd_efuse_rd_dis: 4;
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uint32_t rd_flash_crypt_cnt: 8;
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uint32_t reserved28: 4;
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};
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uint32_t val;
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} blk0_rdata0;
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uint32_t blk0_rdata1; /**/
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union {
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struct {
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uint32_t rd_wifi_mac_crc_high:24;
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uint32_t reserved24: 8;
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};
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uint32_t val;
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} blk0_rdata2;
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union {
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struct {
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uint32_t rd_soft_disable_jtag: 1;
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uint32_t rd_chip_ver_dis_bt: 1;
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uint32_t rd_chip_ver_32pad: 1;
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uint32_t rd_chip_ver_dis_cache: 1;
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uint32_t rd_chip_ver_reserve: 13;
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uint32_t reserved17: 15;
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};
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uint32_t val;
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} blk0_rdata3;
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union {
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struct {
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uint32_t rd_ck8m_freq: 8;
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uint32_t rd_sdio_drefh: 2;
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uint32_t rd_sdio_drefm: 2;
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uint32_t rd_sdio_drefl: 2;
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uint32_t rd_xpd_sdio: 1;
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uint32_t rd_sdio_tieh: 1;
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uint32_t rd_sdio_force: 1;
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uint32_t reserved17: 15;
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};
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uint32_t val;
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} blk0_rdata4;
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union {
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struct {
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uint32_t rd_spi_pad_config: 20;
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uint32_t rd_tsens_dos: 4;
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uint32_t rd_reserve_use1: 4;
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uint32_t rd_flash_crypt_config: 4;
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};
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uint32_t val;
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} blk0_rdata5;
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union {
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struct {
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uint32_t rd_coding_scheme: 2;
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uint32_t rd_dig_reserve: 1;
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uint32_t rd_disable_sdio_host: 1;
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uint32_t rd_abs_done_0: 1;
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uint32_t rd_abs_done_1: 1;
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uint32_t rd_hard_disable_jtag: 1;
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uint32_t rd_disable_dl_encrypt: 1;
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uint32_t rd_disable_dl_decrypt: 1;
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uint32_t rd_disable_dl_cache: 1;
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uint32_t rd_key_status: 1;
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uint32_t reserved11: 21;
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};
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uint32_t val;
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} blk0_rdata6;
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union {
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struct {
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uint32_t wr_dis: 16;
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uint32_t rd_dis: 4;
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uint32_t flash_crypt_cnt: 8;
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uint32_t reserved28: 4;
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};
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uint32_t val;
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} blk0_wdata0;
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uint32_t blk0_wdata1; /**/
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union {
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struct {
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uint32_t wifi_mac_crc_high:24;
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uint32_t reserved24: 8;
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};
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uint32_t val;
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} blk0_wdata2;
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union {
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struct {
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uint32_t soft_disable_jtag: 1;
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uint32_t chip_ver_dis_bt: 1;
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uint32_t chip_ver_32pad: 1;
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uint32_t chip_ver_dis_cache: 1;
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uint32_t chip_ver_reserve: 13;
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uint32_t reserved17: 15;
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};
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uint32_t val;
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} blk0_wdata3;
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union {
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struct {
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uint32_t ck8m_freq: 8;
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uint32_t sdio_drefh: 2;
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uint32_t sdio_drefm: 2;
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uint32_t sdio_drefl: 2;
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uint32_t xpd_sdio: 1;
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uint32_t sdio_tieh: 1;
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uint32_t sdio_force: 1;
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uint32_t reserved17:15;
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};
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uint32_t val;
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} blk0_wdata4;
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union {
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struct {
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uint32_t spi_pad_config: 20;
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uint32_t tsens_dos: 4;
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uint32_t reserve_use1: 4;
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uint32_t flash_crypt_config: 4;
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};
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uint32_t val;
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} blk0_wdata5;
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union {
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struct {
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uint32_t coding_scheme: 2;
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uint32_t dig_reserve: 1;
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uint32_t disable_sdio_host: 1;
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uint32_t abs_done_0: 1;
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uint32_t abs_done_1: 1;
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uint32_t hard_disable_jtag: 1;
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uint32_t disable_dl_encrypt: 1;
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uint32_t disable_dl_decrypt: 1;
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uint32_t disable_dl_cache: 1;
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uint32_t key_status: 1;
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uint32_t reserved11: 21;
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};
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uint32_t val;
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} blk0_wdata6;
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uint32_t blk1_rdata0; /**/
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uint32_t blk1_rdata1; /**/
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uint32_t blk1_rdata2; /**/
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uint32_t blk1_rdata3; /**/
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uint32_t blk1_rdata4; /**/
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uint32_t blk1_rdata5; /**/
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uint32_t blk1_rdata6; /**/
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uint32_t blk1_rdata7; /**/
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uint32_t blk2_rdata0; /**/
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uint32_t blk2_rdata1; /**/
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uint32_t blk2_rdata2; /**/
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uint32_t blk2_rdata3; /**/
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uint32_t blk2_rdata4; /**/
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uint32_t blk2_rdata5; /**/
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uint32_t blk2_rdata6; /**/
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uint32_t blk2_rdata7; /**/
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uint32_t blk3_rdata0; /**/
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uint32_t blk3_rdata1; /**/
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uint32_t blk3_rdata2; /**/
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uint32_t blk3_rdata3; /**/
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uint32_t blk3_rdata4; /**/
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uint32_t blk3_rdata5; /**/
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uint32_t blk3_rdata6; /**/
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uint32_t blk3_rdata7; /**/
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uint32_t blk1_wdata0; /**/
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uint32_t blk1_wdata1; /**/
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uint32_t blk1_wdata2; /**/
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uint32_t blk1_wdata3; /**/
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uint32_t blk1_wdata4; /**/
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uint32_t blk1_wdata5; /**/
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uint32_t blk1_wdata6; /**/
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uint32_t blk1_wdata7; /**/
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uint32_t blk2_wdata0; /**/
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uint32_t blk2_wdata1; /**/
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uint32_t blk2_wdata2; /**/
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uint32_t blk2_wdata3; /**/
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uint32_t blk2_wdata4; /**/
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uint32_t blk2_wdata5; /**/
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uint32_t blk2_wdata6; /**/
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uint32_t blk2_wdata7; /**/
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uint32_t blk3_wdata0; /**/
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uint32_t blk3_wdata1; /**/
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uint32_t blk3_wdata2; /**/
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uint32_t blk3_wdata3; /**/
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uint32_t blk3_wdata4; /**/
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uint32_t blk3_wdata5; /**/
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uint32_t blk3_wdata6; /**/
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uint32_t blk3_wdata7; /**/
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union {
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struct {
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uint32_t reserved0: 16;
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uint32_t clk_en: 1;
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uint32_t reserved17:15;
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};
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uint32_t val;
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} clk;
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union {
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struct {
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uint32_t op_code: 16;
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uint32_t force_no_wr_rd_dis: 1;
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uint32_t reserved17: 15;
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};
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uint32_t val;
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} conf;
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uint32_t status; /**/
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union {
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struct {
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uint32_t read_cmd: 1;
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uint32_t pgm_cmd: 1;
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uint32_t reserved2: 30;
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};
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uint32_t val;
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} cmd;
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union {
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struct {
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uint32_t read_done: 1;
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uint32_t pgm_done: 1;
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uint32_t reserved2: 30;
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};
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uint32_t val;
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} int_raw;
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union {
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struct {
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uint32_t read_done: 1;
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uint32_t pgm_done: 1;
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uint32_t reserved2: 30;
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};
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uint32_t val;
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} int_st;
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union {
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struct {
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uint32_t read_done: 1;
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uint32_t pgm_done: 1;
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uint32_t reserved2: 30;
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};
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uint32_t val;
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} int_ena;
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union {
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struct {
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uint32_t read_done: 1;
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uint32_t pgm_done: 1;
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uint32_t reserved2: 30;
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};
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uint32_t val;
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} int_clr;
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union {
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struct {
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uint32_t dac_clk_div: 8;
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uint32_t dac_clk_pad_sel: 1;
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uint32_t reserved9: 23;
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};
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uint32_t val;
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} dac_conf;
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union {
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struct {
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uint32_t dec_warnings:12;
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uint32_t reserved12: 20;
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};
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uint32_t val;
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} dec_status;
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union {
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struct {
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uint32_t thr_a: 8;
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uint32_t trd: 8;
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uint32_t tsur_a: 8;
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uint32_t read_init_num: 8;
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};
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uint32_t val;
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} rd_tim_conf;
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union {
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struct {
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uint32_t thp_a: 8;
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uint32_t tpgm_inactive: 8;
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uint32_t tpgm: 16;
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};
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uint32_t val;
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} wr_tim_conf0;
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union {
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struct {
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uint32_t tsup_a: 8;
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uint32_t pwr_on_num:16;
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uint32_t reserved24: 8;
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};
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uint32_t val;
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} wr_tim_conf1;
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union {
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struct {
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uint32_t rd_dis_err: 4;
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uint32_t chip_ver_reserve_err:13;
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uint32_t ck8m_freq_err: 8;
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uint32_t sdio_drefh_err: 2;
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uint32_t sdio_drefm_err: 2;
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uint32_t sdio_drefl_err: 2;
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uint32_t key_status_err: 1;
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};
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uint32_t val;
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} repeat_err0;
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union {
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struct {
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uint32_t spi_pad_config_err: 20;
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uint32_t flash_crypt_config_err: 4;
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uint32_t tsens_dos_err: 4;
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uint32_t reserve_use1_err: 4;
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};
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uint32_t val;
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} repeat_err1;
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union {
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struct {
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uint32_t abs_done_0_err: 1;
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uint32_t abs_done_1_err: 1;
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uint32_t hard_disable_jtag_err: 1;
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uint32_t disable_dl_encrypt_err: 1;
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uint32_t disable_dl_decrypt_err: 1;
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uint32_t disable_dl_cache_err: 1;
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uint32_t disable_sdio_host_err: 1;
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uint32_t dig_reserve_err: 1;
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uint32_t soft_disable_jtag_err: 1;
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uint32_t chip_ver_dis_bt_err: 1;
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uint32_t chip_ver_32pad_err: 1;
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uint32_t chip_ver_dis_cache_err: 1;
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uint32_t xpd_sdio_err: 1;
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uint32_t sdio_tieh_err: 1;
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uint32_t sdio_force_err: 1;
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uint32_t reserved15: 17;
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};
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uint32_t val;
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} repeat_err2;
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uint32_t repeat_blk1_err0; /**/
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uint32_t repeat_blk1_err1; /**/
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uint32_t repeat_blk1_err2; /**/
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uint32_t repeat_blk1_err3; /**/
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uint32_t repeat_blk2_err0; /**/
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uint32_t repeat_blk2_err1; /**/
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uint32_t repeat_blk2_err2; /**/
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uint32_t repeat_blk2_err3; /**/
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uint32_t repeat_blk3_err0; /**/
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uint32_t repeat_blk3_err1; /**/
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uint32_t repeat_blk3_err2; /**/
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uint32_t repeat_blk3_err3; /**/
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union {
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struct {
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uint32_t rs_errornum_blk1: 4;
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uint32_t rs_fail_blk1: 1;
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uint32_t rs_errornum_blk2: 4;
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uint32_t rs_fail_blk2: 1;
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uint32_t rs_errornum_blk3: 4;
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uint32_t rs_fail_blk3: 1;
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uint32_t reserved15: 17;
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};
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uint32_t val;
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} rs_state;
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uint32_t reserved_16c;
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uint32_t reserved_170;
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uint32_t reserved_174;
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uint32_t reserved_178;
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uint32_t reserved_17c;
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uint32_t reserved_180;
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uint32_t reserved_184;
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uint32_t reserved_188;
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uint32_t reserved_18c;
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uint32_t reserved_190;
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uint32_t reserved_194;
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uint32_t reserved_198;
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uint32_t reserved_19c;
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uint32_t reserved_1a0;
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uint32_t reserved_1a4;
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uint32_t reserved_1a8;
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uint32_t reserved_1ac;
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uint32_t reserved_1b0;
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uint32_t reserved_1b4;
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uint32_t reserved_1b8;
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uint32_t reserved_1bc;
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uint32_t reserved_1c0;
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uint32_t reserved_1c4;
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uint32_t reserved_1c8;
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uint32_t reserved_1cc;
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uint32_t reserved_1d0;
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uint32_t reserved_1d4;
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uint32_t reserved_1d8;
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uint32_t reserved_1dc;
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uint32_t reserved_1e0;
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uint32_t reserved_1e4;
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uint32_t reserved_1e8;
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uint32_t reserved_1ec;
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uint32_t reserved_1f0;
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uint32_t reserved_1f4;
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uint32_t reserved_1f8;
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uint32_t date; /**/
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} efuse_dev_t;
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extern efuse_dev_t EFUSE;
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SOC_EFUSE_STRUCT_H_ */
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