366 lines
18 KiB
Markdown
366 lines
18 KiB
Markdown
# Performance Monitor (`perfmon`) example
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(See the README.md file in the upper level 'examples' directory for more information about examples.)
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## Overview
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This example illustrates usage of `perfmon` APIs to monitor and profile functions.
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The example will calculate performance statistic for simple test function.
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The simple test function could be exchanged to one from the user.
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The example contain test function that will be executed with perfmon component and collect CPU statistic. The test function will be executed 200 times in each test case. The first test case collect statistic from all available performance counters, and second test just from defined in the list.
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## How to use example
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### Hardware Required
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Example should be able to run on any commonly available ESP32 development board.
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### Configure the project
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```
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idf.py menuconfig
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```
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### Build and Flash
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```
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idf.py build flash monitor
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```
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(To exit the serial monitor, type ``Ctrl-]``.)
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See the [Getting Started Guide](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/index.html) for full steps to configure and use ESP-IDF to build projects.
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## Example Output
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1. Example starts and call first test. The first test call test function 'exec_test_function'
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```bash
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I (288) example: Start
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I (288) example: Start test with printing all available statistic
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Value = 750, select = 0, mask = 0001. Counts cycles.
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Amount of cycles
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Value = 0, select = 1, mask = 0001. Overflow of counter.
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Overflow counter
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Value = 0, select = 2, mask = 0001. Successfully Retired Instructions.
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JX instructions
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Value = 0, select = 2, mask = 0002. Successfully Retired Instructions.
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CALLXn instructions
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Value = 3, select = 2, mask = 0004. Successfully Retired Instructions.
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return instructions (RET, RETW, ...)
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Value = 0, select = 2, mask = 0008. Successfully Retired Instructions.
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supervisor return instructions (RFDE, RFE, RFI, RFWO, RFWU)
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Value = 100, select = 2, mask = 0010. Successfully Retired Instructions.
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Conditional branch instructions where execution
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transfers to the target (aka. taken branch),
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or loopgtz/loopnez instr where execution skips
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the loop (aka. not-taken loop)
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Value = 0, select = 2, mask = 0020. Successfully Retired Instructions.
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J instr
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Value = 1, select = 2, mask = 0040. Successfully Retired Instructions.
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CALLn instr
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Value = 0, select = 2, mask = 0080. Successfully Retired Instructions.
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Conditional branch instr where execution
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falls through (aka. not-taken branch)
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Value = 0, select = 2, mask = 0100. Successfully Retired Instructions.
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Loop instr where execution falls into loop (aka. taken loop)
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Value = 0, select = 2, mask = 0400. Successfully Retired Instructions.
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Last inst of loop and execution transfers
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to LBEG (aka. loopback taken)
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Value = 0, select = 2, mask = 0800. Successfully Retired Instructions.
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Last inst of loop and execution falls
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through to LEND (aka. loopback fallthrough)
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Value = 309, select = 2, mask = 8000. Successfully Retired Instructions.
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Non-branch instr (aka. non-CTI)
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Value = 0, select = 3, mask = 0002. Data-related GlobalStall cycles.
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Store buffer full stall
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Value = 0, select = 3, mask = 0004. Data-related GlobalStall cycles.
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Store buffer conflict stall
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Value = 0, select = 3, mask = 0008. Data-related GlobalStall cycles.
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Data Cache-miss stall (unused)
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Value = 0, select = 3, mask = 0010. Data-related GlobalStall cycles.
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Data RAM/ROM/XLMI busy stall
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Value = 0, select = 3, mask = 0020. Data-related GlobalStall cycles.
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Data inbound-PIF request stall (includes s32c1i)
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Value = 0, select = 3, mask = 0040. Data-related GlobalStall cycles.
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MHT lookup stall
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Value = 0, select = 3, mask = 0080. Data-related GlobalStall cycles.
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Uncached load stall (included in MHT lookup stall below)
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Value = 0, select = 3, mask = 0100. Data-related GlobalStall cycles.
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Bank-conflict stall
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Value = 0, select = 4, mask = 0001. Instruction-related and Other Glob
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alStall cycles.
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ICache-miss stall
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Value = 0, select = 4, mask = 0002. Instruction-related and Other Glob
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alStall cycles.
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Instruction RAM/ROM busy stall
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Value = 0, select = 4, mask = 0004. Instruction-related and Other Glob
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alStall cycles.
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Instruction RAM inbound-PIF request stall
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Value = 0, select = 4, mask = 0008. Instruction-related and Other Glob
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alStall cycles.
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TIE port stall
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Value = 0, select = 4, mask = 0010. Instruction-related and Other Glob
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alStall cycles.
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External RunStall signal status
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Value = 0, select = 4, mask = 0020. Instruction-related and Other Glob
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alStall cycles.
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Uncached fetch stall
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Value = 1, select = 4, mask = 0040. Instruction-related and Other Glob
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alStall cycles.
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FastL32R stall
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Value = 0, select = 4, mask = 0080. Instruction-related and Other Glob
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alStall cycles.
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Iterative multiply stall
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Value = 0, select = 4, mask = 0100. Instruction-related and Other Glob
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alStall cycles.
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Iterative divide stall
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Value = 0, select = 5, mask = 0001. Exceptions and Pipeline Replays.
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Other Pipeline Replay (i.e. excludes cache miss etc.)
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Value = 0, select = 5, mask = 0002. Exceptions and Pipeline Replays.
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Level-1 interrupt
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Value = 0, select = 5, mask = 0004. Exceptions and Pipeline Replays.
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Greater-than-level-1 interrupt
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Value = 0, select = 5, mask = 0008. Exceptions and Pipeline Replays.
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Debug exception
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Value = 0, select = 5, mask = 0010. Exceptions and Pipeline Replays.
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NMI
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Value = 0, select = 5, mask = 0020. Exceptions and Pipeline Replays.
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Window exception
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Value = 0, select = 5, mask = 0040. Exceptions and Pipeline Replays.
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Allocate exception
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Value = 0, select = 5, mask = 0080. Exceptions and Pipeline Replays.
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Other exceptions
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Value = 0, select = 5, mask = 0100. Exceptions and Pipeline Replays.
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HW-corrected memory error
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Value = 0, select = 6, mask = 0001. Hold and Other Bubble cycles.
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Processor domain PSO bubble
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Value = 0, select = 6, mask = 0004. Hold and Other Bubble cycles.
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R hold caused by Data Cache miss(unused)
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Value = 0, select = 6, mask = 0008. Hold and Other Bubble cycles.
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R hold caused by Store release
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Value = 0, select = 6, mask = 0010. Hold and Other Bubble cycles.
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R hold caused by register dependency
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Value = 0, select = 6, mask = 0020. Hold and Other Bubble cycles.
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R hold caused by MEMW, EXTW or EXCW
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Value = 0, select = 6, mask = 0040. Hold and Other Bubble cycles.
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R hold caused by Halt instruction (TX only)
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Value = 322, select = 6, mask = 0080. Hold and Other Bubble cycles.
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CTI bubble (e.g. branch delay slot)
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Value = 0, select = 6, mask = 0100. Hold and Other Bubble cycles.
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WAITI bubble i.e. a cycle spent in WaitI power down mode.
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Value = 417, select = 7, mask = 0001. Instruction TLB Accesses (per inst
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ruction retiring).
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ITLB Hit
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Value = 0, select = 7, mask = 0002. Instruction TLB Accesses (per inst
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ruction retiring).
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Replay of instruction due to ITLB miss
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Value = 0, select = 7, mask = 0004. Instruction TLB Accesses (per inst
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ruction retiring).
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HW-assisted TLB Refill completes
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Value = 0, select = 7, mask = 0008. Instruction TLB Accesses (per inst
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ruction retiring).
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ITLB Miss Exception
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Value = 0, select = 8, mask = 0001. Instruction Memory Accesses (per i
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nstruction retiring).
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Instruction Cache Hit
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Value = 0, select = 8, mask = 0002. Instruction Memory Accesses (per i
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nstruction retiring).
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Instruction Cache Miss
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Value = 420, select = 8, mask = 0004. Instruction Memory Accesses (per i
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nstruction retiring).
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All InstRAM or InstROM accesses
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Value = 0, select = 8, mask = 0008. Instruction Memory Accesses (per i
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nstruction retiring).
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Bypass (i.e. uncached) fetch
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Value = 3, select = 9, mask = 0001. Data TLB Accesses.
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DTLB Hit
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Value = 0, select = 9, mask = 0002. Data TLB Accesses.
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Replay of load/store due to DTLB miss
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Value = 0, select = 9, mask = 0004. Data TLB Accesses.
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HW-assisted TLB Refill completes
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Value = 0, select = 9, mask = 0008. Data TLB Accesses.
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DTLB Miss Exception
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Value = 0, select = 10, mask = 0001. Load Instruction (Data Memory).
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Data Cache Hit(unused)
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Value = 0, select = 10, mask = 0002. Load Instruction (Data Memory).
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Data Cache Miss(unused)
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Value = 3, select = 10, mask = 0004. Load Instruction (Data Memory).
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Load from local memory i.e. DataRAM, DataROM, InstRAM, InstROM
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Value = 0, select = 10, mask = 0008. Load Instruction (Data Memory).
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Bypass (i.e. uncached) load
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Value = 0, select = 13, mask = 0001. Load Instruction (Data Memory).
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Data Cache Hit(unused)
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Value = 0, select = 13, mask = 0002. Load Instruction (Data Memory).
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Data Cache Miss(unused)
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Value = 0, select = 13, mask = 0004. Load Instruction (Data Memory).
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Load from local memory i.e. DataRAM, DataROM, InstRAM, InstROM
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Value = 0, select = 13, mask = 0008. Load Instruction (Data Memory).
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Bypass (i.e. uncached) load
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Value = 0, select = 16, mask = 0001. Load Instruction (Data Memory).
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Data Cache Hit (unused)
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Value = 0, select = 16, mask = 0002. Load Instruction (Data Memory).
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Data Cache Miss (unused)
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Value = 0, select = 16, mask = 0004. Load Instruction (Data Memory).
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Load from local memory i.e. DataRAM, DataROM, InstRAM, InstROM
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Value = 0, select = 16, mask = 0008. Load Instruction (Data Memory).
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Bypass (i.e. uncached) load
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Value = 0, select = 11, mask = 0001. Store Instruction (Data Memory).
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Data Cache Hit (unused)
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Value = 0, select = 11, mask = 0002. Store Instruction (Data Memory).
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Data Cache Miss (unused)
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Value = 0, select = 11, mask = 0004. Store Instruction (Data Memory).
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Store to local memory i.e. DataRAM, InstRAM
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Value = 0, select = 11, mask = 0008. Store Instruction (Data Memory).
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PIF Store
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Value = 0, select = 14, mask = 0001. Store Instruction (Data Memory).
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Data Cache Hit(unused)
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Value = 0, select = 14, mask = 0002. Store Instruction (Data Memory).
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Data Cache Miss(unused)
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Value = 0, select = 14, mask = 0004. Store Instruction (Data Memory).
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Store to local memory i.e. DataRAM, InstRAM
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Value = 0, select = 14, mask = 0008. Store Instruction (Data Memory).
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PIF Store
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Value = 0, select = 17, mask = 0001. Store Instruction (Data Memory).
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Data Cache Hit (unused)
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Value = 0, select = 17, mask = 0002. Store Instruction (Data Memory).
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Data Cache Miss (unused)
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Value = 0, select = 17, mask = 0004. Store Instruction (Data Memory).
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Store to local memory i.e. DataRAM, InstRAM
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Value = 0, select = 17, mask = 0008. Store Instruction (Data Memory).
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PIF Store
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Value = 0, select = 12, mask = 0001. Accesses to Data Memory (Load, Sto
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re, S32C1I, ...).
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Cache Miss
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Value = 0, select = 15, mask = 0001. Accesses to Data Memory (Load, Sto
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re, S32C1I, ...).
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Cache Miss
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Value = 0, select = 18, mask = 0001. Accesses to Data Memory (Load, Sto
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re, S32C1I, ...).
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Cache Miss
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Value = 415, select = 22, mask = 0001. Multiple Load/Store.
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0 stores and 0 loads
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Value = 3, select = 22, mask = 0002. Multiple Load/Store.
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0 stores and 1 loads
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Value = 0, select = 22, mask = 0004. Multiple Load/Store.
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1 stores and 0 loads
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Value = 0, select = 22, mask = 0008. Multiple Load/Store.
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1 stores and 1 loads
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Value = 0, select = 22, mask = 0010. Multiple Load/Store.
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0 stores and 2 loads
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Value = 0, select = 22, mask = 0020. Multiple Load/Store.
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2 stores and 0 loads
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Value = 0, select = 23, mask = 0001. Outbound PIF.
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Castout
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Value = 0, select = 23, mask = 0002. Outbound PIF.
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Prefetch
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Value = 0, select = 24, mask = 0001. Inbound PIF.
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Data DMA
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Value = 0, select = 24, mask = 0002. Inbound PIF.
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Instruction DMA
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Value = 0, select = 26, mask = 0001. Prefetch.
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I prefetch-buffer-lookup hit
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Value = 0, select = 26, mask = 0002. Prefetch.
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D prefetch-buffer-lookup hit
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Value = 0, select = 26, mask = 0004. Prefetch.
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I prefetch-buffer-lookup miss
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Value = 0, select = 26, mask = 0008. Prefetch.
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D prefetch-buffer-lookup miss
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Value = 0, select = 26, mask = 0020. Prefetch.
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Direct fill to (L1) Data Cache (unused)
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Value = 0, select = 27, mask = 0001. iDMA.
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active cycles
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Value = 0, select = 28, mask = 0001. Length of Instructions.
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16-bit
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Value = 0, select = 28, mask = 0002. Length of Instructions.
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24-bit
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Value = 0, select = 28, mask = 0004. Length of Instructions.
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32-bit
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Value = 0, select = 28, mask = 0008. Length of Instructions.
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40-bit
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Value = 0, select = 28, mask = 0010. Length of Instructions.
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48-bit
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Value = 0, select = 28, mask = 0020. Length of Instructions.
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56-bit
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Value = 0, select = 28, mask = 0040. Length of Instructions.
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64-bit
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Value = 0, select = 28, mask = 0080. Length of Instructions.
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72-bit
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Value = 0, select = 28, mask = 0100. Length of Instructions.
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80-bit
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Value = 0, select = 28, mask = 0200. Length of Instructions.
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88-bit
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Value = 0, select = 28, mask = 0400. Length of Instructions.
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96-bit
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Value = 0, select = 28, mask = 0800. Length of Instructions.
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104-bit
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Value = 0, select = 28, mask = 1000. Length of Instructions.
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112-bit
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Value = 0, select = 28, mask = 2000. Length of Instructions.
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120-bit
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Value = 0, select = 28, mask = 4000. Length of Instructions.
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128-bit
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```
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2. Example calls second test.
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```
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I (1588) example: Start test with user defined statistic
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Value = 743, select = 0, mask = 0001. Counts cycles.
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Amount of cycles
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Value = 417, select = 2, mask = 8dff. Successfully Retired Instructions.
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JX instructions
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CALLXn instructions
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return instructions (RET, RETW, ...)
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supervisor return instructions (RFDE, RFE, RFI, RFWO, RFWU)
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Conditional branch instructions where execution
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transfers to the target (aka. taken branch),
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or loopgtz/loopnez instr where execution skips
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the loop (aka. not-taken loop)
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J instr
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CALLn instr
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Conditional branch instr where execution
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falls through (aka. not-taken branch)
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Loop instr where execution falls into loop (aka. taken loop)
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Last inst of loop and execution transfers
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to LBEG (aka. loopback taken)
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Last inst of loop and execution falls
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through to LEND (aka. loopback fallthrough)
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Non-branch instr (aka. non-CTI)
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Value = 3, select = 10, mask = 0004. Load Instruction (Data Memory).
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Load from local memory i.e. DataRAM, DataROM, InstRAM, InstROM
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Value = 0, select = 11, mask = 0004. Store Instruction (Data Memory).
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Store to local memory i.e. DataRAM, InstRAM
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Value = 321, select = 6, mask = 01ed. Hold and Other Bubble cycles.
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Processor domain PSO bubble
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R hold caused by Data Cache miss(unused)
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R hold caused by Store release
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R hold caused by MEMW, EXTW or EXCW
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R hold caused by Halt instruction (TX only)
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CTI bubble (e.g. branch delay slot)
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WAITI bubble i.e. a cycle spent in WaitI power down mode.
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Value = 0, select = 6, mask = 0010. Hold and Other Bubble cycles.
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R hold caused by register dependency
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Value = 0, select = 1, mask = 0001. Overflow of counter.
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Overflow counter
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I (1788) example: The End
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```
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