221 lines
7.1 KiB
C
221 lines
7.1 KiB
C
// Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef _SOC_TIMG_STRUCT_H_
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#define _SOC_TIMG_STRUCT_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef volatile struct {
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struct {
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union {
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struct {
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uint32_t reserved0: 9;
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uint32_t use_xtal: 1;
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uint32_t alarm_en: 1;
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uint32_t level_int_en: 1;
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uint32_t edge_int_en: 1;
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uint32_t divider: 16;
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uint32_t autoreload: 1;
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uint32_t increase: 1;
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uint32_t enable: 1;
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};
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uint32_t val;
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} config;
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uint32_t cnt_low; /**/
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uint32_t cnt_high; /**/
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union {
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struct {
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uint32_t reserved0: 31;
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uint32_t update: 1;
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};
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uint32_t val;
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} update;
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uint32_t alarm_low; /**/
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uint32_t alarm_high; /**/
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uint32_t load_low; /**/
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uint32_t load_high; /**/
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uint32_t reload; /**/
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} hw_timer[2];
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union {
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struct {
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uint32_t reserved0: 12;
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uint32_t appcpu_reset_en: 1;
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uint32_t procpu_reset_en: 1;
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uint32_t flashboot_mod_en: 1;
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uint32_t sys_reset_length: 3;
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uint32_t cpu_reset_length: 3;
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uint32_t level_int_en: 1;
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uint32_t edge_int_en: 1;
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uint32_t stg3: 2;
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uint32_t stg2: 2;
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uint32_t stg1: 2;
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uint32_t stg0: 2;
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uint32_t en: 1;
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};
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uint32_t val;
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} wdt_config0;
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union {
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struct {
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uint32_t reserved0: 16;
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uint32_t clk_prescale: 16;
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};
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uint32_t val;
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} wdt_config1;
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uint32_t wdt_config2; /**/
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uint32_t wdt_config3; /**/
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uint32_t wdt_config4; /**/
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uint32_t wdt_config5; /**/
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uint32_t wdt_feed; /**/
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uint32_t wdt_wprotect; /**/
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union {
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struct {
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uint32_t reserved0: 12;
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uint32_t start_cycling: 1;
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uint32_t clk_sel: 2;
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uint32_t rdy: 1;
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uint32_t max: 15;
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uint32_t start: 1;
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};
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uint32_t val;
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} rtc_cali_cfg;
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union {
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struct {
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uint32_t reserved0: 7;
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uint32_t value: 25;
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};
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uint32_t val;
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} rtc_cali_cfg1;
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union {
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struct {
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uint32_t reserved0: 6;
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uint32_t use_reftick: 1;
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uint32_t rtc_only: 1;
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uint32_t cpst_en: 1;
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uint32_t lac_en: 1;
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uint32_t alarm_en: 1;
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uint32_t level_int_en: 1;
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uint32_t edge_int_en: 1;
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uint32_t divider: 16;
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uint32_t autoreload: 1;
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uint32_t increase: 1;
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uint32_t en: 1;
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};
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uint32_t val;
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} lactconfig;
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union {
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struct {
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uint32_t reserved0: 6;
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uint32_t step_len: 26;
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};
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uint32_t val;
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} lactrtc;
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uint32_t lactlo; /**/
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uint32_t lacthi; /**/
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uint32_t lactupdate; /**/
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uint32_t lactalarmlo; /**/
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uint32_t lactalarmhi; /**/
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uint32_t lactloadlo; /**/
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uint32_t lactloadhi; /**/
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uint32_t lactload; /**/
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union {
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struct {
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uint32_t t0: 1;
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uint32_t t1: 1;
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uint32_t wdt: 1;
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uint32_t lact: 1;
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uint32_t reserved4: 28;
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};
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uint32_t val;
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} int_ena;
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union {
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struct {
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uint32_t t0: 1;
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uint32_t t1: 1;
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uint32_t wdt: 1;
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uint32_t lact: 1;
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uint32_t reserved4: 28;
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};
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uint32_t val;
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} int_raw;
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union {
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struct {
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uint32_t t0: 1;
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uint32_t t1: 1;
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uint32_t wdt: 1;
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uint32_t lact: 1;
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uint32_t reserved4: 28;
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};
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uint32_t val;
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} int_st;
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union {
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struct {
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uint32_t t0: 1;
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uint32_t t1: 1;
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uint32_t wdt: 1;
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uint32_t lact: 1;
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uint32_t reserved4: 28;
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};
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uint32_t val;
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} int_clr;
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union {
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struct {
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uint32_t timeout: 1; /*timeout indicator*/
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uint32_t reserved1: 2;
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uint32_t timeout_rst_cnt: 4; /*Cycles that release calibration timeout reset*/
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uint32_t timeout_thres: 25; /*timeout if cali value counts over threshold*/
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};
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uint32_t val;
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} rtc_cali_cfg2;
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uint32_t reserved_ac;
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uint32_t reserved_b0;
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uint32_t reserved_b4;
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uint32_t reserved_b8;
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uint32_t reserved_bc;
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uint32_t reserved_c0;
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uint32_t reserved_c4;
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uint32_t reserved_c8;
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uint32_t reserved_cc;
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uint32_t reserved_d0;
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uint32_t reserved_d4;
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uint32_t reserved_d8;
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uint32_t reserved_dc;
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uint32_t reserved_e0;
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uint32_t reserved_e4;
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uint32_t reserved_e8;
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uint32_t reserved_ec;
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uint32_t reserved_f0;
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uint32_t reserved_f4;
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union {
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struct {
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uint32_t date: 28;
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uint32_t reserved28: 4;
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};
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uint32_t val;
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} timg_date;
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union {
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struct {
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uint32_t reserved0: 31;
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uint32_t en: 1;
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};
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uint32_t val;
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} clk;
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} timg_dev_t;
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extern timg_dev_t TIMERG0;
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extern timg_dev_t TIMERG1;
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SOC_TIMG_STRUCT_H_ */
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