46713a5275
On ESP32, due to fifo reset issue, UART2 will work incorrectly if reset the fifo of UART1(TX fifo and RX fifo). The software can workaround the RX fifo reset issue,
while the TX fifo reset issue can not. When UART2 is used and UART1 is used as the log output port, a software reset can reproduce this issue. So we should reset the UART memory
before the software reset to solve this problem.
|
||
|---|---|---|
| .. | ||
| adc_hal.h | ||
| adc_types.h | ||
| brownout_hal.h | ||
| can_hal.h | ||
| can_types.h | ||
| cpu_hal.h | ||
| cpu_types.h | ||
| dac_hal.h | ||
| dac_types.h | ||
| esp_flash_err.h | ||
| gpio_hal.h | ||
| gpio_types.h | ||
| hal_defs.h | ||
| i2c_hal.h | ||
| i2c_types.h | ||
| i2s_hal.h | ||
| i2s_types.h | ||
| ledc_hal.h | ||
| ledc_types.h | ||
| mcpwm_hal.h | ||
| mcpwm_types.h | ||
| mpu_hal.h | ||
| mpu_types.h | ||
| pcnt_hal.h | ||
| pcnt_types.h | ||
| readme.md | ||
| rmt_hal.h | ||
| rmt_types.h | ||
| rtc_io_hal.h | ||
| rtc_io_types.h | ||
| sdio_slave_hal.h | ||
| sdio_slave_ll.h | ||
| sdio_slave_types.h | ||
| sigmadelta_hal.h | ||
| sigmadelta_types.h | ||
| soc_hal.h | ||
| spi_flash_hal.h | ||
| spi_flash_types.h | ||
| spi_hal.h | ||
| spi_slave_hal.h | ||
| spi_types.h | ||
| systimer_hal.h | ||
| systimer_types.h | ||
| timer_hal.h | ||
| timer_types.h | ||
| touch_sensor_hal.h | ||
| touch_sensor_types.h | ||
| uart_hal.h | ||
| uart_types.h | ||
| usb_hal.h | ||
| wdt_hal.h | ||
| wdt_types.h | ||
HAL Layer Readme
The HAL layer is designed to be used by the drivers. We don't guarantee the stability and back-compatibility among versions. The HAL layer may update very frequently with the driver. Please don't use them in the applications or treat them as stable APIs.
The HAL layer consists of two layers: HAL (upper) and Lowlevel(bottom). The HAL layer defines the steps and data required by the peripheral. The lowlevel is a translation layer converting general conceptions to register configurations.
Lowlevel
This layer should be all static inline. The first argument of LL functions is usually a pointer to the beginning address of the peripheral register. Each chip should have its own LL layer. The functions in this layer should be atomic and independent from each other so that the upper layer can change/perform one of the options/operation without touching the others.
HAL
This layer should depend on the operating system as little as possible. It's a wrapping of LL functions, so that the upper layer can combine basic steps into different working ways (polling, non-polling, interrupt, etc.). Without using queues/locks/delay/loop/etc., this layer can be easily port to other os or simulation systems.
To get better performance and better porting ability, contexts are used to hold sustainable data and pass the parameters.
To develop your own driver, it is suggested to copy the HAL layer to your own code and keep them until manual update.