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OVMS3-idf/components/esp32/include/xtensa
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Ivan Grokhotkov 964f5a91f7 bootloader, esp32: add workaround for Tensilica erratum 572 
If zero-overhead loop buffer is enabled, under certain rare conditions
when executing a zero-overhead loop, the CPU may attempt to execute an invalid instruction. Work around by disabling the buffer.
2018-11-19 04:39:35 +00:00
..
config bootloader, esp32: add workaround for Tensilica erratum 572 2018-11-19 04:39:35 +00:00
cacheasm.h remove executable permission from source files 2018-05-29 20:07:45 +08:00
cacheattrasm.h remove executable permission from source files 2018-05-29 20:07:45 +08:00
core-macros.h xtensa: make XTHAL_GET_INTERRUPT, XTHAL_GET_CCOUNT volatile 2018-07-02 11:31:19 +08:00
coreasm.h remove executable permission from source files 2018-05-29 20:07:45 +08:00
corebits.h remove executable permission from source files 2018-05-29 20:07:45 +08:00
hal.h remove executable permission from source files 2018-05-29 20:07:45 +08:00
specreg.h remove executable permission from source files 2018-05-29 20:07:45 +08:00
traxreg.h remove executable permission from source files 2018-05-29 20:07:45 +08:00
xdm-regs.h remove executable permission from source files 2018-05-29 20:07:45 +08:00
xt_perf_consts.h remove executable permission from source files 2018-05-29 20:07:45 +08:00
xtensa-libdb-macros.h remove executable permission from source files 2018-05-29 20:07:45 +08:00
xtensa-versions.h remove executable permission from source files 2018-05-29 20:07:45 +08:00
xtensa-xer.h remove executable permission from source files 2018-05-29 20:07:45 +08:00
xtruntime-core-state.h remove executable permission from source files 2018-05-29 20:07:45 +08:00
xtruntime-frames.h remove executable permission from source files 2018-05-29 20:07:45 +08:00
xtruntime.h remove executable permission from source files 2018-05-29 20:07:45 +08:00