Xia Xiaotian
2a7d2a7795
soc: clear PHY status when cpu start
2020-02-13 14:28:33 +08:00
Angus Gratton
3e1a93e5a7
soc: rtc_vddsdio_get_config() In default configuration, VDD_SDIO LDO is always enabled
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When using bootstrapping pin to enable VDD_SDIO, the internal LDO is always enabled at either 1.8V
or 3.3V.
2018-05-25 15:14:13 +10:00
Angus Gratton
d775cc4c4c
soc: Fix description of rtc_config_t.tieh, add macros
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Usage of TIEH was correct but description had 1.8V & 3.3V backwards.
Add macro definitions for TIEH values to improve readability.
2018-05-25 14:58:37 +10:00
Ivan Grokhotkov
ac623a9756
soc/rtc: restore dbg attenuation when waking from sleep
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This fixes inability to enter deep sleep after waking up from light sleep
2018-04-26 18:52:46 +08:00
Darian Leung
73cdfbfe79
esp_adc_cal/Add eFuse functionality
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This commit updates the esp_adc_cal ocmponent to support new calibration methods
which utilize calibratoin values stored in eFuse. This commit includes LUT mode
2018-02-13 21:22:48 +08:00
Ivan Grokhotkov
fb9c106bcb
soc/rtc: add function to get/set VDDSDIO configuration
...
Also consider case of VDDSDIO force powered on in rtc_sleep.
2017-11-03 15:49:09 +08:00
Ivan Grokhotkov
6b2e16e51b
soc: fix typo in register name
2017-07-06 12:36:06 +08:00
Tian Hao
26a3cb93c7
component/soc : move dport access header files to soc
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1. move dport access header files to soc
2. reduce dport register write protection. Only protect read operation
2017-05-09 18:06:00 +08:00
Tian Hao
f7e8856520
component/esp32 : fix dualcore bug
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1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
2017-05-08 21:53:43 +08:00
Ivan Grokhotkov
7ee8ee8b7e
soc: add source code of rtc_clk, rtc_pm
2017-04-11 15:45:54 +08:00
