Commit graph

310 commits

Author SHA1 Message Date
Xia Xiaotian 0a2bec85f3 soc: clear PHY status when cpu start 2020-02-13 14:36:11 +08:00
Ivan Grokhotkov 0c2c821f8f Merge branch 'bugfix/esp_ptr_executable_single_core_v4.0' into 'release/v4.0'
soc: Fix esp_ptr_executable() for single core ESP32 config & cache memory (v4.0)

See merge request espressif/esp-idf!7464
2020-02-10 16:30:34 +08:00
Angus Gratton d897e522af soc: Fix esp_ptr_executable() for single core ESP32 config & cache memory
In single core mode, APP CPU cache region is added to the available range.
2020-01-29 10:03:30 +11:00
morris 7b128595ac ethernet: optimise tx and rx 2020-01-21 20:51:03 +08:00
Darian Leung 03d5742e11 can: Add support for lower bit rates
This commit adds support for lower bit rates in the CAN Driver for
ESP32 Rev 2 or later chips.
2019-12-16 07:45:38 +00:00
Anton Maklakov f8e1ee35e2 soc: fix unit tests not included in the build
Regression from 9eccd7c082
2019-12-11 15:57:49 +11:00
morris 97defec6cd ethernet:a bunch of bugfix from master 2019-12-03 17:37:35 +08:00
suda-morris 42a462d584 ethernet: add gpio number into config structure 2019-12-03 15:53:39 +08:00
Michael (XIAO Xufeng) 41e64bd79c esp_flash: rename internal variables for better readability
chip_drv in HAL are renamed as host
2019-11-21 12:26:14 +08:00
Michael (XIAO Xufeng) 2b7681ec4f esp_flash: fix set qe bit and write command issues
There used to be dummy phase before out phase in common command
transactions. This corrupts the data.

The code before never actually operate (clear) the QE bit, once it finds
the QE bit is set. It's hard to check whether the QE set/disable
functions work well.

This commit:

1. Cancel the dummy phase

2. Set and clear the QE bit according to chip settings, allowing tests
   for QE bits. However for some chips (Winbond for example), it's not
   forced to clear the QE bit if not able to.

3. Also refactor to allow chip_generic and other chips to share the same
   code to read and write qe bit; let common command and read command share
   configure_host_io_mode.

4. Rename read mode to io mode since maybe we will write data with quad
   mode one day.
2019-11-21 12:26:14 +08:00
KonstantinKondrashov fae116bb2e soc/esp32: Add test_env for 32kHz XTAL unit tests 2019-11-14 12:26:43 +08:00
Ivan Grokhotkov e5ff431b35 Merge branch 'fix/esp_flash_coredump_4.0' into 'release/v4.0'
esp_flash: fix coredump issues (backport v4.0)

See merge request espressif/esp-idf!6136
2019-09-26 21:26:53 +08:00
xiehang 4e7b559101 Delete extra '/' 2019-09-19 19:22:44 +08:00
Jack 9ab92331c4 dport: remove clock_en and reset bitname which is not suitable 2019-09-19 18:49:37 +10:00
Angus Gratton 08416d05ba soc: Remove deprecated LEDC struct register names (bit_num, div_num)
Deprecated since ESP-IDF V3.0
2019-09-19 18:49:37 +10:00
Angus Gratton 200c82561a soc: remove deprecated io_mux PIN_PULLxxx_yyy macros
Deprecated before ESP-IDF V1.0!
2019-09-19 18:49:37 +10:00
Angus Gratton a9fe3165c4 soc/pm: Remove deprecated use of rtc_cpu_freq_t enum
Removes deprecated ways of setting/getting CPU freq, light sleep freqs.

Deprecated since ESP-IDF V3.2
2019-09-19 18:48:13 +10:00
Michael (XIAO Xufeng) d3b54ec84a esp_flash: fix the coredump issue
During coredump, dangerous-area-checking should be disabled, and cache
disabling should be replaced by a safer version.

Dangerous-area-checking used to be in the HAL, but it seems to be more
fit to os functions. So it's moved to os functions. Interfaces are
provided to switch between os functions during coredump.
2019-09-18 14:30:23 +08:00
Jiang Jiang Jian 31be6be147 Merge branch 'fix/esp_flash_set_get_wp_4.0' into 'release/v4.0'
esp_flash: fix the set/get write protection functions (backport v4.0)

See merge request espressif/esp-idf!5832
2019-09-08 16:34:40 +08:00
Roland Dobai 1402e78844 Fix error code collision and CI check 2019-09-03 08:07:16 +02:00
Michael (XIAO Xufeng) a626b26cf9 esp_flash: improve the comments a bit 2019-08-20 14:05:35 +08:00
suda-morris 1b903111b6 efuse: update the scheme of getting chip revision 2019-08-13 14:37:17 +08:00
Michael (XIAO Xufeng) fa555e3109 esp_flash: fix a compatibility issue working with the ROM
The esp_flash API has a side effects: it modifies the clock control
registers, and this makes the clock inconsistent with the ROM variable
`g_rom_spiflash_dummy_len_plus`.

This commit helps the ROM to get the correct dummy cycles required by
the latest clock settings. Every device on the SPI1 bus will update the
ROM variable when it modifies the clock registers.
2019-07-29 03:00:09 +00:00
suda-morris 018de8101f ethernet: can build without enable esp32 emac
Closes https://github.com/espressif/esp-idf/issues/3770
2019-07-22 21:07:02 +08:00
Tomer Shefler 97ad2bcb86 ethernet: support giving 50mhz rmii clock with both 40mhz and 26 mhz rtc xtal
Merges https://github.com/espressif/esp-idf/pull/3769
Closes https://github.com/espressif/esp-idf/pull/3704
2019-07-22 21:07:02 +08:00
suda-morris af78311975 ethernet: malloc hal together with driver context 2019-07-22 21:07:02 +08:00
suda-morris cb42c29252 ethernet: support dm9051
1. move resource allocation from xxx_init to xxx_new
2. fix enabling tx checksum insertion by mistake
3. iperf example: enlarge max arguments
4. add examples for spi-ethernet

Closes https://github.com/espressif/esp-idf/issues/3715
Closes https://github.com/espressif/esp-idf/issues/3711
2019-07-04 19:38:13 +08:00
boarchuz b0168310db Typo correction
Merges https://github.com/espressif/esp-idf/pull/3604
2019-07-02 17:49:49 +08:00
Ivan Grokhotkov d7d91225d3 Merge branch 'feature/refactor_etherent_driver' into 'master'
add esp_eth component

Closes IDF-324, IDF-637, and IDFGH-1139

See merge request idf/esp-idf!5111
2019-06-28 03:44:44 +08:00
Michael (XIAO Xufeng) d6bd24ca67 esp_flash: add initialization interface for SPI devices 2019-06-27 13:27:27 +08:00
suda-morris 90c4827bd2 add esp_eth component 2019-06-26 10:19:23 +08:00
Renz Christian Bagaporo 9b350f9ecc cmake: some formatting fixes
Do not include bootloader in flash target when secure boot is enabled.
Emit signing warning on all cases where signed apps are enabled (secure
boot and signed images)
Follow convention of capital letters for SECURE_BOOT_SIGNING_KEY
variable, since it is
relevant to other components, not just bootloader.
Pass signing key and verification key via config, not requiring
bootloader to know parent app dir.
Misc. variables name corrections
2019-06-21 19:53:29 +08:00
Renz Christian Bagaporo 9eccd7c082 components: use new component registration api 2019-06-21 19:53:29 +08:00
Angus Gratton bd9590502c Merge branch 'bugfix/spi_flash_remove_include_chain_in_host_drv' into 'master'
esp_flash: support C++ and improve the document

See merge request idf/esp-idf!5287
2019-06-21 13:12:09 +08:00
Angus Gratton 126b687c75 Merge branch 'refactor/vfs_uart_multichip_support' into 'master'
vfs_uart & uart: add multichip support

See merge request idf/esp-idf!5298
2019-06-20 18:31:24 +08:00
chenjianqiang cf2ba210ef uart: multichip support 2019-06-20 11:32:22 +08:00
Ivan Grokhotkov 026533cd72 esp_flash: fix C++ compilation and some typos 2019-06-20 10:55:13 +08:00
Michael (XIAO Xufeng) caf121e4b6 esp_flash: break the inappropriate include chain in spi_flash_host_drv.h 2019-06-20 10:55:12 +08:00
Michael (XIAO Xufeng) 5c9dc44c49 spi: multichip support
move hardcoded numbers, etc. into soc files.
create headers for shared types which needs to be documented.

(MINOR CHANGE)
2019-06-20 10:38:52 +08:00
Darian Leung 037c079e9a esp32: Refactor backtrace and add esp_backtrace_print()
This commit refactors backtracing within the panic handler so that a common
function esp_backtrace_get_next_frame() is used iteratively to traverse a
callstack.

A esp_backtrace_print() function has also be added that allows the printing
of a backtrace at runtime. The esp_backtrace_print() function allows unity to
print the backtrace of failed test cases and jump back to the main test menu
without the need reset the chip. esp_backtrace_print() can also be used as a
debugging function by users.

- esp_stack_ptr_is_sane() moved to soc_memory_layout.h
- removed uncessary includes of "esp_debug_helpers.h"
2019-06-19 18:30:18 +08:00
Michael (XIAO Xufeng) 1036a091fe spi_flash: support working on differnt buses and frequency 2019-06-18 06:32:52 +00:00
Gautier Seidel 542e544faa esp32: Allow fixed static RAM size and DRAM heap size
Merges https://github.com/espressif/esp-idf/pull/3222
2019-06-06 18:23:04 +10:00
Angus Gratton 045aaf6fb0 Merge branch 'feature/add_xxx_periph_h' into 'master'
soc: Add xxx_periph.h for all modules

Closes IDF-192

See merge request idf/esp-idf!4952
2019-06-04 13:24:14 +08:00
Wu Jian Gang 4d3762a8df clk: Fix the overflow when setting ccount
The multiplication will be overflow when using 160 or 240 MHz, this can lead the inaccuracy of log time stamp in startup.
2019-06-03 11:04:47 +00:00
Konstantin Kondrashov 399d2d2605 all: Using xxx_periph.h
Using xxx_periph.h in whole IDF instead of xxx_reg.h, xxx_struct.h, xxx_channel.h ... .

Cleaned up header files from unnecessary headers (releated to soc/... headers).
2019-06-03 14:15:08 +08:00
Konstantin Kondrashov 3ddab0b8f3 soc: Add xxx_periph.h for all modules
The "xxx_periph" header file includes all SOC-level definitions for that peripheral.

Closes: IDF-192
2019-06-03 13:56:54 +08:00
Jeroen Domburg 0e7442bb7a Merge branch 'feature/spi_slave_support_hal' into 'master'
spi_slave: add HAL support

See merge request idf/esp-idf!4830
2019-05-22 13:42:11 +08:00
Roland Dobai a1bddb923b Rename Kconfig options (components/bt) 2019-05-21 09:09:01 +02:00
Roland Dobai 0ae53691ba Rename Kconfig options (components/esp32) 2019-05-21 09:09:01 +02:00
Michael (XIAO Xufeng) 33db6d608e spi_slave: add HAL support 2019-05-20 07:34:34 +00:00