uart: multichip support

This commit is contained in:
chenjianqiang 2019-06-14 11:01:30 +08:00 committed by Michael (XIAO Xufeng)
parent b2ae2601fd
commit cf2ba210ef
10 changed files with 101 additions and 28 deletions

View file

@ -1,9 +1,9 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
@ -12,15 +12,14 @@
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _DRIVER_UART_H_
#define _DRIVER_UART_H_
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include "soc/uart_periph.h"
#include "soc/uart_caps.h"
#include "esp_err.h"
#include "esp_intr_alloc.h"
#include "driver/periph_ctrl.h"
@ -82,7 +81,9 @@ typedef enum {
typedef enum {
UART_NUM_0 = 0x0, /*!< UART base address 0x3ff40000*/
UART_NUM_1 = 0x1, /*!< UART base address 0x3ff50000*/
#if SOC_UART_NUM > 2
UART_NUM_2 = 0x2, /*!< UART base address 0x3ff6e000*/
#endif
UART_NUM_MAX,
} uart_port_t;
@ -257,7 +258,7 @@ esp_err_t uart_get_baudrate(uart_port_t uart_num, uint32_t* baudrate);
*
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
* @param inverse_mask Choose the wires that need to be inverted.
* Inverse_mask should be chosen from
* Inverse_mask should be chosen from
* UART_INVERSE_RXD / UART_INVERSE_TXD / UART_INVERSE_RTS / UART_INVERSE_CTS,
* combined with OR operation.
*
@ -401,7 +402,7 @@ esp_err_t uart_enable_tx_intr(uart_port_t uart_num, int enable, int thresh);
* @param fn Interrupt handler function.
* @param arg parameter for handler function
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
* be returned here.
*
@ -429,7 +430,7 @@ esp_err_t uart_isr_free(uart_port_t uart_num);
* @note Internal signal can be output to multiple GPIO pads.
* Only one GPIO pad can connect with input signal.
*
* @note Instead of GPIO number a macro 'UART_PIN_NO_CHANGE' may be provided
* @note Instead of GPIO number a macro 'UART_PIN_NO_CHANGE' may be provided
to keep the currently allocated pin.
*
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
@ -556,7 +557,7 @@ esp_err_t uart_wait_tx_done(uart_port_t uart_num, TickType_t ticks_to_wait);
/**
* @brief Send data to the UART port from a given buffer and length.
*
*
* This function will not wait for enough space in TX FIFO. It will just fill the available TX FIFO and return when the FIFO is full.
* @note This function should only be used when UART TX buffer is not enabled.
*
@ -748,10 +749,10 @@ int uart_pattern_get_pos(uart_port_t uart_num);
esp_err_t uart_pattern_queue_reset(uart_port_t uart_num, int queue_length);
/**
* @brief UART set communication mode
* @brief UART set communication mode
* @note This function must be executed after uart_driver_install(), when the driver object is initialized.
* @param uart_num Uart number to configure
* @param mode UART UART mode to set
* @param mode UART UART mode to set
*
* @return
* - ESP_OK Success
@ -763,8 +764,8 @@ esp_err_t uart_set_mode(uart_port_t uart_num, uart_mode_t mode);
* @brief UART set threshold timeout for TOUT feature
*
* @param uart_num Uart number to configure
* @param tout_thresh This parameter defines timeout threshold in uart symbol periods. The maximum value of threshold is 126.
* tout_thresh = 1, defines TOUT interrupt timeout equal to transmission time of one symbol (~11 bit) on current baudrate.
* @param tout_thresh This parameter defines timeout threshold in uart symbol periods. The maximum value of threshold is 126.
* tout_thresh = 1, defines TOUT interrupt timeout equal to transmission time of one symbol (~11 bit) on current baudrate.
* If the time is expired the UART_RXFIFO_TOUT_INT interrupt is triggered. If tout_thresh == 0,
* the TOUT feature is disabled.
*
@ -785,7 +786,7 @@ esp_err_t uart_set_rx_timeout(uart_port_t uart_num, const uint8_t tout_thresh);
* @param collision_flag Pointer to variable of type bool to return collision flag.
*
* @return
* - ESP_OK Success
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
*/
esp_err_t uart_get_collision_flag(uart_port_t uart_num, bool* collision_flag);
@ -844,4 +845,3 @@ esp_err_t uart_get_wakeup_threshold(uart_port_t uart_num, int* out_wakeup_thresh
}
#endif
#endif /*_DRIVER_UART_H_*/

View file

@ -29,6 +29,8 @@
#include "driver/gpio.h"
#include "driver/uart_select.h"
#define UART_NUM SOC_UART_NUM
#define XOFF (char)0x13
#define XON (char)0x11
@ -113,8 +115,20 @@ typedef struct {
static uart_obj_t *p_uart_obj[UART_NUM_MAX] = {0};
/* DRAM_ATTR is required to avoid UART array placed in flash, due to accessed from ISR */
static DRAM_ATTR uart_dev_t* const UART[UART_NUM_MAX] = {&UART0, &UART1, &UART2};
static portMUX_TYPE uart_spinlock[UART_NUM_MAX] = {portMUX_INITIALIZER_UNLOCKED, portMUX_INITIALIZER_UNLOCKED, portMUX_INITIALIZER_UNLOCKED};
static DRAM_ATTR uart_dev_t* const UART[UART_NUM_MAX] = {
&UART0,
&UART1,
#if UART_NUM > 2
&UART2
#endif
};
static portMUX_TYPE uart_spinlock[UART_NUM_MAX] = {
portMUX_INITIALIZER_UNLOCKED,
portMUX_INITIALIZER_UNLOCKED,
#if UART_NUM > 2
portMUX_INITIALIZER_UNLOCKED
#endif
};
static portMUX_TYPE uart_selectlock = portMUX_INITIALIZER_UNLOCKED;
esp_err_t uart_set_word_length(uart_port_t uart_num, uart_word_length_t data_bit)
@ -528,9 +542,11 @@ esp_err_t uart_isr_register(uart_port_t uart_num, void (*fn)(void*), void * arg,
case UART_NUM_1:
ret=esp_intr_alloc(ETS_UART1_INTR_SOURCE, intr_alloc_flags, fn, arg, handle);
break;
#if UART_NUM > 2
case UART_NUM_2:
ret=esp_intr_alloc(ETS_UART2_INTR_SOURCE, intr_alloc_flags, fn, arg, handle);
break;
#endif
case UART_NUM_0:
default:
ret=esp_intr_alloc(ETS_UART0_INTR_SOURCE, intr_alloc_flags, fn, arg, handle);
@ -577,12 +593,14 @@ esp_err_t uart_set_pin(uart_port_t uart_num, int tx_io_num, int rx_io_num, int r
rts_sig = U1RTS_OUT_IDX;
cts_sig = U1CTS_IN_IDX;
break;
#if UART_NUM > 2
case UART_NUM_2:
tx_sig = U2TXD_OUT_IDX;
rx_sig = U2RXD_IN_IDX;
rts_sig = U2RTS_OUT_IDX;
cts_sig = U2CTS_IN_IDX;
break;
#endif
case UART_NUM_MAX:
default:
tx_sig = U0TXD_OUT_IDX;
@ -656,8 +674,10 @@ esp_err_t uart_param_config(uart_port_t uart_num, const uart_config_t *uart_conf
periph_module_enable(PERIPH_UART0_MODULE);
} else if(uart_num == UART_NUM_1) {
periph_module_enable(PERIPH_UART1_MODULE);
#if UART_NUM > 2
} else if(uart_num == UART_NUM_2) {
periph_module_enable(PERIPH_UART2_MODULE);
#endif
}
r = uart_set_hw_flow_ctrl(uart_num, uart_config->flow_ctrl, uart_config->rx_flow_ctrl_thresh);
if (r != ESP_OK) return r;
@ -1460,8 +1480,10 @@ esp_err_t uart_driver_delete(uart_port_t uart_num)
periph_module_disable(PERIPH_UART0_MODULE);
} else if(uart_num == UART_NUM_1) {
periph_module_disable(PERIPH_UART1_MODULE);
#if UART_NUM > 2
} else if(uart_num == UART_NUM_2) {
periph_module_disable(PERIPH_UART2_MODULE);
#endif
}
}
return ESP_OK;

View file

@ -24,7 +24,7 @@
// Default port defines
#define MB_DEVICE_ADDRESS (1) // Default slave device address in Modbus
#define MB_DEVICE_SPEED (115200) // Default Modbus speed for now hard defined
#define MB_UART_PORT (UART_NUM_2) // Default UART port number
#define MB_UART_PORT (UART_NUM_MAX - 1) // Default UART port number
#define MB_PAR_INFO_TOUT (10) // Timeout for get parameter info
#define MB_PARITY_NONE (UART_PARITY_DISABLE)

View file

@ -78,7 +78,7 @@ static TaskHandle_t xMbTaskHandle;
static const CHAR *TAG = "MB_SERIAL";
// The UART hardware port number
static UCHAR ucUartNumber = UART_NUM_2;
static UCHAR ucUartNumber = UART_NUM_MAX - 1;
static BOOL bRxStateEnabled = FALSE; // Receiver enabled flag
static BOOL bTxStateEnabled = FALSE; // Transmitter enabled flag

View file

@ -73,7 +73,7 @@ static QueueHandle_t xMbUartQueue;
static TaskHandle_t xMbTaskHandle;
// The UART hardware port number
static UCHAR ucUartNumber = UART_NUM_2;
static UCHAR ucUartNumber = UART_NUM_MAX - 1;
static BOOL bRxStateEnabled = FALSE; // Receiver enabled flag
static BOOL bTxStateEnabled = FALSE; // Transmitter enabled flag

View file

@ -83,7 +83,7 @@ static esp_err_t mbc_serial_master_setup(void* comm_info)
MB_MASTER_CHECK(((comm_info_ptr->mode == MB_MODE_RTU) || (comm_info_ptr->mode == MB_MODE_ASCII)),
ESP_ERR_INVALID_ARG, "mb incorrect mode = (0x%x).",
(uint32_t)comm_info_ptr->mode);
MB_MASTER_CHECK((comm_info_ptr->port <= UART_NUM_2), ESP_ERR_INVALID_ARG,
MB_MASTER_CHECK((comm_info_ptr->port < UART_NUM_MAX), ESP_ERR_INVALID_ARG,
"mb wrong port to set = (0x%x).", (uint32_t)comm_info_ptr->port);
MB_MASTER_CHECK((comm_info_ptr->parity <= UART_PARITY_EVEN), ESP_ERR_INVALID_ARG,
"mb wrong parity option = (0x%x).", (uint32_t)comm_info_ptr->parity);

View file

@ -69,7 +69,7 @@ static esp_err_t mbc_serial_slave_setup(void* comm_info)
MB_SLAVE_CHECK((comm_settings->slave_addr <= MB_ADDRESS_MAX),
ESP_ERR_INVALID_ARG, "mb wrong slave address = (0x%x).",
(uint32_t)comm_settings->slave_addr);
MB_SLAVE_CHECK((comm_settings->port <= UART_NUM_2), ESP_ERR_INVALID_ARG,
MB_SLAVE_CHECK((comm_settings->port < UART_NUM_MAX), ESP_ERR_INVALID_ARG,
"mb wrong port to set = (0x%x).", (uint32_t)comm_settings->port);
MB_SLAVE_CHECK((comm_settings->parity <= UART_PARITY_EVEN), ESP_ERR_INVALID_ARG,
"mb wrong parity option = (0x%x).", (uint32_t)comm_settings->parity);

View file

@ -0,0 +1,26 @@
// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#define SOC_UART_NUM 3
#ifdef __cplusplus
}
#endif

View file

@ -13,6 +13,8 @@
// limitations under the License.
#pragma once
#include "soc/uart_caps.h"
#include "soc/uart_reg.h"
#include "soc/uart_struct.h"
#include "soc/uart_channel.h"

View file

@ -28,7 +28,7 @@
#include "esp32/rom/uart.h"
// TODO: make the number of UARTs chip dependent
#define UART_NUM 3
#define UART_NUM SOC_UART_NUM
// Token signifying that no character is available
#define NONE -1
@ -47,12 +47,27 @@ static void uart_tx_char_via_driver(int fd, int c);
static int uart_rx_char_via_driver(int fd);
// Pointers to UART peripherals
static uart_dev_t* s_uarts[UART_NUM] = {&UART0, &UART1, &UART2};
static uart_dev_t* s_uarts[UART_NUM] = {
&UART0,
&UART1,
#if UART_NUM > 2
&UART2
#endif
};
// One-character buffer used for newline conversion code, per UART
static int s_peek_char[UART_NUM] = {
NONE,
NONE,
#if UART_NUM > 2
NONE
#endif
};
// per-UART locks, lazily initialized
static _lock_t s_uart_read_locks[UART_NUM];
static _lock_t s_uart_write_locks[UART_NUM];
// One-character buffer used for newline conversion code, per UART
static int s_peek_char[UART_NUM] = { NONE, NONE, NONE };
// Per-UART non-blocking flag. Note: default implementation does not honor this
// flag, all reads are non-blocking. This option becomes effective if UART
// driver is used.
@ -94,12 +109,20 @@ static void uart_end_select();
// Functions used to write bytes to UART. Default to "basic" functions.
static tx_func_t s_uart_tx_func[UART_NUM] = {
&uart_tx_char, &uart_tx_char, &uart_tx_char
&uart_tx_char,
&uart_tx_char,
#if UART_NUM > 2
&uart_tx_char
#endif
};
// Functions used to read bytes from UART. Default to "basic" functions.
static rx_func_t s_uart_rx_func[UART_NUM] = {
&uart_rx_char, &uart_rx_char, &uart_rx_char
&uart_rx_char,
&uart_rx_char,
#if UART_NUM > 2
&uart_rx_char
#endif
};