12 commits

Author	SHA1	Message	Date
Angus Gratton	d0801fdbab	Merge branch 'feature/sha_tls_integration' into 'master' ... SHA acceleration integrated to mbedTLS incl. TLS sessions Uses hardware SHA acceleration where available, fails over to software where not available. Ref TW7112 See merge request !232	2016-11-25 10:12:29 +08:00
Ivan Grokhotkov	cf6fc7c741	Add API for random number generator	2016-11-22 21:14:37 +08:00
Angus Gratton	c48612e516	mbedTLS SHA acceleration: Allow concurrent digest calculation, works with TLS ... SHA hardware allows each of SHA1, SHA256, SHA384&SHA512 to calculate digests concurrently. Currently incompatible with AES acceleration due to a hardware reset problem. Ref TW7111.	2016-11-22 20:42:38 +11:00
Dong Heng	cf8c9770a0	Merge branch 'master' into feature/bignum_rsa	2016-11-15 16:39:29 +08:00
Ivan Grokhotkov	c534dedf2d	newlib: implement time syscalls	2016-11-02 17:31:35 +08:00
Angus Gratton	9632c8e56c	RSA Accelerator: Add mod_exp, refactor to avoid memory allocation & copying ... Not fully working at the moment, mod_exp has a bug.	2016-10-12 16:19:09 +11:00
snake	993287af61	add btdm_controller 1st	2016-09-22 16:40:31 +08:00
Wangjialin	41d397cf3f	Only modify headers in soc/ . ... Pass compiling under esp-idf-tests/merge_soc_tmp/merge_for_soc_headers branch.(only change some names of register and INUM).	2016-09-14 13:47:28 +08:00
Jack	d0442602c7	add comments to register read/write operations	2016-09-12 17:47:50 +08:00
jack	24011ddd05	header files: modify rom code and soc header files ... 1. timer reg file for both time group 0 and time group 1, not only timer group 0 2. fix bug that io mux header file mismatch with chip 3. fix bug that some BASE address not correct 4. add some static function to eagle.fpga32.rom.addr.v7.ld 5. add interrupts usage table 6. add some comments for rom code functions	2016-09-12 17:47:49 +08:00
liuzhifu	2ca1b738d3	modify APB_CLK_FREQ from 40M to 80M	2016-08-26 19:03:51 +08:00
Ivan Grokhotkov	bd6ea4393c	Initial public version	2016-08-17 23:08:22 +08:00