INTERRUPT and CCOUNT registers will change outside of program control.
Making the inline assembly used to read these registers volatile
indicates this fact to the compiler.
Fixes https://github.com/espressif/esp-idf/issues/2127
1. fix BLE connection missing in coex mode
2. modify other parameters to make coex priority more reasonable
3. fix modem sleep procedure trap cause Wifi disable RF when BT is
working. Such cause that BR/EDR is difficult to be connected, BLE
connection stability decrease and so on.
4. modify BR/EDR coexist duration to imrove BR/EDR connect success
ratio.
5. Due to the hardware coexist bug, BLE scan interval/window should
be less than 0x100(about 160ms). Therefore, it will cause BLE cannot
scan any advertising packet while WiFi have higher priority
behaviour(such like RX beacon, scan, TX/RX VO packets and etc.).
1. add APIs to set/get announce interval values.
2. add API to enable/disable the min rate to 6Mbps for data packages.
3. add APIs to set/get RSSI threshold values.
4. fix ap_loss.
Allows you to move the partition table, it gives more space for the bootloader.
Added a new utility - parttool.py. This utility can search for the offset and/or size of the partitions by name and type/subtype. Use for getting APP_OFFSET and PHY_DATA_OFFSET.
The linker(esp32.bootloader.ld) made changes that allow you to write a custom bootloader code more.
TW14125
1. Fix the WiFi/BT coexist bug
2. Fix WPA2 enterprise example crash bug
3. Add size and version check for crypto type struct
4. Add MD5 check for crypto type header file
1. add mesh_assoc_t to esp_mesh_internal.h file.
2. rename "node" to "device" in esp_mesh.h.
3. add MESH_EVENT_SCAN_DONE event.
4. add APIs esp_mesh_scan_get_ap_record() and esp_mesh_scan_get_ap_ie_len() to get scan results.
5. modify API esp_mesh_set_self_organized() by adding parameter "select_parent".
6. modify API esp_mesh_set_parent() by adding parameter "parent_mesh_id"
7. add manual networking example.
1. Store the calibration data to NVS if PHY does full calibration because of calibration data checksum failure
2. Pass the station's mac to PHY for checksum calculation
A new method of workaround an error with DPORT is to ensure that the APB is read and followed by the DPORT register without interruptions and pauses. This fix places this implementation in the IRAM to exclude errors associated with the cache miss.
Added .rtc_noinit and .noinit section definitions into linker file /esp32/ld/esp32.common.ld.
The macro __NOINIT_ATTR, RTC_NOINIT_ATTR declared in esp32/esp_attr.h file.
Added unit test file to test added behavior for noinit variables and its attributes.
Added documentation changes for new added attributes.
Make some corrections after code review:
The linker file has been corrected to place noinit section before bss_start to make it safer.
Documentation file has been modified to clarify reset behavior of allocated data .
Corrected typos in test_noinit.c and removed assertion of noinit variable to avoid possible issues with ROM boot loader memory allocation.
The linker file has been corrected to place noinit section before bss_start to make it safer.
Documentation file has been modified to clarify reset behavior of allocated data .
Corrected typos in test_noinit.c and removed assertion of noinit variable to avoid possible issues with ROM boot loader memory allocation.
Update test_noinit.c file to address RTCWDT_RTC_RESET reset reason instead of POWERON_RESET.
Test optimized to pass automated unit testing.
esp32: Add .noinit and .rtc_noinit sections to the linker script
Update of general-notes.rst documentation to fomat examples as code and attributes as identifiers.
Test test_noinit.c corrected to pass automated testing (support ofTEST_CASE_MULTIPLE_STAGES())
https://ezredmine.espressif.cn:8765/issues/15878
When two CPUs read the area of the DPORT and the area of the APB, the result is corrupted for the CPU that read the APB area.
And another CPU has valid data.
The method of eliminating this error.
Before reading the registers of the DPORT, make a preliminary reading of the APB register.
In this case, the joint access of the two CPUs to the registers of the APB and the DPORT is successful.
