Commit graph

5 commits

Author SHA1 Message Date
Wangjialin
2fbc62f986 feature(psram): add 80Mhz mode for psram. Since we have flash rom code patch now, we can fix the compatibility issue between SPI APIs and psram.
1. add qio enable option in bootloader for GD25LQ32C flash.
2. add option for psram mode: 40m+40m, 80m+40m, 80m+80m.
3. fix bugs in spi_flash_rom_patch
2017-06-24 13:28:51 +08:00
Angus Gratton
85e76a7cfc spiflash ROM functions: Remove Quad I/O mode enable/disable code from flash ROM functions
Confusion here is that original ROM has two functions:

* SPIReadModeCnfig() - sets mode, calls enable_qio_mode/disable_qio_mode
* SPIMasterReadModeCnfig() - As above, but doesn't set QIO mode in status register

However we never want to use the ROM method to set/clear QIO mode flag, as not all flash chips work this way. Instead we
do it in flash_qio_mode.c in bootloader.

So in both cases (ROM or "patched ROM") we now call SPIMasterReadModeCnfig(), which is now named
esp_rom_spiflash_config_readmode().
2017-04-13 17:54:42 +10:00
Alexey Gerenkov
0860f46220 spi_flash: Fixed bug in SPI flash ROM driver to work with embedded flash chip
1) fixed SPI_read_status: added check for flash busy flag in matrix mode
2) fixed SPI_page_program: enable write before writing data to SPI FIFO
3) SPI flash ROM funcs replacement is controlled via menuconfig option
2017-04-11 10:51:19 +08:00
Ivan Grokhotkov
81b18aa8d5 bootloader: move some functions out of IRAM when building in bootloader mode
Fixes https://github.com/espressif/esp-idf/issues/80
2016-11-08 20:17:08 +08:00
Angus Gratton
8e8caca2e2 Replace ROM SPIUnlock function with a version that can't lock flash
Avoid bug where a bad status read is copied back to flash and can set
lock bits.
2016-10-21 16:12:51 +11:00