1. timer reg file for both time group 0 and time group 1, not only timer group 0
2. fix bug that io mux header file mismatch with chip
3. fix bug that some BASE address not correct
4. add some static function to eagle.fpga32.rom.addr.v7.ld
5. add interrupts usage table
6. add some comments for rom code functions
Fixes problems with Eclipse trying to build in directories it shouldn't.
This is a breaking change for existing repositories, they need to rename
any component Makefiles to component.mk and rename their references to
$(IDF_PATH)/make/component.mk to $(IDF_PATH)/make/component_common.mk
update ld and heap region
Divide origin fpga ld to several lds, choose specific ld for normal/BT/Trace by menuconfig, change iram/dram len in ld to full use hardware ram region.
See merge request !28
This is a workaround for a hardware bug with cache initialization.
Only two lines of code related to DPORT_APP_CACHE_MMU_IA_CLR were added around mmu_init(1); call,
and two lines at the end of comment block.
I reformatted surrounding lines to use spaces for indentation, like the rest of the code in this file does.
