1. start an esp_timer on entering sleep to acquire pm_lock before wake up from modem sleep
2. decrease the clock division of XTAL fed to bluetooth low power clock from 32us to 2us period to allow to work under 240MHz Max CPU frequency
3. decrease the minimum sleep duration threshold to allow shorter bluetooth modem sleep period, especially for BLE with short connection interval
4. reconfigure bluetooth baseband(BT-BB) settings after PHY/RF init upon waking up from modem sleep to avoid packet RX/TX performance degradation
On enabling flash encryption, OTA fails with magic byte error in the second chunk
if the http data is split into two or more chunks and first chunk is less than 16.
When std::bind is used, it requires inclusion of <functional> header.
This was not mandatory with earlier versions of g++ (4.x), may be because they
had experimental support for c++11.
A workaround to reset BBPLL configuration after light sleep. Fixes the
issue that Wi-Fi can not receive packets after waking up from light
sleep.
Ref. https://github.com/espressif/esp-idf/issues/2711
When ethernet enable again after disable it before, phy init will report timeout.
The cause of this problem is that the enabling of emac clock is too late, and should be placed before phy init.
1. Fix interrupt watchdog timeout in bluetooth "btdm_bb_isr"
2. Fix BLE assert(512) or assert(1536) in rwble.c at line 222
3. Update librtc.a to fix BLE assert(512) in rwble.c at line 222
The #1 and #2 occurs random.
The #3 bug occurs in certain scenario:
1. If Wifi start softap and BLE is working
2. If wifi start station, but do not use normal station operation, such
as just use espnow, while BLE is working
3. Any other scenario, that wifi works without use software coexist
operation, while BLE is working(such as do advertising and ...)
4. update libcoexist.a version to v1.1.2
Added a new structure esp_app_desc_t. It has info about firmware:
version, secure_version, project_name, time/date build and IDF version.
Added the ability to add a custom structure with a description of the firmware.
The esp_app_desc_t is located in fixed place in start of ROM secotor. It is located after structures esp_image_header_t and esp_image_segment_header_t.
app_version is filed from PROJECT_VER variable (if set in custom make file) or PROJECT_PATH/version.txt or git repo (git describe).
Add API to get app_desc from partition.
closes https://github.com/espressif/esp-idf/issues/2494
closes https://github.com/espressif/esp-idf/pull/2493
closes https://github.com/espressif/esp-idf/pull/2496
1. Change bus reset to handle interrupted READ sequences.
2. Slow down I2C to 100khz during reset
3. If a SLAVE device was in a read operation when the bus was interrupted, the SLAVE device is controlling SDA.The only bit during the 9 clock cycles of a byte READ the MASTER(ESP32) is guaranteed control over, is during the ACK bit period.
If the SLAVE is sending a stream of ZERO bytes, it will only release SDA during the ACK bit period. The master(ESP32) cannot generate a STOP unless SDA is HIGH. So, this reset code synchronizes the bit stream with, Either, the ACK bit, Or a 1 bit.
I am stealing this delay coding from @jeremyherbert #2493 pr.
2. Change Bus Reset to handle interrupted READ sequences.
The current code does not handle interrupted READ cycles.
If a SLAVE device was in a read operation when the bus was interrupted, the SLAVE device is controlling SDA.
The only bit during the 9 clock cycles of a byte READ the MASTER(ESP32) is guaranteed control over, is during the ACK bit period.
If the SLAVE is sending a stream of ZERO bytes, it will only release SDA during the ACK bit period. The master(ESP32) cannot generate a STOP unless SDA is HIGH.
So, this reset code synchronizes the bit stream with, Either, the ACK bit, Or a 1 bit.
3. fix typo
correct `sda_id` to `sda_io` in `i2c_master_clear_bus()` @ryan-ma found it. This typo was generated when I manually edited this patch on GitHub, I should have done a Copy/Paste operation!
1. add network channel switch function.
- users can obtain the new channel through the event MESH_EVENT_CHANNEL_SWITCH.
- the entire network will be moved to the same channel as the router without user intervention.
- if no router is in the network, users can call esp_mesh_switch_channel() on the root side to
move the entire network to their desired channel.
2. support not configuring the network channel.
3. support not configuring the router BSSID even if the router is hidden.
4. add allow_channel_switch to mesh configuration.
- if the channel is not specified, this value will be ignored.
- if the channel is specified and this value is set, when "fail" (mesh_attempts_t) times of parent selection
or look for networks are reached, device will change to perform a full channel scan for networks that could join.
- if the channel is specified and this value is set to 0, when a root is not elected, channel switch is not allowed.
but when a root appears, the root performs a full channel scan during the process of connecting to the router,
so even allow_channel_switch is set to 0, the root may still switch channel and eventually the entire network
changes channel.
5. add allow_router_switch to mesh router configuration.
- if the BSSID of router is not specified, this value will be ignored.
- if the BSSID of router is specified and this value is set, when the router of this specified BSSID fails to be found
after "fail" (mesh_attempts_t) times, the entire network is allowed to switch to another router with the same SSID.
6. modify the root to perform a full channel scan when esp_wifi_connect().
7. support handling beacon without DS Paramter Set.
The DMA cannot receive data correctly when the buffer address is not
WORD aligned. Currently we only check whether the buffer is in the DRAM
region.
The DMA always write in WORDs, so the length arguments should also be
multiples of 32 bits.
A check is added to see whether the buffer is WORD aligned and has valid
length.
The driver decide whether use MOSI/MISO phases according to the buffer
address together with the SPI_TRANS_USE_*DATA. However someone may assue
that these phases will be skipped when the ``length``/``rxlength`` is
set to 0. In fact it is a feature that ``rxlength`` is allowed to be
set to 0 when tx and rx have the same length, and the driver fill the
``rxlength`` to ``length``.
An error check is added when the rxlength is 0 but there is data to be
sent.
