components/openssl: refactor openssl debugging and assert function
1. add openssl option at menuconfig
2. remove SSL_ERR to reduce complexity
3. add more functions about debugging and assert
According these, our coders and customers may use and debug the OpenSSL code easily.
See merge request !400
Use PART_FLAG_ENCRYPTED value in gen_esp32part.py
Currently paritions marked as encrypted by gen_esp32part.py are not
recognized as such and encrypted writes don't work.
This is part of espressif/esp-idf#253
Merges Pull Request #293https://github.com/espressif/esp-idf/pull/293
See merge request !470
Add missing variable initialisation to make SPI work for multiple CS
Ref https://github.com/espressif/esp-idf/pull/277
From PR: "I am not especially familiar with this platform or with esp-idf -- so review with care.
The spi-master driver would not work for me when the number of devices on a bus exceeded 1 (caused device hang). I believe this is because cur_cs is not properly set (anywhere), and yet is used. This is likely just not noticed because 0 is presumably the correct value when there's only 1 device (and I'm guessing multi-device setup is not tested as thoroughly).
Simply setting cur_cs to the correct slot value resolves the problem and multiple devices on a single bus behave correctly in my test environment."
Looks like a small oversight on my side.
See merge request !468
1. fix ampdu<->mpdu<->ampdu switch may cause rx slow issue by put mpdu into ampdu reorder queue
2. fix each ac first sending always fail issue by adding retry
Seems doing certain kinds of short reads while flash encryption is
enabled will return stale data. This fixes it, but is probably a
little heavy-handed performance wise.
Verify 0xE9 magic byte on first write, verify entire image before
switching.
Enable verification for secure boot signature (was using invalid ifdef
guard)
Currently paritions marked as encrypted by gen_esp32part.py are not
recognized as such and encrypted writes don't work.
This is part of espressif/esp-idf#253
lwip: optimize the dhcp client
1. modify the discover retry backoff time from (2,4,8,16,32,60,60)s to (500m,1,2,4,8,15,15)s.
2. add DHCP_DOES_ARP_CHECK to menuconfig for users to specify if do a ARP check on the offered address.
If enable, one more second will be taken.
See merge request !459
1. modify the discover retry backoff time from (2,4,8,16,32,60,60)s to (500m,1,2,4,8,15,15)s.
2. add DHCP_DOES_ARP_CHECK to menuconfig for users to specify if do a ARP check on the offered address.
If enable, one more second will be taken in obtaining IP address.
3. update wifi libs
Without this, it's possible for stale information to be read from
cache via mmap, even if the MMU table entry had been invalidated
prior to writing flash (if the same MMU table entry was re-used after
writing flash.)
docs: use custom roles to generate GitHub links
This change replaces direct links to GitHub master branch with
auto-generated links using docutils custom roles.
These auto-generated links point to the tree or blob for the git commit
ID (or tag) of the repository. This is needed to ensure that links don’t
become broken when files in master branch are moved around or deleted.
The following roles are introduced:
```
- :idf:`path` - points to directory inside ESP-IDF
- :idf_blob:`path` - points to file inside ESP-IDF
- :idf_raw:`path` - points to raw view of the file inside ESP-IDF
- :component:`path` - points to directory inside ESP-IDF components dir
- :component_blob:`path` - points to file inside ESP-IDF components dir
- :component_raw:`path` - points to raw view of the file inside ESP-IDF
components dir
- :example:`path` - points to directory inside ESP-IDF examples dir
- :example_blob:`path` - points to file inside ESP-IDF examples dir
- :example_raw:`path` - points to raw view of the file inside ESP-IDF
examples dir
```
A check is added to the CI build script, which searches RST files for
presence of hard-coded links (identified by tree/master, blob/master,
or raw/master part of the URL).
This check can be run manually: cd docs && make gh-linkcheck
Additionally, Sphinx linkcheck build type is used to create new CI test,
which check for broken links. This test has to be triggered explicitly,
because including it in normal build process (when the commit is not yet
deployed to Github) will not work. It can be triggered in a regular
fashion using a combination of cron and Curl, similar to stress tests.
See merge request !455
This change replaces direct links to GitHub master branch with
auto-generated links using docutils custom roles.
These auto-generated links point to the tree or blob for the git commit
ID (or tag) of the repository. This is needed to ensure that links don’t
become broken when files in master branch are moved around or deleted.
The following roles are introduced:
- :idf:`path` - points to directory inside ESP-IDF
- :idf_blob:`path` - points to file inside ESP-IDF
- :idf_raw:`path` - points to raw view of the file inside ESP-IDF
- :component:`path` - points to directory inside ESP-IDF components dir
- :component_blob:`path` - points to file inside ESP-IDF components dir
- :component_raw:`path` - points to raw view of the file inside ESP-IDF
components dir
- :example:`path` - points to directory inside ESP-IDF examples dir
- :example_blob:`path` - points to file inside ESP-IDF examples dir
- :example_raw:`path` - points to raw view of the file inside ESP-IDF
examples dir
A check is added to the CI build script, which searches RST files for
presence of hard-coded links (identified by tree/master, blob/master,
or raw/master part of the URL).
This check can be run manually: cd docs && make gh-linkcheck
Additionally, Sphinx linkcheck build type is used to create new CI test,
which check for broken links. This test has to be triggered explicitly,
because including it in normal build process (when the commit is not yet
deployed to Github) will not work. It can be triggered in a regular
fashion using a combination of cron and Curl, similar to stress tests.
Update esptool.py to v2.0-beta1
* Minor bug fixes, no major functionality changes from the esp-idf perspective.
* Now tracks master branch of esptool repo (finally!)
* Supports Python 3, although our other esp-idf Python tools don't yet support Python 3.
See merge request !396
If the DNS request is dispatched and performed very quickly,
then it can complete before tcpip_callback() actually returns,
in which case we'll destroy the actual err_t error value passed
in the message. Use a local variable for the tcpip_callback
error code so that can't happen.
Resolves#269https://github.com/espressif/esp-idf/pull/269
Move PHY options out of WiFi config, improve descriptions
- move PHY-related settings into new menu, make it dependent on WIFI_ENABLED || BT_ENABLED
- improve descriptions of Ethernet Kconfig options
See merge request !443
ESP32_PHY_MAX_TX_POWER option is only meaningful for WiFi, so previous
change made it depend on WIFI_ENABLED. However if WiFi is not enabled,
but BT is, this option becomes undefined which breaks phy_init_data
generation.
This change turns ESP32_PHY_MAX_TX_POWER into a hidden parameter, which
depends on PHY_ENABLED. New user-visible parameter,
ESP32_PHY_MAX_WIFI_TX_POWER is introduced which depends on WIFI_ENABLED
and is used as default value for ESP32_PHY_MAX_TX_POWER if WIFI_ENABLED
is set. Otherwise ESP32_PHY_MAX_WIFI_TX_POWER is set to 20.
newlib: fix register used for DPORT/RTC bug workaround
While there was no register at DR_REG_FRC_TIMER_BASE + 0x60, due to
peripheral address space wraparound this write actually affected one of
FRC2 registers, which is used by WiFi stack to implement legacy
ets_timer APIs.
This change uses FRC_TIMER_LOAD_REG(0) instead, which can be set to
known value safely.
See merge request !449
fixes for issues observed when using spi_flash
This MR fixes three unrelated issues:
- Race condition in spi_flash_enable_interrupts_caches_and_other_cpu
when operations on unpinned tasks are performed.
The issue is reported in https://github.com/espressif/esp-idf/pull/258
- esp_intr_noniram_disable doesn’t disable interrupts when compiled in
release mode. This issue manifested itself with an illegal instruction
exception when task WDT ISR was called at the time when flash was
disabled.
Fixes https://github.com/espressif/esp-idf/issues/263.
- Tick hooks on CPU1 were not called if CPU0 scheduler was disabled for
significant amount of time (which could happen when doing flash erase).
The issue manifested itself as “INT WDT timeout on core 1” error.
Fixes https://github.com/espressif/esp-idf/issues/219.
See merge request !441
While there was no register at DR_REG_FRC_TIMER_BASE + 0x60, due to
peripheral address space wraparound this write actually affected one of
FRC2 registers, which is used by WiFi stack to implement legacy
ets_timer APIs.
This change uses FRC_TIMER_LOAD_REG(0) instead, which can be set to
known value safely.
The block which dispatches ticks on CPU1 was a copy of the code block
for the normal path (CPU0). It used to check uxPendedTicks, with the
logic that uxPendedTicks can be 0 iff the scheduler is not suspended.
On CPU1 however, uxPendedTicks is not related to the state of the
scheduler (as uxPendedTicks is updated on CPU0). Due to this, if CPU0
scheduler was suspended, and uxPendedTicks happened to be nonzero,
tick hooks on CPU1 didn’t run, even though CPU1 scheduler was working.
This change removes the check for uxPendedTicks in CPU1 code path,
so that the tick hooks on CPU1 always get called (as for the CPU0 code
path).
Allow writes to encrypted partitions
There is a size alignment requirement but it is checked by
spi_flash_write_encrypted. However, this check flat-out bans encrypted
writes.
Original PR on Github: https://github.com/espressif/esp-idf/pull/249
See merge request !432
When compiling in release mode, compiler was choosing same register for
oldint and intmask variables, so INTENABLE was never modified.
This effectively broke disabling of non-IRAM interrupts during flash
operations, observed in the existing tests if task watchdog is enabled.
This change adds an extra constraint tells the compiler that output
operand should not be placed into the same register as an input one.
Add python script that parses list of unit test cases for CI from component test folder
Modify .gitlab-ci.yml to run this script as part of build unit tests stage
spi_flash_enable_interrupts_caches_and_other_cpu function used to enable
non-IRAM interrupts after giving up flash operation lock, which would
cause problems if another task was waiting on the lock to start a flash
operation. In fact, non-IRAM interrupts should be re-enabled before the
task scheduler is resumed. Otherwise non-pinned task can be moved to the
other CPU due to preemption, causing esp_intr_noniram_enable to be
called on the other CPU, causing an abort to be triggered.
Fixes the issue reported in
https://github.com/espressif/esp-idf/pull/258
Delete option to select core timer 2 as a FreeRTOS tick source
Core timer 2 is unusable for FreeRTOS ticks because it triggers a high-level interrupt. This MR deletes the option to select it.
Ref https://github.com/espressif/esp-idf/issues/234
See merge request !418
In some cases (when RTC register reads are performed from the APP CPU), a write to FRC_TIMER_INT_REG may be lost on the bus.
Writing to another DPORT register immediately before or after that works around the issue.
We write one dummy value to an address which doesn’t have any register associated with it.
Fixes https://github.com/espressif/arduino-esp32/issues/120
1. add openssl option at menuconfig
2. remove SSL_ERR to reduce complexity
3. add more functions about debugging and assert
According these, our coders and customers may use and debug the OpenSSL code easily.
One common pattern of using assert function looks as follows:
int ret = do_foo();
assert(ret == 0); // which reads as: “do_foo should never fail here, by design”
The problem with such code is that if ‘assert’ is removed by the preprocessor in release build,
variable ret is no longer used, and the compiler issues a warning about this.
Changing assert definition in the way done here make the variable used, from language syntax perspective.
Semantically, the variable is still unused at run time (as sizeof can be evaluated at compile time), so the compiler
can optimize things away if possible.
These functions are marked as inline and are called from functions which are in IRAM.
In release (-Os) builds, the compiler may decide not to inline these functions.
Placing these functions into IRAM explicitly works around this.
update wifi lib: fix some wifi lib bugs
1. net80211: fix get ap info error(a4614877)
2. tw9358: sta mac same with softap(ea38d32c)
3. tw9221: scan channel error when connected(183d469c)
See merge request !425
bootloader_random_disable: Restore all SARADC/I2S registers to defaults
Fix for issue with I2S0 not being usable after bootloader_random_enable()
See merge request !415
fixes for github issues
This MR includes commits from several Github PRs, as well some fixes for issues reported on Github and on the forum.
- compile PHY-related code only when WiFi is enabled
- fix macOS setup instructions
- fix some of the Sphinx warnings
- update docs index, improve structure of the readme-
- wifi: fix typos, rename ESP_ERR_WIFI_NOT_START to ESP_ERR_WIFI_NOT_STARTED
- sdmmc: fix explanation of flash voltage regulator configuration efuses
- sdmmc: change idx num of example
- fix i2c_get_period name
- fix esp_log_level_set function name in docs
See merge request !420
If using WIFI_INIT_CONFIG_DEFAULT, error message will point out lack
of WiFi. Otherwise linker errors on WiFi symbols should help give a
clue as to what is broken.
Piggy-backs on changes in !420, ref github #230#237
Fix panic register dump format
Fix misplaced a printf somewhere causing an enter to be printed after every register in the panic regdump instead of every 4th register.
Fixes https://github.com/espressif/esp-idf/issues/236
See merge request !419
esp32 core dump to flash
1. menuconfig option to select where to store core dump: flash, uart or disable
2. Saving of core dump to flash
3. Partition table definitions files with core dump partition
4. Python scripts to support core dump generation from GDB command line
See merge request !341
The following issues mentioned during MR!341 review were fixed:
1) Core dump test application description
2) Usage of CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH and CONFIG_ESP32_ENABLE_COREDUMP_TO_UART
3) FLASH_GUARD_START macro usage is fixed in flash API
4) Core dump module logging facility
5) cache util functions doc updated
6) interactive delay before print core dump to uart
7) core dump partion support in build system
component bt:Added the create attribute table method to the new API
GATT Server service table APIs.
Have already modify the style and other things as @jeroen suggestion in other MR(the MR have been closed)
See merge request !399
Deep sleep stub may call ets_update_cpu_frequency, which has been moved from ROM to IRAM.
Restore the ROM version in the linker script, call it ets_update_cpu_frequency_rom, use it in the deep sleep stub.
fix mbedtls unit tests, fix IDF_VER when building a project outside ESP-IDF tree
- mbedTLS test needs about 5% more time to run (in debug mode) when building with 5.2.0, compared to 4.8.5. Increase the timeout to let the test pass.
- when doing `git describe` in IDF_VER definition, `-C $(IDF_PATH)` is needed to get the version of ESP-IDF, and not the project being built (which may not even be in git)
See merge request !411
1) PS is fixed up to allow GDB backtrace to work properly
2) MR!341 discussion: in core dump module: esp_panicPutXXX was replaced by ets_printf.
3) MR!341 discussion: core dump flash magic number was changed.
4) MR!341 discussion: SPI flash access API was redesigned to allow flexible critical section management.
5) test app for core dump feature was added
6) fixed base64 file reading issues on Windows platform
7) now raw bin core file is deleted upon core loader failure by epscoredump.py
Complimentary changes:
1) Partition table definitions files with core dump partition
2) Special sub-type for core dump partition
3) Special version of spi_flash_xxx
4) espcoredump.py is script to get core dump from flash and print useful info
5) FreeRTOS API was extended to get tasks snapshots
Clean up WiFi & Bluetooth config options
* Splits "WiFi" configuration out from ESP32 configuration submenu to its own menu.
* Renames "BT" to "Bluetooth", enabling Bluetooth is now in this option not the ESP32 submenu.
* Also disables compiling/linking of BT stack if Bluetooth is disabled, saves some build time.
See merge request !397
update toolchain version, rebuild newlib
- This MR updates the toolchain version used in the ESP-IDF
- Compiler version check and warning is added to project.mk
- Newlib is rebuilt to include wcsftime function
- libstdc++ build uses correct newlib headers (so we won't get undefined reference to `__impure_ptr` anymore)
See merge request !387
esp32: fixs about auto-reconnect and ap ssid configuration
1. Remove auto-reconnect
2. Use strnlen instead strlen to calculate ssid len in wifi lib
See merge request !407
component/bt: check for registration status of callback function before using it
Add checking of NULL function pointers when calling bluetooth callbacks, especially before the callback functions are registered
See merge request !406
add wpa2 set id api and modify null data tx description
1. wpa2: add wpa2 set id api
2. low rate: modify null data tx description
See merge request !402
ethernet: support flow control
(1) Only fullduplex mode support flow ctrl .
(2) Fix reboot exception which caused by not-reset EMAC hardware (such as DMA) when reset CPU.
See merge request !392
component/bt: bug fix of lack of checking bluetooth stack status inside API functions
Add an API function for checking bluetooth stack status: whether it is uninitialized, initialized or enabled.
The function is intended to be used by users to check the bluetooth stack status, also, it is used inside bluetooth API functions to ensure the stack is in valid state.
See merge request !405
Place cross-core interrupt into IRAM, sanity check handler address passed into esp_intr_alloc
Cross-core interrupt handler was not marked with IRAM_ATTR.
The reason why this caused an exception is probably due to some tasks running at highest priority (these are not blocked by spi_flash_disable_caches_interrupts_and_other_cpu mechanism).
This change puts the interrupt handler into IRAM and adds a sanity check into `esp_intr_alloc`.
Reported on Github: https://github.com/espressif/esp-idf/issues/211
See merge request !404
build system: add IDF_VER environment variable and preprocessor define
This adds an `IDF_VER` preprocessor define which is obtained from `git describe`.
Looks like `v1.0-275-g0efaa4f` for non-release version or `v2.0` for a tagged (release) version.
See merge request !403
Add option to automatically set a watchpoint at the end of the swapped-in task
This should make stack overflows easier to debug because it triggers a debug exception as soon as the stack is overwritten, not later when a context switch happens. Marked as a FreeRTOS debug feature because it doesn't give a nice error message and uses up a watchpoint.
See merge request !389
Fix tcpip_adapter_set_hostname issue
The default hostname for each interface is "espressif", users can call this API to change each interface's hostname.
See merge request !284
examples/10_openssl_server: fixup SSL server with method of specific version
1. add method of any version supporting at OpenSSL and add API in header file
2. change OpenSSL server context method to be method of any version
Fixes http://esp32.com/viewtopic.php?f=14&t=696.
See merge request !369
Fix OpenOCD detection code
In the current master, detection of an attached OCD is broken. This fixes it.
I also snuck in two unrelated checks in intr_alloc which return from a function that is asserted earlier in the code. This makes the code behave better when they are called erroneously in a production build.
See merge request !377
bootloader: export ets_update_cpu_frequency
MR !363 added linking librtc into bootloader. At the same time, MR !373 removed ets_update_cpu_frequency from ROM exports ld script, and replaced it with a dual CPU aware version. Combining these two MRs caused linker error in bootloader due to the unresolved `ets_update_cpu_frequency`.
One option to fix this is to move the definition of ets_update_cpu_frequency into bootloader_support component. This does however look a bit odd because this function is not something that is specifically needed for bootloader support.
Another option is to export the ROM version of ets_update_cpu_frequency for the bootloader only. This means that when bootloader changes CPU frequency, it only updates the tick period variable for PRO CPU. This isn't an issue though, because app startup code still calls the dual CPU aware version of ets_update_cpu_frequency early on, before any non-trivial code can run on the APP cpu.
This MR uses the second approach. Looking forward, we may move this definition of ets_update_cpu_frequency into the rtc_clk component, which will be used both by the bootloader and the app, and placing ets_update_cpu_frequency there would be logical.
See merge request !384
SDMMC peripheral driver, SD protocol driver, FATFS library, VFS integration
This MR contains:
- SDMMC host peripheral driver
- SD protocol driver in sdmmc component (can be extended to support MMC/eMMC and SPI based hosts)
- ChaN's FATFS library v0.12b
- VFS integration
- FAT access via VFS is thread-safe (unless same file is read/written/unlinked/renamed from different tasks)
- Support for POSIX directory-related functions in VFS (and in vfs_fatfs.c)
- unit test for the above
- Example
- API documentation
Will be done in other MRs:
- Support for spi_flash IO driver for FatFs
- SPI host driver and support for SPI mode commands in sdmmc component
- MMC/eMMC support in sdmmc component
- Support for slightly higher 53/26.6MHz clocks (currently I'm using 20MHz for DS and 40MHz for HS, instead of 25MHz/50MHz per standard), and arbitrary low clocks (e.g. 4MHz).
See merge request !353
C++ support
This change adds necessary support for compiling C++ programs:
- linking against libstdc++
- implementation of static initialization guards using FreeRTOS primitives: since we don't have condition variables at our disposal, and we don't want to allocate a synchronization primitive for every guard variable generated by the compiler, we imitate condition variables using a combination of a mutex, counting semaphore, and a counter (based on [Microsoft Research paper](https://www.microsoft.com/en-us/research/wp-content/uploads/2004/12/ImplementingCVs.pdf), albeit because we don't need *arbitrary* code to use these CVs, implementation gets simpler).
Note that libstdc++ also contains an implementation of `__cxa_guard_{acquire,release,abort}` functions. These implementations come from an `#ifndef GXX_THREADS` branch, i.e. are not aware of multthreading. There are three ways of replacing these libstdc++ functions with our implementation:
1. Move our code into gcc. Pros: cleanest solution. Cons: Such changes are unlikely to be merged by any upstream, so we end up maintaining our own forks of {gcc,crosstool-ng}.
2. Use library as it is built by crosstool, use `ar` to delete one object file (`guards.o`), add this library to ESP-IDF. Pros: easy to implement. Cons: libstdc++ is a 15MB binary 😯
3. Keep using libstdc++ from crosstool, force our implementation to be linked using a `-u` linker flag. Pros: no impact on repo size, easy to implement. Cons: somewhat less clean than 1 (and about as hacky as 2).
For the reasons mentioned, option (3) looks like the best tradeoff.
Ref. TW6702
See merge request !364
Enable bootloader entropy source for RNG
Enables an entropy source when bootloader starts up, which both seeds the RNG for use before WiFi/BT stack is enabled and provides an adequate RNG for secure boot & flash encryption key generation.
A prerequisite was enabling 80MHz operation, so the CPU is now set to 80MHz as soon as second stage bootloader starts running.
See merge request !363
add menuconfig option to enable SO_RCVBUF
This option is required by Arduino and enables netconn connection to be queried for amount of data available in the rx buffer.
See merge request !372
esp32: ets_update_cpu_frequency should set tick scale for both CPUs
ets_update_cpu_frequency ROM function updates g_ticks_per_us, which is has two copies, one for each CPU.
The APP CPU copy of g_ticks_per_us never got updated, resulting in shorter delays produced by ets_delay_us on the APP CPU.
This MR replaces ROM ets_update_cpu_frequency with a copy in IRAM which updates scaling factors on both of the CPUs.
So now we get expected delays (in microseconds):
```
ets_delay_us core=0 expected=50000 actual=50014
ets_delay_us core=1 expected=50000 actual=50015
vTaskDelay core=0 expected=50000 actual=49428
vTaskDelay core=1 expected=50000 actual=50000
```
Reported on the forum: http://esp32.com/viewtopic.php?f=2&t=713#p3722
See merge request !373
SPI master driver
This merge requests adds an SPI Master driver. This driver is (of course) multithread capable, has device abstraction, has command queueing, DMA support and all other sorts of nice things you'd expect from a SPI driver.
See merge request !332
modify bootloader dram start address, swap app bss and data segments
Modify bootloader dram_seg from address 0x3ffc0000 to 0x3fff0000, len from 0x20000 to 0x10000.
Also put app .data before .bss, to reduce the chance .data collides with ROM bootloader stack.
See merge request !375
This change reduces chances that a large .bss segment will push .data all the way into
0x3ffe1320 — 0x3ffe5320 range where the bootloader stack is, creating a problem when
bootloader will be loading application into memory.
With this change, .data would need to be at least 200k big to cause problems.
Modify bootloader dram_seg from address 0x3ffc0000 to 0x3fff0000, len from
0x20000 to 0x10000. Please be notified that this is just a workaround for
fixing app data overwrite bootloader data issue!
1. add fading functions.
2. clear up ledc.c and ledc.h
3. update api doc.
4. add ledc example
5. edit ledc.rst and add readme for example code.
6. add s_ prefix for static global values.
7. add mutex for fade functions
8. minor changes according to the comments.
1. add method of any version supporting at OpenSSL and add API in header file
2. change OpenSSL server context method to be method of any version
Fixes http://esp32.com/viewtopic.php?f=14&t=696.
1. Update wifi lib which contains ampdu and other optimizations
2. Add throughput code debug code
3. Other misc modification about throughput optimization
2. update example comments and other minor changes
3. rename API: i2c_cmd_link_create/i2c_cmd_link_delete (+4 squashed commits)
Squashed commits:
[2e0ac3e] 1. coding style: add one space after condition key words.
2. modify i2c.h, use gpio_num_t instead of int, improve comments of return values
3. add i2c index in index.rst
4. add readme for i2c example
[4991d92] update i2c.doc
[88b672e] driver: i2c
1. add mux and spin lock to run in a thread-safe way.
2. modify example code
[4eb15fe] driver: i2c code
1. add i2c master code
2. add i2c slave code
3. add i2c example code
4. add DRAM_ATTR for I2C array
bugfix: uart event mismatch
Fix bug of uart frame error and parity error interrupt mismatch in driver code, which will cause the corresponding interrupt can not be cleared correctly, and will finally cause a interrupt watch dog.
See merge request !335
GPIO driver: add per-pin interrupt handlers
1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO.
Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler.
If this kind of calling a handler from isr is not proper, please kindly point out.
2. add gpio example code.
3. update gpio doc.
See merge request !345
