Commit graph

628 commits

Author SHA1 Message Date
Angus Gratton
3952d25a99 Merge branch 'feature/add_api_get_rmt_idle_level' into 'master'
feature(rmt):  fixed some RMT related issues.

See merge request idf/esp-idf!3864
2019-02-26 11:57:10 +08:00
Angus Gratton
ca72c3e97b Merge branch 'bugfix/fix_dig_gpio_unable_hold_bug' into 'master'
bugfix(gpio):  fixed digital gpio unable hold bug during deep-sleep.

See merge request idf/esp-idf!3877
2019-02-26 11:56:27 +08:00
Angus Gratton
280d39aedd Merge branch 'bugfix/i2s_pdm_adc_use_apll' into 'master'
bugfix(i2s): allow to use apll in pdm/adc/dac mode

See merge request idf/esp-idf!3800
2019-02-26 11:47:49 +08:00
Angus Gratton
b966ef9fcd Merge branch 'bugfix/update_ledc_register_and_fix_fade_scale' into 'master'
Bugfix (ledc):  Fixed ledc fade scale  bug

See merge request idf/esp-idf!4109
2019-02-26 11:46:28 +08:00
Darian Leung
099b83af67 CAN: Add functions to clear queues and fix multiple bugs
This commits adds the functions can_clear_transmit_queue() and
can_clear_receive_queue(). Closes #2906

The following bug are fixed:

- CAN_IO_UNUSED is now explicitly cast to enum type. Closes #2825
- Fix multiple documentation errors. Closes #2898, Closes #2794
- can_reconfigure_alerts() returns incorrect current_alerts. Closes #3028
- Add missing header file. Closes #3065
2019-02-18 21:31:33 +08:00
Michael (XIAO Xufeng)
86bcd56109 spi: fix the bug of connecting SPI peripheral to read-only pins
The requirements of pin capabilites is different for spi master and
slave.  The master needs CS, SCLK, MOSI to be output-able, while slave
needs MISO to be output-able.

Previous code is for master only.

This commit allows to place other 3 pins than MISO on input-only pins
for slaves. Refactoring for spi_common is also included.

Resolves https://github.com/espressif/esp-idf/issues/2455
2019-02-16 20:03:14 +08:00
Roland Dobai
37126d3451 Correct Kconfigs according to the coding style 2019-01-29 13:37:01 +01:00
michael
41e58bc419 spi: add new test for timing and mode
New unit tests added
------------------------

**Local:** Local test uses the GPIO matrix to connect the master and the
slave on the same board. When the master needs the iomux, the master
uses the GPIOs of its own, the slave connect to the pins by GPIO matrix;
When the slave needs the iomux, the slave uses the GPIOs of its own, the
master connects to the pins by GPIO matrix.

- Provide a new unit test which performs freq scanning in mode 0. It
scans frequency of 1M, 8M, 9M and all frequency steps up to the maximum
frequency allowed.

**M & S**: Master & slave tests performs the test with two boards. The
master and slave use iomux or gpio matrix according to the config.

- Provide a new unit test which performs freq scanning in mode 0. It
scans frequency of 1M, 8M, 9M and all frequency steps up to the maximum
frequency allowed.

- Provide a new unit test which performs mode test with significant
frequencies. It tests mode 0,1,2,3 with low frequency, and the maximum
frequency allowed.
2019-01-26 00:10:41 +08:00
Michael (XIAO Xufeng)
155006243e spi_master: fix the timing a little so that can assign delay half clock manually 2019-01-26 00:10:41 +08:00
michael
58955a79a2 spi_slave: improve the timing configuration
SPI Slave
===========

- Correct the configuration of mode 0~3 using new config in the TRM
- Split the workaround for DMA in mode 0/2 out of normal config, to make it clear.
- Update timing and speed document for the SPI slave.

Resolves https://github.com/espressif/esp-idf/issues/1346, https://github.com/espressif/esp-idf/issues/2393
2019-01-26 00:10:41 +08:00
michael
d9c5016e08 test: add new test framework for different configurations
Paremeterized Test Framework
-----------------------------

The SPI has a lot of parameters, which works in the same process.
This framework provides a way to easily test different parameter sets.
The framework can work in two different ways:

- local test: which requires only one board to perform the test - master
& slave test: which generates two sub test items which uses the same
config set to cooperate to perform the test.

The user defines a (pair if master/slave) set of init/deinit/loop
functions. Then the test framework will call init once, then call loop
several times with different configurations, then call deinit.

Then a unit test can be appended by add a parameter group, and pass it into
a macro.
2019-01-26 00:10:41 +08:00
Wangjialin
d518a19d95 driver(ledc): fix ledc fade API and update the register header file
1. fix error when fading is too fast
2. fix error when setting duty and update immediately
3. update register header file to be in accord with TRM

closes https://github.com/espressif/esp-idf/issues/2903
2019-01-12 00:56:38 +08:00
kooho
919a36b6b5 driver(gpio): fixed digital gpio unable hold bug during deep-sleep. 2018-12-18 17:04:12 +08:00
Paul Abbott
be567d3eb5 driver(rmt): Fixed some RMT related issues.
1. Add missing get function to RMT API: rmt_get_idle_level().
2. Suppress error message from rmt_wait_tx_done() if wait_time==0 (allows for polling).
3. Remove the blank lines between parameter lists.

Merges https://github.com/espressif/esp-idf/pull/2666
2018-12-18 13:32:39 +08:00
kooho
e22c0cce45 driver(timer_group): fixed bug that init hw_timer caused cresh after system soft reset
closes https://github.com/espressif/esp-idf/issues/2756
2018-12-18 13:10:15 +08:00
Anton Maklakov
81bf07ed4d test: Fix some unused identifier warnings 2018-12-10 12:34:16 +08:00
Jeroen Domburg
d6ee27e313 Merge branch 'feat/spi_check_length_buffer' into 'master'
spi: add checks for slave buffer valid and master length

See merge request idf/esp-idf!3744
2018-12-04 11:48:32 +08:00
Wangjialin
924daf7b84 bugfix(i2c): reduce speed of I2C master bus reset routine and release SDA
closes https://github.com/espressif/esp-idf/issues/2494
closes https://github.com/espressif/esp-idf/pull/2493
closes https://github.com/espressif/esp-idf/pull/2496

1. Change bus reset to handle interrupted READ sequences.
2. Slow down I2C to 100khz during reset
3. If a SLAVE device was in a read operation when the bus was interrupted, the SLAVE device is controlling SDA.The only bit during the 9 clock cycles of a byte READ the MASTER(ESP32) is guaranteed control over, is during the ACK bit period.
If the SLAVE is sending a stream of ZERO bytes, it will only release SDA during the ACK bit period. The master(ESP32) cannot generate a STOP unless SDA is HIGH. So, this reset code synchronizes the bit stream with, Either, the ACK bit, Or a 1 bit.
2018-11-30 10:08:28 +08:00
chuck todd
e55f9c1e98 1. Slow down I2C to 100khz During Reset
I am stealing this delay coding from @jeremyherbert #2493 pr.

2. Change Bus Reset to handle interrupted READ sequences.

The current code does not handle interrupted READ cycles.

 If a SLAVE device was in a read operation when the bus was interrupted, the SLAVE device is controlling SDA.

The only bit during the 9 clock cycles of a byte READ the MASTER(ESP32) is guaranteed control over, is during the ACK bit period.

If the SLAVE is sending a stream of ZERO bytes, it will only release SDA during the ACK bit period. The master(ESP32) cannot generate a STOP unless SDA is HIGH.

So, this reset code synchronizes the bit stream with, Either, the ACK bit, Or a 1 bit.

3. fix typo

correct `sda_id` to `sda_io` in `i2c_master_clear_bus()` @ryan-ma found it.  This typo was generated when I manually edited this patch on GitHub, I should have done a Copy/Paste operation!
2018-11-30 10:08:28 +08:00
jeremy
34c1d25c7f reduce speed of i2c master bus reset routine and release sda 2018-11-30 10:08:28 +08:00
morris
2b165f99c4 i2c_tool: add i2c_tool example test
1. add example test for i2c-tools
2. make command line arguments number configurable
2018-11-30 10:08:28 +08:00
houchenyao
147447b13e test: components/driver: i2c case 2018-11-29 18:27:58 +08:00
He Yin Ling
add7c49a26 Merge branch 'test/driver_i2s' into 'master'
component/driver:add i2s case

See merge request idf/esp-idf!2117
2018-11-29 14:41:09 +08:00
Wang Jia Lin
62cc522f36 Merge branch 'feature/rmt_add_api_get_free_channel' into 'master'
feature(rmt):   Add API get rmt channel's status.

See merge request idf/esp-idf!2440
2018-11-29 11:59:39 +08:00
houchenyao
44fdca94e9 test: components/driver: i2s case 2018-11-29 11:32:40 +08:00
Wang Jia Lin
cc5673435b Merge branch 'bugfix/fix_uart_read_bug_when_using_dual_core' into 'master'
bugfix(uart): fix uart read error bug when using dual core.

See merge request idf/esp-idf!3521
2018-11-28 16:17:13 +08:00
kooho
da223fad4e driver(rmt): Add API get rmt channel's status.
closes https://github.com/espressif/esp-idf/issues/1175
closes https://github.com/espressif/esp-idf/issues/2599
closes https://github.com/espressif/esp-idf/issues/2452
2018-11-28 07:20:45 +00:00
He Yin Ling
19910c8729 Merge branch 'test/driver_mcpwm' into 'master'
test/mcpwm_case

See merge request idf/esp-idf!1831
2018-11-28 13:56:05 +08:00
Wang Jia Lin
70554e8caa Merge branch 'doc/uart_lightsleep_wakeup_doc' into 'master'
doc(uart):  update the comment of uart_set_wakeup_threshold

See merge request idf/esp-idf!3556
2018-11-28 11:35:56 +08:00
houchenyao
11faab2c5d test: components/driver: pwm case 2018-11-28 10:42:32 +08:00
kooho
a9c1124763 driver(uart): fixed uart read error bug when using dual core.
closes https://github.com/espressif/esp-idf/issues/2204
2018-11-27 20:53:26 +08:00
Wangjialin
4b34ae1258 bugfix(i2s): allow to use apll in pdm/adc/dac mode
1. Allow to use apll in pdm mode
2. Add clock frequency configuration for PDM mode
3. Allow to use apll in ADC/DAC mode
2018-11-27 18:41:20 +08:00
michael
cfba157fdd spi_slave: add valid check for DMA buffers
The DMA cannot receive data correctly when the buffer address is not
WORD aligned. Currently we only check whether the buffer is in the DRAM
region.

The DMA always write in WORDs, so the length arguments should also be
multiples of 32 bits.

A check is added to see whether the buffer is WORD aligned and has valid
length.
2018-11-26 03:49:26 +00:00
michael
435adaa22a spi_master: add check for trans len
The driver decide whether use MOSI/MISO phases according to the buffer
address together with the SPI_TRANS_USE_*DATA. However someone may assue
that these phases will be skipped when the ``length``/``rxlength`` is
set to 0. In fact it is a feature that ``rxlength`` is allowed to be
set to 0 when tx and rx have the same length, and the driver fill the
``rxlength`` to ``length``.

An error check is added when the rxlength is 0 but there is data to be
sent.
2018-11-26 03:49:26 +00:00
Mahavir Jain
765bf674d0 i2s: add (optional) support to clear tx descriptor in underflow case
It has been observed that, in case of underflow (data unavailability) in
I2S transmission, previously filled up tx descriptors continue to get
transmitted on line, causing noise in case of audio use case.

This change adds optional `tx_desc_auto_clear` field during I2S driver intialization
than can zero initialize tx descriptor in case of underflow situation in
interrupt handler itself.

Closes: https://github.com/espressif/esp-idf/issues/1789
2018-11-23 14:31:09 +05:30
kooho
33138a3dec driver(i2c): enable I2C master hardware filter by default. 2018-11-23 10:27:59 +08:00
Michael (XIAO Xufeng)
8cddfa35b8 spi: fix the crash when callbacks are not in the IRAM
Introduced in 9c23b8e5 and 4f87a62f. To get higher speed, menuconfig
options are added to put ISR and other functions into the IRAM.  The
interrupt flag ESP_INTR_FLAG_IRAM is also mistakenly set when the ISR is
put into the IRAM. However callbacks, which are wrote by the user, are
called in the master and slave ISR. The user may not be aware of that
these callbacks are not disabled during flash operations. Any cache miss
during flash operation will cause panic.

Essentially IRAM functions and intrrupt flag ESP_INTR_FLAG_IRAM are
different, the latter means not disabling the ISR during flash
operations.  New bus_config flag intr_flags is offered to help set the
interrupt attribute, including priority level, SHARED, IRAM (not
disabled during flash operations).  It introduced a small BREAK to
IDFv3.1 (but the same as IDFv3.0) that the user has to manually set IRAM
flag now (therefore he's aware of the IRAM thing) to void the ISR being
disabled during flash operations.
2018-11-20 13:07:13 +08:00
Ivan Grokhotkov
a46b884a14 Merge branch 'feature/unit_test_example' into 'master'
Move Unity into components, add unit test example

See merge request idf/esp-idf!3562
2018-11-19 18:35:54 +08:00
Ivan Grokhotkov
6091021e83 unity: separate common and IDF specific functionality
New unity component can be used for testing other applications.
Upstream version of Unity is included as a submodule.
Utilities specific to ESP-IDF unit tests (partitions, leak checking
setup/teardown functions, etc) are kept only in unit-test-app.
Kconfig options are added to allow disabling certain Unity features.
2018-11-19 12:36:31 +08:00
michael
26626dfbf2 spi: add documents explicitly showing the executing core of the ISR
It is an ESP specific FreeRTOS feature that the ISR is always executed
on the core which calls the interrupt register function. In the SPI
driver, the function is always called in the bus initialization
function.

Hence, the ISR will be executed on the core which initialize the driver.

If the core is starved due to higher priority ISRs, or the interrupt is
disabled on the core (spinlock called, etc.), the ISR will not get
executed and SPI transactions will not be handled.

(MINOR CHANGE)

Resolves https://github.com/espressif/esp-idf/issues/2432.
2018-11-13 11:49:31 +08:00
michael
a52ab8ca87 spi_master: modify the error msg a little when over freq limit
The MISO signal will be delayed if the GPIO matrix is enabled.
However, delay also comes from the slave.

Previous code only considers the former case, and assume the frequency
limitations is only violated when GPIO matrix is used.

Now we are able to calculate the freq limit when extenal MISO delay is
given (feature introduced in 9c6c6ec34ab0641ace89aeb9b1a133eb6fae1a18).
The frequency limit is lower when the external MISO delay is large, and
the limit is likely to be violated even with IOMUX.

Resolves https://github.com/espressif/esp-idf/issues/2690.
2018-11-13 11:49:31 +08:00
Ivan Grokhotkov
621e316725 Merge branch 'feat/psram_support_hspi' into 'master'
esp32: support to use hspi to output clock for 4M psram

See merge request idf/esp-idf!3377
2018-11-06 20:34:41 +08:00
kooho
ea963c480c driver(uart):update the comment of uart_set_wakeup_threshold
closes https://github.com/espressif/esp-idf/issues/2627
2018-11-05 13:09:12 +08:00
Konstantin Kondrashov
8bba348528 aes/sha/mpi: Bugfix a use of shared registers.
This commit resolves a blocking in esp_aes_block function.

Introduce:
The problem was in the fact that AES is switched off at the moment when he should give out the processed data. But because of the disabled, the operation can not be completed successfully, there is an infinite hang. The reason for this behavior is that the registers for controlling the inclusion of AES, SHA, MPI have shared registers and they were not protected from sharing.

Fix some related issue with shared using of AES SHA RSA accelerators.

Closes: https://github.com/espressif/esp-idf/issues/2295#issuecomment-432898137
2018-11-05 04:22:47 +00:00
Michael (XIAO Xufeng)
9b5d0f3322 spi: shown owner of spi host explicitly 2018-10-29 20:22:44 +08:00
Michael (XIAO Xufeng)
90d229eb6d spi_master: speed up polling performance by putting into IRAM 2018-10-25 12:31:45 +08:00
Michael (XIAO Xufeng)
d0361a32d7 test: fix the IRAM type conflict issue using heap_caps_malloc 2018-10-25 12:31:44 +08:00
Angus Gratton
38bd836d05 Merge branch 'feature/cmake-unit-test' into 'master'
cmake: add unit tests build support

See merge request idf/esp-idf!3003
2018-10-22 16:29:15 +08:00
Anton Maklakov
e3fce506b8 test_spi_slave: fix warnings about unused identifiers 2018-10-21 15:11:45 +08:00
Renz Bagaporo
cc774111bf cmake: Add support for test build 2018-10-20 12:07:24 +08:00