Merge branch 'refactor/restructure_soc_component' into 'master'

soc: separate abstraction, description and implementation

See merge request espressif/esp-idf!7261

components/esp32s2/include/esp32s2/brownout.h

@@ -16,6 +16,14 @@
 #ifndef __ESP_BROWNOUT_H
 #define __ESP_BROWNOUT_H
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 void esp_brownout_init(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif

components/esp32s2/include/esp32s2/cache_err_int.h

@@ -12,6 +12,9 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 /**
  * @brief initialize cache invalid access interrupt
@@ -31,3 +34,7 @@ void esp_cache_err_int_init(void);
  *  - (-1) otherwise
  */
 int esp_cache_err_get_cpuid(void);
+
+#ifdef __cplusplus
+}
+#endif

components/esp32s2/include/esp32s2/spiram.h

@@ -21,6 +21,10 @@
 #include <stdbool.h>
 #include "esp_err.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
  * @brief Initialize spiram interface/hardware. Normally called from cpu_start.c.
  *
@@ -87,5 +91,8 @@ void esp_spiram_writeback_cache(void);
  */
 esp_err_t esp_spiram_reserve_dma_pool(size_t size);
 
+#ifdef __cplusplus
+}
+#endif
 
 #endif

components/esp32s2/include/esp_clk.h

@@ -14,6 +14,10 @@
 
 #pragma once
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
  * @file esp_clk.h
  *
@@ -73,3 +77,7 @@ int esp_clk_apb_freq(void);
  * @return Value or RTC counter, expressed in microseconds
  */
 uint64_t esp_clk_rtc_time(void);
+
+#ifdef __cplusplus
+}
+#endif

components/esp32s2/include/esp_spiram.h

@@ -20,6 +20,10 @@
 #include <stdint.h>
 #include "esp_err.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
  * @brief Initialize spiram interface/hardware. Normally called from cpu_start.c.
  *
@@ -86,5 +90,8 @@ void esp_spiram_writeback_cache(void);
  */
 esp_err_t esp_spiram_reserve_dma_pool(size_t size);
 
+#ifdef __cplusplus
+}
+#endif
 
 #endif

components/esp_wifi/esp32s2/include/phy_init_data.h

@@ -17,6 +17,10 @@
 #include "esp_phy_init.h"
 #include "sdkconfig.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 // constrain a value between 'low' and 'high', inclusive
 #define LIMIT(val, low, high) ((val < low) ? low : (val > high) ? high : val)
 
@@ -144,5 +148,9 @@ static const esp_phy_init_data_t phy_init_data= { {
 
 static const char phy_init_magic_post[] = PHY_INIT_MAGIC;
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* PHY_INIT_DATA_H */
 

components/fatfs/test_fatfs_host/Makefile.files

@@ -27,8 +27,9 @@ INCLUDE_DIRS := \
 		esp_rom/include \
 		xtensa/include \
 		xtensa/esp32/include \
-		soc/esp32/include \
+		soc/soc/esp32/include \
 		soc/include \
+		soc/soc/include \
 		esp32/include \
 		esp_common/include \
 		bootloader_support/include \

components/soc/CMakeLists.txt

@@ -1,16 +1,6 @@
-idf_build_get_property(soc_name IDF_TARGET)
+idf_build_get_property(target IDF_TARGET)
 
-if(EXISTS "${COMPONENT_DIR}/${soc_name}")
-    include(${COMPONENT_DIR}/${soc_name}/sources.cmake)
-
-    spaces2list(SOC_SRCS)
-    add_prefix(srcs "${soc_name}/" ${SOC_SRCS})
-    set(include_dirs ${soc_name}/include)
-endif()
-
-list(APPEND include_dirs include)
-list(APPEND srcs
-    "src/memory_layout_utils.c"
+idf_component_register(SRCS "src/memory_layout_utils.c"
                             "src/lldesc.c"
                             "src/hal/rmt_hal.c"
                             "src/hal/rtc_io_hal.c"
@@ -36,21 +26,22 @@ list(APPEND srcs
                             "src/hal/spi_flash_hal.c"
                             "src/hal/spi_flash_hal_iram.c"
                             "src/compare_set.c"
-    )
-
-if(IDF_TARGET STREQUAL "esp32")
-    list(APPEND srcs "src/hal/mcpwm_hal.c"
-                     "src/hal/sdio_slave_hal.c"
-                     "src/hal/can_hal.c"
-    )
-endif()
-
-if(IDF_TARGET STREQUAL "esp32s2")
-    list(APPEND srcs    "src/hal/spi_flash_hal_gpspi.c"
-                        "esp32s2/hal/usb_hal.c")
-endif()
-
-idf_component_register(SRCS "${srcs}"
-                       INCLUDE_DIRS "${include_dirs}"
-                       PRIV_REQUIRES ${soc_name}
+                       PRIV_REQUIRES ${target}
                        LDFRAGMENTS linker.lf)
+
+if(CONFIG_IDF_TARGET_ESP32)
+    target_sources(${COMPONENT_LIB} PRIVATE "src/hal/can_hal.c"
+                                            "src/hal/mcpwm_hal.c"
+                                            "src/hal/sdio_slave_hal.c")
+elseif(CONFIG_IDF_TARGET_ESP32S2)
+    target_sources(${COMPONENT_LIB} PRIVATE "src/hal/spi_flash_hal_gpspi.c")
+endif()
+
+# Since there can be chip-specific HAL headers which can include the common 
+# HAL header via include_next, process the build scripts here first so that 
+# include directories appear first in the compile command.
+add_subdirectory(src/${target})
+target_include_directories(${COMPONENT_LIB} PUBLIC include)
+
+add_subdirectory(soc)
+target_link_libraries(${COMPONENT_LIB} PUBLIC "soc_${target}")

components/soc/README.md

@@ -0,0 +1,44 @@
+## `soc` ##
+
+The `soc` component provides abstraction, hardware description and implementation for targets suppported by ESP-IDF. This is reflected in
+the component's subdirectories:
+
+- `soc/include` - abstraction
+- `soc/soc` - description
+- `soc/src` - implementation
+
+#### `soc/include` ####
+
+`soc/include` contains header files which provide a hardware-agnostic interface to the SoC. The interface consists of
+function declarations and abstracted types that other, higher level components can make use of in order to have code portable to 
+all targets ESP-IDF supports.
+
+The `hal` subdirectory contains an abstraction layer for interacting with/driving the hardware found in the SoC such as the peripherals 
+and 'core' hardware such as the CPU, MPU, caches, etc. It contains `xxx_hal.h` files for the function declarations and `xxx_types.h` for the abstracted types.
+The abstraction design is actually two levels -- oftentimes `xxx_hal.h` includes a lower-level header from a
+`xxx_ll.h`, which resides in the implementation, `soc/src` subdirectory. More on this abstraction design in the [`hal` subdirectory's README](include/hal/readme.md).
+
+The `soc` subdirectory contains other useful interface for SoC-level operations or concepts, such as the memory layout, spinlocks, etc.
+
+#### `soc/soc` ####
+
+The `soc/soc` subdirectory contains description of the underlying hardware:
+
+    - `xxx_reg.h`   - defines registers related to the hardware
+    - `xxx_struct.h` - hardware description in C `struct`
+    - `xxx_channel.h` - definitions for hardware with multiple channels
+    - `xxx_caps.h`  - features/capabilities of the hardware
+    - `xxx_pins.h`  - pin definitions
+    - `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware
+
+Since the hardware description is target-specific, there are subdirectories for each target containing copies of the files above.
+Furthermore, the files in this directory should be standalone, i.e. should not include files from outside directories.
+
+#### `soc/src` ####
+
+Provides the implementation of the hardware-agnostic interface in the abstraction. Target-specific subdirectories exist for wildly different implementations between targets; while code that are common/very similar might be placed in the top-level of `soc/src`, using some amount of conditional preprocessors. It is up to the developers' discretion on which strategy to use. Code usually reside in source files with same names to header files whose interfaces they implement, ex. `xxx_hal.c` for `xxx_hal.h`.
+
+As mentioned previously, the lower-level abstraction header `xxx_ll.h` resides in this directory, since they contain hardware-specific details.
+However, what these can do is provide some abstraction among implementations, so that more code can be moved to the common, non-target-specific subdirectories.
+
+This can also contain target-specific extensions to the HAL headers. These target-specific HAL headers have the same name and include the abstraction layer HAL header via `include_next`. These extensions might add more function declarations or override some things using macro magic.

components/soc/component.mk

@@ -1,9 +1,14 @@
 SOC_NAME := $(IDF_TARGET)
 
-COMPONENT_SRCDIRS := $(SOC_NAME) src src/hal
+COMPONENT_SRCDIRS := src src/hal
+COMPONENT_ADD_INCLUDEDIRS := 
 
-COMPONENT_ADD_INCLUDEDIRS := $(SOC_NAME)/include include
+# Since there can be chip-specific HAL headers which can include the common 
+# HAL header via include_next, process the build scripts here first so that 
+# include directories appear first in the compile command.
+-include $(COMPONENT_PATH)/src/$(SOC_NAME)/component.mk
+COMPONENT_ADD_INCLUDEDIRS += include
 
--include $(COMPONENT_PATH)/$(SOC_NAME)/component.mk
+-include $(COMPONENT_PATH)/soc/component.mk
 
 COMPONENT_ADD_LDFRAGMENTS += linker.lf

components/soc/esp32/component.mk

@@ -1,5 +0,0 @@
-ifndef CONFIG_ETH_USE_ESP32_EMAC
-    COMPONENT_OBJEXCLUDE += esp32/emac_hal.o
-endif
-
-esp32/rtc_clk.o: CFLAGS += -fno-jump-tables -fno-tree-switch-conversion

components/soc/esp32/sources.cmake

@@ -1,34 +0,0 @@
-set(SOC_SRCS "adc_periph.c"
-    "brownout_hal.c"
-    "dac_periph.c"
-    "cpu_util.c"
-    "gpio_periph.c"
-    "rtc_clk.c"
-    "rtc_clk_init.c"
-    "rtc_init.c"
-    "rtc_io_periph.c"
-    "rtc_periph.c"
-    "rtc_pm.c"
-    "rtc_sleep.c"
-    "rtc_time.c"
-    "rtc_wdt.c"
-    "sdio_slave_periph.c"
-    "sdmmc_periph.c"
-    "interrupts.c"
-    "soc_memory_layout.c"
-    "spi_periph.c"
-    "ledc_periph.c"
-    "i2s_periph.c"
-    "i2c_periph.c"
-    "uart_periph.c"
-    "touch_sensor_hal.c"
-    "touch_sensor_periph.c")
-
-if(NOT BOOTLOADER_BUILD AND CONFIG_ETH_USE_ESP32_EMAC)
-    list(APPEND SOC_SRCS "emac_hal.c")
-endif()
-
-if(NOT CMAKE_BUILD_EARLY_EXPANSION)
-    set_source_files_properties("esp32/rtc_clk.c" PROPERTIES
-                                COMPILE_FLAGS "-fno-jump-tables -fno-tree-switch-conversion")
-endif()

components/soc/esp32s2/component.mk

@@ -1 +0,0 @@
-esp32s2/rtc_clk.o: CFLAGS += -fno-jump-tables -fno-tree-switch-conversion

components/soc/esp32s2/sources.cmake

@@ -1,28 +0,0 @@
-set(SOC_SRCS    "adc_periph.c"
-                "brownout_hal.c"
-                "dac_periph.c"
-                "cpu_util.c"
-                "gpio_periph.c"
-                "rtc_clk.c"
-                "rtc_init.c"
-                "rtc_io_periph.c"
-                "rtc_periph.c"
-                "rtc_pm.c"
-                "rtc_sleep.c"
-                "rtc_time.c"
-                "rtc_wdt.c"
-                "interrupts.c"
-                "soc_memory_layout.c"
-                "spi_periph.c"
-                "ledc_periph.c"
-                "i2s_periph.c"
-                "i2c_periph.c"
-                "uart_periph.c"
-                "usb_periph.c"
-                "touch_sensor_hal.c"
-                "touch_sensor_periph.c")
-
-if(NOT CMAKE_BUILD_EARLY_EXPANSION)
-    set_source_files_properties("esp32s2/rtc_clk.c" PROPERTIES
-                                COMPILE_FLAGS "-fno-jump-tables -fno-tree-switch-conversion")
-endif()

components/soc/include/hal/spi_flash_types.h

@@ -15,7 +15,7 @@
 #pragma once
 
 #include <esp_types.h>
-#include "hal/esp_flash_err.h"
+#include "esp_flash_err.h"
 
 #ifdef __cplusplus
 extern "C" {

components/soc/include/hal/touch_sensor_hal.h

@@ -25,10 +25,8 @@
 #include "hal/touch_sensor_ll.h"
 #include "hal/touch_sensor_types.h"
 
-#ifdef CONFIG_IDF_TARGET_ESP32
-#include "hal/touch_sensor_hal_esp32.h"
-#elif CONFIG_IDF_TARGET_ESP32S2
-#include "hal/touch_sensor_hal_esp32s2.h"
+#ifdef __cplusplus
+extern "C" {
 #endif
 
 typedef struct {
@@ -225,3 +223,7 @@ void touch_hal_deinit(void);
  * Configure touch sensor for each channel.
  */
 void touch_hal_config(touch_pad_t touch_num);
+
+#ifdef __cplusplus
+}
+#endif

components/soc/include/soc_log.h

@@ -22,8 +22,25 @@
  * this header file provides wrappers for logging functions.
  */
 
+#ifdef ESP_PLATFORM
+#include "esp_log.h"
+#define SOC_LOGE(tag, fmt, ...) ESP_EARLY_LOGE(tag, fmt, ##__VA_ARGS__)
+#define SOC_LOGW(tag, fmt, ...) ESP_EARLY_LOGW(tag, fmt, ##__VA_ARGS__)
+#define SOC_LOGI(tag, fmt, ...) ESP_EARLY_LOGI(tag, fmt, ##__VA_ARGS__)
+#define SOC_LOGD(tag, fmt, ...) ESP_EARLY_LOGD(tag, fmt, ##__VA_ARGS__)
+#define SOC_LOGV(tag, fmt, ...) ESP_EARLY_LOGV(tag, fmt, ##__VA_ARGS__)
+
+#else
+
+#ifdef CONFIG_IDF_TARGET_ESPP32
+#include "esp32/rom/ets_sys.h"
+#elif CONFIG_IDF_TARGET_ESP32S2
+#include "esp32s2/rom/ets_sys.h"
+#endif
+
 #define SOC_LOGE(tag, fmt, ...) ets_printf("%s(err): " fmt, tag, ##__VA_ARGS__)
 #define SOC_LOGW(tag, fmt, ...) ets_printf("%s(warn): " fmt, tag, ##__VA_ARGS__)
 #define SOC_LOGI(tag, fmt, ...) ets_printf("%s(info): " fmt, tag, ##__VA_ARGS__)
 #define SOC_LOGD(tag, fmt, ...) ets_printf("%s(dbg): " fmt, tag, ##__VA_ARGS__)
 #define SOC_LOGV(tag, fmt, ...) ets_printf("%s: " fmt, tag, ##__VA_ARGS__)
+#endif //ESP_PLATFORM

components/soc/soc/CMakeLists.txt

@@ -0,0 +1,2 @@
+idf_build_get_property(target IDF_TARGET)
+add_subdirectory(${target})

components/soc/soc/component.mk

@@ -0,0 +1,2 @@
+COMPONENT_ADD_INCLUDEDIRS += soc/include soc/$(SOC_NAME) soc/$(SOC_NAME)/include
+COMPONENT_SRCDIRS += soc/$(SOC_NAME)

components/soc/soc/esp32/CMakeLists.txt

@@ -0,0 +1,17 @@
+add_library(soc_esp32 STATIC
+    "adc_periph.c"
+    "dac_periph.c"
+    "gpio_periph.c"
+    "rtc_io_periph.c"
+    "rtc_periph.c"
+    "sdio_slave_periph.c"
+    "sdmmc_periph.c"
+    "interrupts.c"
+    "spi_periph.c"
+    "ledc_periph.c"
+    "i2s_periph.c"
+    "i2c_periph.c"
+    "uart_periph.c"
+    "touch_sensor_periph.c")
+
+target_include_directories(soc_esp32 PUBLIC . include ../include)

components/soc/soc/esp32/include/soc/brownout_caps.h

@@ -18,6 +18,8 @@
 extern "C" {
 #endif
 
+#include "sdkconfig.h"
+
 #if (CONFIG_ESP32_REV_MIN >= 1)
 #define SOC_BROWNOUT_RESET_SUPPORTED 1
 #endif

components/soc/soc/esp32/include/soc/can_caps.h

@@ -18,6 +18,8 @@
 extern "C" {
 #endif
 
+#include "sdkconfig.h"
+
 #if (CONFIG_ESP32_REV_MIN >= 2)
 #define CAN_BRP_DIV_SUPPORTED       1
 #define CAN_BRP_DIV_THRESH          128

components/soc/soc/esp32/include/soc/cpu.h

@@ -21,6 +21,10 @@
 #include "xtensa/corebits.h"
 #include "xtensa/config/core.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /* C macros for xtensa special register read/write/exchange */
 
 #define RSR(reg, curval)  asm volatile ("rsr %0, " #reg : "=r" (curval));
@@ -140,4 +144,8 @@ static inline esp_cpu_ccount_t esp_cpu_get_ccount(void)
     return result;
 }
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif