Add option to enable compiler psram workaround. Needs custom crosstool.
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@ -157,6 +157,14 @@ config MEMMAP_SPIRAM_ENABLE
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if MEMMAP_SPIRAM_ENABLE
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config SPIRAM_CACHE_WORKAROUND
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bool "Enable workaround for bug in SPI RAM cache for V1 silicon"
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default "y"
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help
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V1 ESP32 silicon has a bug that can cause a write to PSRAM not to take place in some situations
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when the cache line needs to be fetched from external RAM and an interrupt occurs. This enables a
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fix in the compiler that makes sure the specific code that is vulnerable to this will not be emitted.
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choice MEMMAP_SPIRAM_TYPE
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prompt "Type of SPI RAM chip in use"
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default MEMMAP_SPIRAM_TYPE_ESPPSRAM32
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@ -98,7 +98,7 @@ static const char* TAG = "cpu_start";
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#if CONFIG_FREERTOS_UNICORE
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#define PSRAM_MODE PSRAM_VADDR_MODE_NORMAL
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#else
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#define PSRAM_MODE PSRAM_VADDR_MODE_LOWHIGH
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#define PSRAM_MODE PSRAM_VADDR_MODE_EVENODD
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#endif
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/*
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@ -239,6 +239,11 @@ else
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OPTIMIZATION_FLAGS = -Og
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endif
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# Enable psram cache bug workaround in compiler if selected
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ifeq ("$(CONFIG_SPIRAM_CACHE_WORKAROUND)", "y")
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COMMON_FLAGS+=-mfix-esp32-psram-cache-issue
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endif
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# Enable generation of debugging symbols
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# (we generate even in Release mode, as this has no impact on final binary size.)
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DEBUG_FLAGS ?= -ggdb
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