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Merge branch 'bugfix/set_ccount_overflow' into 'master'

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clk: Fix the overflow when setting ccount

See merge request idf/esp-idf!4309
This commit is contained in:
Ivan Grokhotkov 2019-06-03 19:50:04 +08:00
parent fa36433199 4d3762a8df
commit a1b66e8984
2 changed files with 2 additions and 2 deletions
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2
components/esp32/clk.c
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@ -136,7 +136,7 @@ void esp_clk_init(void)
rtc_clk_cpu_freq_set_config(&new_config);
// Re calculate the ccount to make time calculation correct.
XTHAL_SET_CCOUNT( XTHAL_GET_CCOUNT() * new_freq_mhz / old_freq_mhz );
XTHAL_SET_CCOUNT( (uint64_t)XTHAL_GET_CCOUNT() * new_freq_mhz / old_freq_mhz );
}
int IRAM_ATTR esp_clk_cpu_freq(void)

2
components/soc/esp32/rtc_clk_init.c
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@ -128,7 +128,7 @@ void rtc_clk_init(rtc_clk_config_t cfg)
REG_WRITE(APB_CTRL_PLL_TICK_CONF_REG, APB_CLK_FREQ / MHZ - 1); /* Under PLL, APB frequency is always 80MHz */
/* Re-calculate the ccount to make time calculation correct. */
XTHAL_SET_CCOUNT( XTHAL_GET_CCOUNT() * cfg.cpu_freq_mhz / freq_before );
XTHAL_SET_CCOUNT( (uint64_t)XTHAL_GET_CCOUNT() * cfg.cpu_freq_mhz / freq_before );
/* Slow & fast clocks setup */
if (cfg.slow_freq == RTC_SLOW_FREQ_32K_XTAL) {