bootloader/flash_encrypt: added esp32s2 flash encryption code on build system and enabled example
flash_enctryption: enabled flash encryption example on esp32s2 bootloader: raise WDT overflow value providing sufficient interval to encrypt app partition flash_ encrypt: Fixed the TODOs on flash encryption key generation for esp32s2 flash_encryption: added secure boot features to flash enctryption for esp32s2 bootloader: leave only esp32s2 compatible potentially insecure options on menuconfig. flash_encryption: removed secure boot version 1 from esp32s2 encryption code flash_encryption: added CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED option for esp32s2 flash_encryption: fixed the count of left plaintext flash flash_encryption: disable dcache and icache download when using encryption in release mode flash_encryption: add cache potentally insecure options for s2 chips flash_encryption: fixed bug which bricked some chips in relase mode
This commit is contained in:
Felipe Neves
parent
cd1aba595e
commit
7635dce502
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@ -180,7 +180,8 @@ menu "Bootloader config"
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config BOOTLOADER_WDT_TIME_MS
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int "Timeout for RTC watchdog (ms)"
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depends on BOOTLOADER_WDT_ENABLE
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default 9000
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default 9000 if IDF_TARGET_ESP32
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default 40000 if IDF_TARGET_ESP32S2
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range 0 120000
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help
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Verify that this parameter is correct and more then the execution time.
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@ -601,7 +602,7 @@ menu "Security features"
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config SECURE_BOOT_ALLOW_ROM_BASIC
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bool "Leave ROM BASIC Interpreter available on reset"
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depends on SECURE_BOOT_INSECURE || SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
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depends on SECURE_BOOT_INSECURE || SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT && IDF_TARGET_ESP32
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default N
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help
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By default, the BASIC ROM Console starts on reset if no valid bootloader is
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@ -664,7 +665,7 @@ menu "Security features"
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config SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC
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bool "Leave UART bootloader decryption enabled"
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depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
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depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT && IDF_TARGET_ESP32
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default N
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help
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If not set (default), the bootloader will permanently disable UART bootloader decryption access on
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@ -6,17 +6,13 @@ set(srcs
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"src/bootloader_random.c"
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"src/bootloader_utility.c"
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"src/esp_image_format.c"
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"src/flash_encrypt.c"
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"src/flash_partitions.c"
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"src/flash_qio_mode.c"
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"src/bootloader_flash_config_${IDF_TARGET}.c"
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"src/bootloader_efuse_${IDF_TARGET}.c"
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)
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if(IDF_TARGET STREQUAL "esp32")
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# Not supported on ESP32S2 yet
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list(APPEND srcs "src/flash_encrypt.c")
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endif()
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if(BOOTLOADER_BUILD)
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set(include_dirs "include" "include_bootloader")
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set(priv_requires micro-ecc spi_flash efuse)
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@ -25,6 +25,8 @@
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#include "esp32s2/rom/secure_boot.h"
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#include "esp32s2/rom/cache.h"
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#include "esp32s2/rom/efuse.h"
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#include "esp_efuse.h"
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#include "esp_efuse_table.h"
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static const char *TAG = "flash_encrypt";
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@ -38,53 +40,54 @@ static esp_err_t encrypt_partition(int index, const esp_partition_info_t *partit
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esp_err_t esp_flash_encrypt_check_and_update(void)
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{
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// TODO: not clear why this is read from DATA1 and written to PGM_DATA2
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uint32_t cnt = REG_GET_FIELD(EFUSE_RD_REPEAT_DATA1_REG, EFUSE_SPI_BOOT_CRYPT_CNT);
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ESP_LOGV(TAG, "SPI_BOOT_CRYPT_CNT 0x%x", cnt);
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uint8_t flash_crypt_wr_dis = 0;
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uint32_t flash_crypt_cnt = REG_GET_FIELD(EFUSE_RD_REPEAT_DATA1_REG, EFUSE_SPI_BOOT_CRYPT_CNT);
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esp_efuse_read_field_blob(ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT, &flash_crypt_wr_dis, 1);
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bool flash_crypt_wr_dis = false; // TODO: check if CRYPT_CNT is write disabled
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ESP_LOGV(TAG, "SPI_BOOT_CRYPT_CNT 0x%x", flash_crypt_cnt);
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ESP_LOGV(TAG, "EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT 0x%x", flash_crypt_wr_dis);
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_Static_assert(EFUSE_SPI_BOOT_CRYPT_CNT == 0x7, "assuming CRYPT_CNT is only 3 bits wide");
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if (cnt == 1 || cnt == 3 || cnt == 7) {
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if (__builtin_parity(flash_crypt_cnt) == 1) {
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/* Flash is already encrypted */
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int left;
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if (cnt == 7 /* || disabled */) {
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left = 0;
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} else if (cnt == 3) {
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left = 1;
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} else {
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left = 2;
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int left = (flash_crypt_cnt == 1) ? 1 : 0;
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if (flash_crypt_wr_dis) {
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left = 0; /* can't update FLASH_CRYPT_CNT, no more flashes */
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}
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ESP_LOGI(TAG, "flash encryption is enabled (%d plaintext flashes left)", left);
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return ESP_OK;
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}
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else {
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} else {
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#ifndef CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED
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/* Flash is not encrypted, so encrypt it! */
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return encrypt_flash_contents(cnt, flash_crypt_wr_dis);
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return encrypt_flash_contents(flash_crypt_cnt, flash_crypt_wr_dis);
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#else
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ESP_LOGE(TAG, "flash encryption is not enabled, and SECURE_FLASH_REQUIRE_ALREADY_ENABLED "
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"is set, refusing to boot.");
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return ESP_ERR_INVALID_STATE;
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#endif // CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED
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}
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}
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static esp_err_t initialise_flash_encryption(void)
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{
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/* Before first flash encryption pass, need to initialise key & crypto config */
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/* Find out if a key is already set */
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bool has_aes128 = ets_efuse_find_purpose(ETS_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY, NULL);
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bool has_aes256_1 = ets_efuse_find_purpose(ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1, NULL);
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bool has_aes256_2 = ets_efuse_find_purpose(ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2, NULL);
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bool has_key = has_aes128 || (has_aes256_1 && has_aes256_2);
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uint32_t dis_write = REG_GET_FIELD(EFUSE_PGM_DATA0_REG, EFUSE_WR_DIS);
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uint32_t dis_read = REG_GET_FIELD(EFUSE_PGM_DATA1_REG, EFUSE_RD_DIS);
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if (!has_key && (has_aes256_1 || has_aes256_2)) {
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ESP_LOGE(TAG, "Invalid efuse key blocks: Both AES-256 key blocks must be set.");
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return ESP_ERR_INVALID_STATE;
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}
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if (has_key) {
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ESP_LOGI(TAG, "Using pre-existing key in efuse");
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ESP_LOGE(TAG, "TODO: Check key is read & write protected"); // TODO
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} else {
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if(!has_key && !dis_write && !dis_read) {
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ESP_LOGI(TAG, "Generating new flash encryption key...");
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#ifdef CONFIG_SECURE_FLASH_ENCRYPTION_AES256
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const unsigned BLOCKS_NEEDED = 2;
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@ -102,14 +105,13 @@ static esp_err_t initialise_flash_encryption(void)
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}
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for(ets_efuse_purpose_t purpose = PURPOSE_START; purpose <= PURPOSE_END; purpose++) {
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uint32_t buf[8];
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uint32_t buf[8] = {0};
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bootloader_fill_random(buf, sizeof(buf));
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ets_efuse_block_t block = ets_efuse_find_unused_key_block();
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ESP_LOGD(TAG, "Writing ETS_EFUSE_BLOCK_KEY%d with purpose %d",
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ESP_LOGI(TAG, "Writing ETS_EFUSE_BLOCK_KEY%d with purpose %d",
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block - ETS_EFUSE_BLOCK_KEY0, purpose);
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bootloader_debug_buffer(buf, sizeof(buf), "Key content");
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int r = ets_efuse_write_key(block, purpose, buf, sizeof(buf));
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bzero(buf, sizeof(buf));
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if (r != 0) {
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ESP_LOGE(TAG, "Failed to write efuse block %d with purpose %d. Can't continue.");
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return ESP_FAIL;
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@ -117,9 +119,37 @@ static esp_err_t initialise_flash_encryption(void)
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}
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ESP_LOGD(TAG, "Key generation complete");
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} else {
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ESP_LOGI(TAG, "Using pre-existing key in efuse");
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}
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ESP_LOGE(TAG, "TODO: burn remaining security protection bits"); // TODO
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uint32_t new_wdata1 = 0;
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#ifndef CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC
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ESP_LOGI(TAG, "Disable UART bootloader encryption...");
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new_wdata1 |= EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT;
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#else
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ESP_LOGW(TAG, "Not disabling UART bootloader encryption");
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#endif
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#ifndef CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE
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ESP_LOGI(TAG, "Disable UART bootloader cache...");
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new_wdata1 |= (EFUSE_DIS_DOWNLOAD_DCACHE | EFUSE_DIS_DOWNLOAD_ICACHE);
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#else
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ESP_LOGW(TAG, "Not disabling UART bootloader cache - SECURITY COMPROMISED");
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#endif
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#ifndef CONFIG_SECURE_BOOT_ALLOW_JTAG
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ESP_LOGI(TAG, "Disable JTAG...");
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new_wdata1 |= EFUSE_HARD_DIS_JTAG;
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#else
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ESP_LOGW(TAG, "Not disabling JTAG - SECURITY COMPROMISED");
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#endif
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if (new_wdata1 != 0) {
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ets_efuse_clear_program_registers();
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REG_WRITE(EFUSE_PGM_DATA1_REG, new_wdata1);
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esp_efuse_burn_new_values();
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}
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return ESP_OK;
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}
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@ -156,10 +186,7 @@ static esp_err_t encrypt_flash_contents(uint32_t spi_boot_crypt_cnt, bool flash_
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return err;
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}
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/* Now iterate the just-loaded partition table, looking for entries to encrypt
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*/
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/* Go through each partition and encrypt if necessary */
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/* Now iterate the just-loaded partition table, looking for entries to encrypt */
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for (int i = 0; i < num_partitions; i++) {
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err = encrypt_partition(i, &partition_table[i]);
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if (err != ESP_OK) {
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@ -176,11 +203,18 @@ static esp_err_t encrypt_flash_contents(uint32_t spi_boot_crypt_cnt, bool flash_
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ESP_LOGD(TAG, "SPI_BOOT_CRYPT_CNT 0x%x -> 0x%x", spi_boot_crypt_cnt, new_spi_boot_crypt_cnt);
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ets_efuse_clear_program_registers();
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REG_SET_FIELD(EFUSE_PGM_DATA2_REG, EFUSE_SPI_BOOT_CRYPT_CNT, new_spi_boot_crypt_cnt);
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ets_efuse_program(ETS_EFUSE_BLOCK0);
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REG_SET_FIELD(EFUSE_PGM_DATA2_REG, EFUSE_SPI_BOOT_CRYPT_CNT, new_spi_boot_crypt_cnt);
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esp_efuse_burn_new_values();
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ESP_LOGI(TAG, "Flash encryption completed");
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//Secure SPI boot cnt after its update if needed.
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#ifdef CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE
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uint32_t spi_boot_cnt_wr_dis = 1;
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ESP_LOGI(TAG, "Write protecting SPI_CRYPT_CNT eFuse");
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esp_efuse_write_field_blob(ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT, &spi_boot_cnt_wr_dis, 1);
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#endif
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return ESP_OK;
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}
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@ -191,21 +225,30 @@ static esp_err_t encrypt_bootloader(void)
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/* Check for plaintext bootloader (verification will fail if it's already encrypted) */
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if (esp_image_verify_bootloader(&image_length) == ESP_OK) {
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ESP_LOGD(TAG, "bootloader is plaintext. Encrypting...");
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#if CONFIG_SECURE_BOOT_V2_ENABLED
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// Account for the signature sector after the bootloader
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image_length = (image_length + FLASH_SECTOR_SIZE - 1) & ~(FLASH_SECTOR_SIZE - 1);
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image_length += FLASH_SECTOR_SIZE;
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if (ESP_BOOTLOADER_OFFSET + image_length > ESP_PARTITION_TABLE_OFFSET) {
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ESP_LOGE(TAG, "Bootloader is too large to fit Secure Boot V2 signature sector and partition table (configured offset 0x%x)", ESP_PARTITION_TABLE_OFFSET);
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return ESP_ERR_INVALID_STATE;
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}
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#endif // CONFIG_SECURE_BOOT_V2_ENABLED
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err = esp_flash_encrypt_region(ESP_BOOTLOADER_OFFSET, image_length);
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if (err != ESP_OK) {
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ESP_LOGE(TAG, "Failed to encrypt bootloader in place: 0x%x", err);
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return err;
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}
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if (esp_secure_boot_enabled()) {
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// TODO: anything different for secure boot?
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}
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}
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ESP_LOGI(TAG, "bootloader encrypted successfully");
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return err;
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}
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else {
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ESP_LOGW(TAG, "no valid bootloader was found");
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return ESP_ERR_INVALID_STATE;
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}
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return ESP_OK;
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}
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static esp_err_t encrypt_and_load_partition_table(esp_partition_info_t *partition_table, int *num_partitions)
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@ -232,6 +275,7 @@ static esp_err_t encrypt_and_load_partition_table(esp_partition_info_t *partitio
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}
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/* Valid partition table loded */
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ESP_LOGI(TAG, "partition table encrypted and loaded successfully");
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return ESP_OK;
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}
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@ -20,6 +20,14 @@
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#include "esp_flash_encrypt.h"
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#include "esp_secure_boot.h"
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#if CONFIG_IDF_TARGET_ESP32
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#define CRYPT_CNT ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT
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#define WR_DIS_CRYPT_CNT ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT
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#elif CONFIG_IDF_TARGET_ESP32S2
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#define CRYPT_CNT ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT
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#define WR_DIS_CRYPT_CNT ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT
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#endif
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#ifndef BOOTLOADER_BUILD
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static const char *TAG = "flash_encrypt";
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@ -34,7 +42,7 @@ void esp_flash_encryption_init_checks()
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#ifdef CONFIG_SECURE_BOOT
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if (esp_secure_boot_enabled() && esp_flash_encryption_enabled()) {
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uint8_t flash_crypt_cnt_wr_dis = 0;
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esp_efuse_read_field_blob(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, &flash_crypt_cnt_wr_dis, 1);
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esp_efuse_read_field_blob(CRYPT_CNT, &flash_crypt_cnt_wr_dis, 1);
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if (!flash_crypt_cnt_wr_dis) {
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ESP_EARLY_LOGE(TAG, "Flash encryption & Secure Boot together requires FLASH_CRYPT_CNT efuse to be write protected. Fixing now...");
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esp_flash_write_protect_crypt_cnt();
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@ -62,22 +70,33 @@ void esp_flash_encryption_init_checks()
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void esp_flash_write_protect_crypt_cnt(void)
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{
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uint8_t flash_crypt_cnt_wr_dis = 0;
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esp_efuse_read_field_blob(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, &flash_crypt_cnt_wr_dis, 1);
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esp_efuse_read_field_blob(CRYPT_CNT, &flash_crypt_cnt_wr_dis, 1);
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if (!flash_crypt_cnt_wr_dis) {
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esp_efuse_write_field_cnt(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, 1);
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esp_efuse_write_field_cnt(WR_DIS_CRYPT_CNT, 1);
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}
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}
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esp_flash_enc_mode_t esp_get_flash_encryption_mode(void)
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{
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uint8_t efuse_flash_crypt_cnt_wr_protected = 0;
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#if CONFIG_IDF_TARGET_ESP32
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uint8_t dis_dl_enc = 0, dis_dl_dec = 0, dis_dl_cache = 0;
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#elif CONFIG_IDF_TARGET_ESP32S2
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uint8_t dis_dl_enc = 0;
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uint32_t dis_dl_cache = 0;
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#endif
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esp_flash_enc_mode_t mode = ESP_FLASH_ENC_MODE_DEVELOPMENT;
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if (esp_flash_encryption_enabled()) {
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/* Check if FLASH CRYPT CNT is write protected */
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esp_efuse_read_field_blob(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, &efuse_flash_crypt_cnt_wr_protected, 1);
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esp_efuse_read_field_blob(WR_DIS_CRYPT_CNT, &efuse_flash_crypt_cnt_wr_protected, 1);
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if (efuse_flash_crypt_cnt_wr_protected) {
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#if CONFIG_IDF_TARGET_ESP32
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esp_efuse_read_field_blob(ESP_EFUSE_DISABLE_DL_CACHE, &dis_dl_cache, 1);
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esp_efuse_read_field_blob(ESP_EFUSE_DISABLE_DL_ENCRYPT, &dis_dl_enc, 1);
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esp_efuse_read_field_blob(ESP_EFUSE_DISABLE_DL_DECRYPT, &dis_dl_dec, 1);
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@ -85,6 +104,15 @@ esp_flash_enc_mode_t esp_get_flash_encryption_mode(void)
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if ( dis_dl_cache && dis_dl_enc && dis_dl_dec ) {
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mode = ESP_FLASH_ENC_MODE_RELEASE;
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}
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#elif CONFIG_IDF_TARGET_ESP32S2
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esp_efuse_read_field_blob(ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT, &dis_dl_enc, 1);
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esp_efuse_read_field_blob(ESP_EFUSE_DIS_DOWNLOAD_ICACHE, &dis_dl_cache, 1);
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esp_efuse_read_field_blob(ESP_EFUSE_DIS_DOWNLOAD_DCACHE, &dis_dl_cache, 1);
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if (dis_dl_enc && (dis_dl_cache & (EFUSE_DIS_DOWNLOAD_DCACHE | EFUSE_DIS_DOWNLOAD_ICACHE))) {
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mode = ESP_FLASH_ENC_MODE_RELEASE;
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}
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#endif
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}
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} else {
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mode = ESP_FLASH_ENC_MODE_DISABLED;
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@ -23,6 +23,11 @@ static void example_read_write_flash(void);
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static const char* TAG = "example";
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#if CONFIG_IDF_TARGET_ESP32
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#define TARGET_CRYPT_CNT_EFUSE ESP_EFUSE_FLASH_CRYPT_CNT
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#elif CONFIG_IDF_TARGET_ESP32S2
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#define TARGET_CRYPT_CNT_EFUSE ESP_EFUSE_SPI_BOOT_CRYPT_CNT
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#endif
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void app_main(void)
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{
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@ -54,7 +59,7 @@ static void example_print_chip_info(void)
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static void example_print_flash_encryption_status(void)
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{
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uint32_t flash_crypt_cnt = 0;
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esp_efuse_read_field_blob(ESP_EFUSE_FLASH_CRYPT_CNT, &flash_crypt_cnt, 7);
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esp_efuse_read_field_blob(TARGET_CRYPT_CNT_EFUSE, &flash_crypt_cnt, 7);
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printf("FLASH_CRYPT_CNT eFuse value is %d\n", flash_crypt_cnt);
|
||||
|
||||
esp_flash_enc_mode_t mode = esp_get_flash_encryption_mode();
|
||||
|
|
|
|||
Loading…
Reference in a new issue