From 7635dce502b4de8fa8a32ae9a140e82fc3a72eb5 Mon Sep 17 00:00:00 2001 From: Felipe Neves Date: Wed, 11 Mar 2020 14:48:56 -0300 Subject: [PATCH] bootloader/flash_encrypt: added esp32s2 flash encryption code on build system and enabled example flash_enctryption: enabled flash encryption example on esp32s2 bootloader: raise WDT overflow value providing sufficient interval to encrypt app partition flash_ encrypt: Fixed the TODOs on flash encryption key generation for esp32s2 flash_encryption: added secure boot features to flash enctryption for esp32s2 bootloader: leave only esp32s2 compatible potentially insecure options on menuconfig. flash_encryption: removed secure boot version 1 from esp32s2 encryption code flash_encryption: added CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED option for esp32s2 flash_encryption: fixed the count of left plaintext flash flash_encryption: disable dcache and icache download when using encryption in release mode flash_encryption: add cache potentally insecure options for s2 chips flash_encryption: fixed bug which bricked some chips in relase mode --- components/bootloader/Kconfig.projbuild | 7 +- components/bootloader_support/CMakeLists.txt | 6 +- .../src/esp32s2/flash_encrypt.c | 120 ++++++++++++------ .../bootloader_support/src/flash_encrypt.c | 36 +++++- .../main/flash_encrypt_main.c | 7 +- 5 files changed, 125 insertions(+), 51 deletions(-) diff --git a/components/bootloader/Kconfig.projbuild b/components/bootloader/Kconfig.projbuild index 69db85cf3..5bd1a0f42 100644 --- a/components/bootloader/Kconfig.projbuild +++ b/components/bootloader/Kconfig.projbuild @@ -180,7 +180,8 @@ menu "Bootloader config" config BOOTLOADER_WDT_TIME_MS int "Timeout for RTC watchdog (ms)" depends on BOOTLOADER_WDT_ENABLE - default 9000 + default 9000 if IDF_TARGET_ESP32 + default 40000 if IDF_TARGET_ESP32S2 range 0 120000 help Verify that this parameter is correct and more then the execution time. @@ -601,7 +602,7 @@ menu "Security features" config SECURE_BOOT_ALLOW_ROM_BASIC bool "Leave ROM BASIC Interpreter available on reset" - depends on SECURE_BOOT_INSECURE || SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT + depends on SECURE_BOOT_INSECURE || SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT && IDF_TARGET_ESP32 default N help By default, the BASIC ROM Console starts on reset if no valid bootloader is @@ -664,7 +665,7 @@ menu "Security features" config SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC bool "Leave UART bootloader decryption enabled" - depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT + depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT && IDF_TARGET_ESP32 default N help If not set (default), the bootloader will permanently disable UART bootloader decryption access on diff --git a/components/bootloader_support/CMakeLists.txt b/components/bootloader_support/CMakeLists.txt index d120924ef..52078fd55 100644 --- a/components/bootloader_support/CMakeLists.txt +++ b/components/bootloader_support/CMakeLists.txt @@ -6,17 +6,13 @@ set(srcs "src/bootloader_random.c" "src/bootloader_utility.c" "src/esp_image_format.c" + "src/flash_encrypt.c" "src/flash_partitions.c" "src/flash_qio_mode.c" "src/bootloader_flash_config_${IDF_TARGET}.c" "src/bootloader_efuse_${IDF_TARGET}.c" ) -if(IDF_TARGET STREQUAL "esp32") - # Not supported on ESP32S2 yet - list(APPEND srcs "src/flash_encrypt.c") -endif() - if(BOOTLOADER_BUILD) set(include_dirs "include" "include_bootloader") set(priv_requires micro-ecc spi_flash efuse) diff --git a/components/bootloader_support/src/esp32s2/flash_encrypt.c b/components/bootloader_support/src/esp32s2/flash_encrypt.c index 3e6309105..3204ebaa5 100644 --- a/components/bootloader_support/src/esp32s2/flash_encrypt.c +++ b/components/bootloader_support/src/esp32s2/flash_encrypt.c @@ -25,6 +25,8 @@ #include "esp32s2/rom/secure_boot.h" #include "esp32s2/rom/cache.h" #include "esp32s2/rom/efuse.h" +#include "esp_efuse.h" +#include "esp_efuse_table.h" static const char *TAG = "flash_encrypt"; @@ -38,53 +40,54 @@ static esp_err_t encrypt_partition(int index, const esp_partition_info_t *partit esp_err_t esp_flash_encrypt_check_and_update(void) { // TODO: not clear why this is read from DATA1 and written to PGM_DATA2 - uint32_t cnt = REG_GET_FIELD(EFUSE_RD_REPEAT_DATA1_REG, EFUSE_SPI_BOOT_CRYPT_CNT); - ESP_LOGV(TAG, "SPI_BOOT_CRYPT_CNT 0x%x", cnt); + uint8_t flash_crypt_wr_dis = 0; + uint32_t flash_crypt_cnt = REG_GET_FIELD(EFUSE_RD_REPEAT_DATA1_REG, EFUSE_SPI_BOOT_CRYPT_CNT); + esp_efuse_read_field_blob(ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT, &flash_crypt_wr_dis, 1); - bool flash_crypt_wr_dis = false; // TODO: check if CRYPT_CNT is write disabled + ESP_LOGV(TAG, "SPI_BOOT_CRYPT_CNT 0x%x", flash_crypt_cnt); + ESP_LOGV(TAG, "EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT 0x%x", flash_crypt_wr_dis); _Static_assert(EFUSE_SPI_BOOT_CRYPT_CNT == 0x7, "assuming CRYPT_CNT is only 3 bits wide"); - if (cnt == 1 || cnt == 3 || cnt == 7) { + if (__builtin_parity(flash_crypt_cnt) == 1) { /* Flash is already encrypted */ - int left; - if (cnt == 7 /* || disabled */) { - left = 0; - } else if (cnt == 3) { - left = 1; - } else { - left = 2; + int left = (flash_crypt_cnt == 1) ? 1 : 0; + if (flash_crypt_wr_dis) { + left = 0; /* can't update FLASH_CRYPT_CNT, no more flashes */ } ESP_LOGI(TAG, "flash encryption is enabled (%d plaintext flashes left)", left); return ESP_OK; - } - else { + } else { + +#ifndef CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED /* Flash is not encrypted, so encrypt it! */ - return encrypt_flash_contents(cnt, flash_crypt_wr_dis); + return encrypt_flash_contents(flash_crypt_cnt, flash_crypt_wr_dis); +#else + ESP_LOGE(TAG, "flash encryption is not enabled, and SECURE_FLASH_REQUIRE_ALREADY_ENABLED " + "is set, refusing to boot."); + return ESP_ERR_INVALID_STATE; +#endif // CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED + } } static esp_err_t initialise_flash_encryption(void) { /* Before first flash encryption pass, need to initialise key & crypto config */ - /* Find out if a key is already set */ bool has_aes128 = ets_efuse_find_purpose(ETS_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY, NULL); bool has_aes256_1 = ets_efuse_find_purpose(ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1, NULL); bool has_aes256_2 = ets_efuse_find_purpose(ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2, NULL); - bool has_key = has_aes128 || (has_aes256_1 && has_aes256_2); + uint32_t dis_write = REG_GET_FIELD(EFUSE_PGM_DATA0_REG, EFUSE_WR_DIS); + uint32_t dis_read = REG_GET_FIELD(EFUSE_PGM_DATA1_REG, EFUSE_RD_DIS); if (!has_key && (has_aes256_1 || has_aes256_2)) { ESP_LOGE(TAG, "Invalid efuse key blocks: Both AES-256 key blocks must be set."); return ESP_ERR_INVALID_STATE; } - if (has_key) { - ESP_LOGI(TAG, "Using pre-existing key in efuse"); - - ESP_LOGE(TAG, "TODO: Check key is read & write protected"); // TODO - } else { + if(!has_key && !dis_write && !dis_read) { ESP_LOGI(TAG, "Generating new flash encryption key..."); #ifdef CONFIG_SECURE_FLASH_ENCRYPTION_AES256 const unsigned BLOCKS_NEEDED = 2; @@ -102,14 +105,13 @@ static esp_err_t initialise_flash_encryption(void) } for(ets_efuse_purpose_t purpose = PURPOSE_START; purpose <= PURPOSE_END; purpose++) { - uint32_t buf[8]; + uint32_t buf[8] = {0}; bootloader_fill_random(buf, sizeof(buf)); ets_efuse_block_t block = ets_efuse_find_unused_key_block(); - ESP_LOGD(TAG, "Writing ETS_EFUSE_BLOCK_KEY%d with purpose %d", + ESP_LOGI(TAG, "Writing ETS_EFUSE_BLOCK_KEY%d with purpose %d", block - ETS_EFUSE_BLOCK_KEY0, purpose); bootloader_debug_buffer(buf, sizeof(buf), "Key content"); int r = ets_efuse_write_key(block, purpose, buf, sizeof(buf)); - bzero(buf, sizeof(buf)); if (r != 0) { ESP_LOGE(TAG, "Failed to write efuse block %d with purpose %d. Can't continue."); return ESP_FAIL; @@ -117,9 +119,37 @@ static esp_err_t initialise_flash_encryption(void) } ESP_LOGD(TAG, "Key generation complete"); + + } else { + ESP_LOGI(TAG, "Using pre-existing key in efuse"); } - ESP_LOGE(TAG, "TODO: burn remaining security protection bits"); // TODO + uint32_t new_wdata1 = 0; + +#ifndef CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC + ESP_LOGI(TAG, "Disable UART bootloader encryption..."); + new_wdata1 |= EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT; +#else + ESP_LOGW(TAG, "Not disabling UART bootloader encryption"); +#endif +#ifndef CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE + ESP_LOGI(TAG, "Disable UART bootloader cache..."); + new_wdata1 |= (EFUSE_DIS_DOWNLOAD_DCACHE | EFUSE_DIS_DOWNLOAD_ICACHE); +#else + ESP_LOGW(TAG, "Not disabling UART bootloader cache - SECURITY COMPROMISED"); +#endif +#ifndef CONFIG_SECURE_BOOT_ALLOW_JTAG + ESP_LOGI(TAG, "Disable JTAG..."); + new_wdata1 |= EFUSE_HARD_DIS_JTAG; +#else + ESP_LOGW(TAG, "Not disabling JTAG - SECURITY COMPROMISED"); +#endif + + if (new_wdata1 != 0) { + ets_efuse_clear_program_registers(); + REG_WRITE(EFUSE_PGM_DATA1_REG, new_wdata1); + esp_efuse_burn_new_values(); + } return ESP_OK; } @@ -156,10 +186,7 @@ static esp_err_t encrypt_flash_contents(uint32_t spi_boot_crypt_cnt, bool flash_ return err; } - /* Now iterate the just-loaded partition table, looking for entries to encrypt - */ - - /* Go through each partition and encrypt if necessary */ + /* Now iterate the just-loaded partition table, looking for entries to encrypt */ for (int i = 0; i < num_partitions; i++) { err = encrypt_partition(i, &partition_table[i]); if (err != ESP_OK) { @@ -176,11 +203,18 @@ static esp_err_t encrypt_flash_contents(uint32_t spi_boot_crypt_cnt, bool flash_ ESP_LOGD(TAG, "SPI_BOOT_CRYPT_CNT 0x%x -> 0x%x", spi_boot_crypt_cnt, new_spi_boot_crypt_cnt); ets_efuse_clear_program_registers(); - REG_SET_FIELD(EFUSE_PGM_DATA2_REG, EFUSE_SPI_BOOT_CRYPT_CNT, new_spi_boot_crypt_cnt); - ets_efuse_program(ETS_EFUSE_BLOCK0); + REG_SET_FIELD(EFUSE_PGM_DATA2_REG, EFUSE_SPI_BOOT_CRYPT_CNT, new_spi_boot_crypt_cnt); + esp_efuse_burn_new_values(); ESP_LOGI(TAG, "Flash encryption completed"); + //Secure SPI boot cnt after its update if needed. +#ifdef CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE + uint32_t spi_boot_cnt_wr_dis = 1; + ESP_LOGI(TAG, "Write protecting SPI_CRYPT_CNT eFuse"); + esp_efuse_write_field_blob(ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT, &spi_boot_cnt_wr_dis, 1); +#endif + return ESP_OK; } @@ -191,21 +225,30 @@ static esp_err_t encrypt_bootloader(void) /* Check for plaintext bootloader (verification will fail if it's already encrypted) */ if (esp_image_verify_bootloader(&image_length) == ESP_OK) { ESP_LOGD(TAG, "bootloader is plaintext. Encrypting..."); + +#if CONFIG_SECURE_BOOT_V2_ENABLED + // Account for the signature sector after the bootloader + image_length = (image_length + FLASH_SECTOR_SIZE - 1) & ~(FLASH_SECTOR_SIZE - 1); + image_length += FLASH_SECTOR_SIZE; + if (ESP_BOOTLOADER_OFFSET + image_length > ESP_PARTITION_TABLE_OFFSET) { + ESP_LOGE(TAG, "Bootloader is too large to fit Secure Boot V2 signature sector and partition table (configured offset 0x%x)", ESP_PARTITION_TABLE_OFFSET); + return ESP_ERR_INVALID_STATE; + } +#endif // CONFIG_SECURE_BOOT_V2_ENABLED + err = esp_flash_encrypt_region(ESP_BOOTLOADER_OFFSET, image_length); if (err != ESP_OK) { ESP_LOGE(TAG, "Failed to encrypt bootloader in place: 0x%x", err); return err; - } - - if (esp_secure_boot_enabled()) { - // TODO: anything different for secure boot? - } + } + + ESP_LOGI(TAG, "bootloader encrypted successfully"); + return err; } else { ESP_LOGW(TAG, "no valid bootloader was found"); + return ESP_ERR_INVALID_STATE; } - - return ESP_OK; } static esp_err_t encrypt_and_load_partition_table(esp_partition_info_t *partition_table, int *num_partitions) @@ -232,6 +275,7 @@ static esp_err_t encrypt_and_load_partition_table(esp_partition_info_t *partitio } /* Valid partition table loded */ + ESP_LOGI(TAG, "partition table encrypted and loaded successfully"); return ESP_OK; } diff --git a/components/bootloader_support/src/flash_encrypt.c b/components/bootloader_support/src/flash_encrypt.c index 98438bf12..0a94621c4 100644 --- a/components/bootloader_support/src/flash_encrypt.c +++ b/components/bootloader_support/src/flash_encrypt.c @@ -20,6 +20,14 @@ #include "esp_flash_encrypt.h" #include "esp_secure_boot.h" +#if CONFIG_IDF_TARGET_ESP32 +#define CRYPT_CNT ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT +#define WR_DIS_CRYPT_CNT ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT +#elif CONFIG_IDF_TARGET_ESP32S2 +#define CRYPT_CNT ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT +#define WR_DIS_CRYPT_CNT ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT +#endif + #ifndef BOOTLOADER_BUILD static const char *TAG = "flash_encrypt"; @@ -34,7 +42,7 @@ void esp_flash_encryption_init_checks() #ifdef CONFIG_SECURE_BOOT if (esp_secure_boot_enabled() && esp_flash_encryption_enabled()) { uint8_t flash_crypt_cnt_wr_dis = 0; - esp_efuse_read_field_blob(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, &flash_crypt_cnt_wr_dis, 1); + esp_efuse_read_field_blob(CRYPT_CNT, &flash_crypt_cnt_wr_dis, 1); if (!flash_crypt_cnt_wr_dis) { ESP_EARLY_LOGE(TAG, "Flash encryption & Secure Boot together requires FLASH_CRYPT_CNT efuse to be write protected. Fixing now..."); esp_flash_write_protect_crypt_cnt(); @@ -62,22 +70,33 @@ void esp_flash_encryption_init_checks() void esp_flash_write_protect_crypt_cnt(void) { uint8_t flash_crypt_cnt_wr_dis = 0; - esp_efuse_read_field_blob(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, &flash_crypt_cnt_wr_dis, 1); + + esp_efuse_read_field_blob(CRYPT_CNT, &flash_crypt_cnt_wr_dis, 1); + if (!flash_crypt_cnt_wr_dis) { - esp_efuse_write_field_cnt(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, 1); + esp_efuse_write_field_cnt(WR_DIS_CRYPT_CNT, 1); } } esp_flash_enc_mode_t esp_get_flash_encryption_mode(void) { uint8_t efuse_flash_crypt_cnt_wr_protected = 0; +#if CONFIG_IDF_TARGET_ESP32 uint8_t dis_dl_enc = 0, dis_dl_dec = 0, dis_dl_cache = 0; +#elif CONFIG_IDF_TARGET_ESP32S2 + uint8_t dis_dl_enc = 0; + uint32_t dis_dl_cache = 0; +#endif + esp_flash_enc_mode_t mode = ESP_FLASH_ENC_MODE_DEVELOPMENT; if (esp_flash_encryption_enabled()) { /* Check if FLASH CRYPT CNT is write protected */ - esp_efuse_read_field_blob(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, &efuse_flash_crypt_cnt_wr_protected, 1); + esp_efuse_read_field_blob(WR_DIS_CRYPT_CNT, &efuse_flash_crypt_cnt_wr_protected, 1); + if (efuse_flash_crypt_cnt_wr_protected) { + +#if CONFIG_IDF_TARGET_ESP32 esp_efuse_read_field_blob(ESP_EFUSE_DISABLE_DL_CACHE, &dis_dl_cache, 1); esp_efuse_read_field_blob(ESP_EFUSE_DISABLE_DL_ENCRYPT, &dis_dl_enc, 1); esp_efuse_read_field_blob(ESP_EFUSE_DISABLE_DL_DECRYPT, &dis_dl_dec, 1); @@ -85,6 +104,15 @@ esp_flash_enc_mode_t esp_get_flash_encryption_mode(void) if ( dis_dl_cache && dis_dl_enc && dis_dl_dec ) { mode = ESP_FLASH_ENC_MODE_RELEASE; } +#elif CONFIG_IDF_TARGET_ESP32S2 + esp_efuse_read_field_blob(ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT, &dis_dl_enc, 1); + esp_efuse_read_field_blob(ESP_EFUSE_DIS_DOWNLOAD_ICACHE, &dis_dl_cache, 1); + esp_efuse_read_field_blob(ESP_EFUSE_DIS_DOWNLOAD_DCACHE, &dis_dl_cache, 1); + + if (dis_dl_enc && (dis_dl_cache & (EFUSE_DIS_DOWNLOAD_DCACHE | EFUSE_DIS_DOWNLOAD_ICACHE))) { + mode = ESP_FLASH_ENC_MODE_RELEASE; + } +#endif } } else { mode = ESP_FLASH_ENC_MODE_DISABLED; diff --git a/examples/security/flash_encryption/main/flash_encrypt_main.c b/examples/security/flash_encryption/main/flash_encrypt_main.c index ae367e94c..b26c185c0 100644 --- a/examples/security/flash_encryption/main/flash_encrypt_main.c +++ b/examples/security/flash_encryption/main/flash_encrypt_main.c @@ -23,6 +23,11 @@ static void example_read_write_flash(void); static const char* TAG = "example"; +#if CONFIG_IDF_TARGET_ESP32 +#define TARGET_CRYPT_CNT_EFUSE ESP_EFUSE_FLASH_CRYPT_CNT +#elif CONFIG_IDF_TARGET_ESP32S2 +#define TARGET_CRYPT_CNT_EFUSE ESP_EFUSE_SPI_BOOT_CRYPT_CNT +#endif void app_main(void) { @@ -54,7 +59,7 @@ static void example_print_chip_info(void) static void example_print_flash_encryption_status(void) { uint32_t flash_crypt_cnt = 0; - esp_efuse_read_field_blob(ESP_EFUSE_FLASH_CRYPT_CNT, &flash_crypt_cnt, 7); + esp_efuse_read_field_blob(TARGET_CRYPT_CNT_EFUSE, &flash_crypt_cnt, 7); printf("FLASH_CRYPT_CNT eFuse value is %d\n", flash_crypt_cnt); esp_flash_enc_mode_t mode = esp_get_flash_encryption_mode();