doc: update chip features in getting started
Fixed number of cores for ESP32 and ESP32S2 being wrong. Updated S2 to reflect that we have to ULP coprocessors Closes IDFGH-3616 Closes https://github.com/espressif/esp-idf/issues/5556
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@ -17,15 +17,23 @@ Introduction
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{IDF_TARGET_NAME} is a system on a chip that integrates the following features:
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{IDF_TARGET_NAME} is a system on a chip that integrates the following features:
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.. list::
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.. only:: esp32
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* Wi-Fi (2.4 GHz band)
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* Wi-Fi (2.4 GHz band)
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:SOC_BT_SUPPORTED: * Bluetooth
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* Bluetooth
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:CONFIG_FREERTOS_UNICORE: * Dual high performance cores
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* Dual high performance cores
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* Ultra Low Power co-processor
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* Ultra Low Power co-processor
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* Multiple peripherals
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* Multiple peripherals
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:esp32s2: * Built-in security hardware
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:esp32s2: * USB OTG interface
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.. only:: esp32s2
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* Wi-Fi (2.4 GHz band)
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* High performance single-core
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* Ultra Low Power co-processor running either RISC-V or FSM core
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* Multiple peripherals
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* Built-in security hardware
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* USB OTG interface
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Powered by 40 nm technology, {IDF_TARGET_NAME} provides a robust, highly integrated platform, which helps meet the continuous demands for efficient power usage, compact design, security, high performance, and reliability.
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Powered by 40 nm technology, {IDF_TARGET_NAME} provides a robust, highly integrated platform, which helps meet the continuous demands for efficient power usage, compact design, security, high performance, and reliability.
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