From 207cbabc5151c3e20ee38574bb29ab9210cdbec2 Mon Sep 17 00:00:00 2001 From: Marius Vikhammer Date: Thu, 9 Jul 2020 11:37:16 +0800 Subject: [PATCH] doc: update chip features in getting started Fixed number of cores for ESP32 and ESP32S2 being wrong. Updated S2 to reflect that we have to ULP coprocessors Closes IDFGH-3616 Closes https://github.com/espressif/esp-idf/issues/5556 --- docs/en/get-started/index.rst | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/docs/en/get-started/index.rst b/docs/en/get-started/index.rst index 23cfbcf37..490990736 100644 --- a/docs/en/get-started/index.rst +++ b/docs/en/get-started/index.rst @@ -17,15 +17,23 @@ Introduction {IDF_TARGET_NAME} is a system on a chip that integrates the following features: -.. list:: +.. only:: esp32 * Wi-Fi (2.4 GHz band) - :SOC_BT_SUPPORTED: * Bluetooth - :CONFIG_FREERTOS_UNICORE: * Dual high performance cores + * Bluetooth + * Dual high performance cores * Ultra Low Power co-processor * Multiple peripherals - :esp32s2: * Built-in security hardware - :esp32s2: * USB OTG interface + + +.. only:: esp32s2 + + * Wi-Fi (2.4 GHz band) + * High performance single-core + * Ultra Low Power co-processor running either RISC-V or FSM core + * Multiple peripherals + * Built-in security hardware + * USB OTG interface Powered by 40 nm technology, {IDF_TARGET_NAME} provides a robust, highly integrated platform, which helps meet the continuous demands for efficient power usage, compact design, security, high performance, and reliability.