2019-08-08 03:44:24 +00:00
|
|
|
set(srcs
|
2019-06-21 06:29:32 +00:00
|
|
|
"can.c"
|
2019-04-28 07:38:23 +00:00
|
|
|
"gpio.c"
|
|
|
|
|
"i2c.c"
|
|
|
|
|
"i2s.c"
|
|
|
|
|
"ledc.c"
|
|
|
|
|
"pcnt.c"
|
|
|
|
|
"periph_ctrl.c"
|
|
|
|
|
"rmt.c"
|
|
|
|
|
"rtc_module.c"
|
|
|
|
|
"sdspi_crc.c"
|
|
|
|
|
"sdspi_host.c"
|
|
|
|
|
"sdspi_transaction.c"
|
|
|
|
|
"sigmadelta.c"
|
|
|
|
|
"spi_common.c"
|
|
|
|
|
"spi_master.c"
|
|
|
|
|
"spi_slave.c"
|
|
|
|
|
"timer.c"
|
|
|
|
|
"uart.c")
|
2019-06-12 07:53:57 +00:00
|
|
|
|
2019-08-16 09:06:34 +00:00
|
|
|
set(includes "include")
|
|
|
|
|
|
2019-08-18 05:27:09 +00:00
|
|
|
if(IDF_TARGET STREQUAL "esp32")
|
2019-06-06 09:00:03 +00:00
|
|
|
# SDMMC and MCPWM are in ESP32 only.
|
2019-08-08 03:44:24 +00:00
|
|
|
list(APPEND srcs "mcpwm.c"
|
|
|
|
|
"sdio_slave.c"
|
|
|
|
|
"sdmmc_host.c"
|
|
|
|
|
"sdmmc_transaction.c")
|
2019-06-12 07:53:57 +00:00
|
|
|
endif()
|
|
|
|
|
|
2019-08-18 05:27:09 +00:00
|
|
|
if(IDF_TARGET STREQUAL "esp32s2beta")
|
2019-08-16 09:06:34 +00:00
|
|
|
list(APPEND srcs "esp32s2beta/rtc_tempsensor.c"
|
|
|
|
|
"esp32s2beta/rtc_touchpad.c")
|
|
|
|
|
# currently only S2 beta has its own target-specific includes
|
|
|
|
|
list(APPEND includes "esp32s2beta/include")
|
2019-06-20 08:13:47 +00:00
|
|
|
endif()
|
|
|
|
|
|
2019-04-28 07:38:23 +00:00
|
|
|
idf_component_register(SRCS "${srcs}"
|
2019-08-16 09:06:34 +00:00
|
|
|
INCLUDE_DIRS ${includes}
|
2019-04-28 07:38:23 +00:00
|
|
|
PRIV_INCLUDE_DIRS "include/driver"
|
|
|
|
|
REQUIRES esp_ringbuf soc) #cannot totally hide soc headers, since there are a lot arguments in the driver are chip-dependent
|
2019-03-08 06:57:00 +00:00
|
|
|
|
2019-11-05 11:20:26 +00:00
|
|
|
# uses C11 atomic feature
|
|
|
|
|
set_source_files_properties(spi_master.c PROPERTIES COMPILE_FLAGS -std=gnu11)
|
