2016-08-17 15:08:22 +00:00
|
|
|
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
|
|
|
|
//
|
|
|
|
// Licensed under the Apache License, Version 2.0 (the "License");
|
|
|
|
// you may not use this file except in compliance with the License.
|
|
|
|
// You may obtain a copy of the License at
|
|
|
|
|
|
|
|
// http://www.apache.org/licenses/LICENSE-2.0
|
|
|
|
//
|
|
|
|
// Unless required by applicable law or agreed to in writing, software
|
|
|
|
// distributed under the License is distributed on an "AS IS" BASIS,
|
|
|
|
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
|
|
// See the License for the specific language governing permissions and
|
|
|
|
// limitations under the License.
|
|
|
|
#include <stdint.h>
|
|
|
|
#include <string.h>
|
|
|
|
|
|
|
|
#include "esp_attr.h"
|
|
|
|
#include "esp_err.h"
|
|
|
|
|
|
|
|
#include "rom/ets_sys.h"
|
2016-09-13 03:48:28 +00:00
|
|
|
#include "rom/uart.h"
|
2016-10-13 00:46:51 +00:00
|
|
|
#include "rom/rtc.h"
|
2016-11-04 04:18:57 +00:00
|
|
|
#include "rom/cache.h"
|
2016-08-17 15:08:22 +00:00
|
|
|
|
2016-09-14 17:59:42 +00:00
|
|
|
#include "soc/cpu.h"
|
2016-08-17 15:08:22 +00:00
|
|
|
#include "soc/dport_reg.h"
|
|
|
|
#include "soc/io_mux_reg.h"
|
2016-09-14 17:59:42 +00:00
|
|
|
#include "soc/rtc_cntl_reg.h"
|
2016-12-07 17:41:27 +00:00
|
|
|
#include "soc/timer_group_reg.h"
|
2016-08-17 15:08:22 +00:00
|
|
|
|
2016-12-14 06:20:01 +00:00
|
|
|
#include "driver/rtc_io.h"
|
|
|
|
|
2016-08-17 15:08:22 +00:00
|
|
|
#include "freertos/FreeRTOS.h"
|
|
|
|
#include "freertos/task.h"
|
|
|
|
#include "freertos/semphr.h"
|
|
|
|
#include "freertos/queue.h"
|
|
|
|
#include "freertos/portmacro.h"
|
|
|
|
|
|
|
|
#include "tcpip_adapter.h"
|
|
|
|
|
2017-01-25 09:25:50 +00:00
|
|
|
#include "esp_heap_alloc_caps.h"
|
2016-08-17 15:08:22 +00:00
|
|
|
#include "sdkconfig.h"
|
|
|
|
#include "esp_system.h"
|
|
|
|
#include "esp_spi_flash.h"
|
|
|
|
#include "nvs_flash.h"
|
|
|
|
#include "esp_event.h"
|
2016-09-12 10:54:45 +00:00
|
|
|
#include "esp_spi_flash.h"
|
|
|
|
#include "esp_ipc.h"
|
2016-10-27 04:37:19 +00:00
|
|
|
#include "esp_crosscore_int.h"
|
2016-09-14 16:53:33 +00:00
|
|
|
#include "esp_log.h"
|
2016-10-25 14:16:08 +00:00
|
|
|
#include "esp_vfs_dev.h"
|
2016-10-25 14:12:07 +00:00
|
|
|
#include "esp_newlib.h"
|
2016-10-21 09:59:57 +00:00
|
|
|
#include "esp_brownout.h"
|
2016-10-21 11:30:29 +00:00
|
|
|
#include "esp_int_wdt.h"
|
|
|
|
#include "esp_task_wdt.h"
|
2016-11-15 10:36:18 +00:00
|
|
|
#include "esp_phy_init.h"
|
2016-11-24 11:57:47 +00:00
|
|
|
#include "esp_coexist.h"
|
2016-12-21 23:56:23 +00:00
|
|
|
#include "esp_core_dump.h"
|
2016-10-17 04:18:17 +00:00
|
|
|
#include "trax.h"
|
2016-10-21 09:59:57 +00:00
|
|
|
|
2017-02-20 11:33:17 +00:00
|
|
|
#include "esp_psram.h"
|
2017-02-07 09:58:01 +00:00
|
|
|
|
2016-10-27 08:17:28 +00:00
|
|
|
#define STRINGIFY(s) STRINGIFY2(s)
|
|
|
|
#define STRINGIFY2(s) #s
|
|
|
|
|
2016-09-26 04:29:00 +00:00
|
|
|
void start_cpu0(void) __attribute__((weak, alias("start_cpu0_default")));
|
|
|
|
void start_cpu0_default(void) IRAM_ATTR;
|
2016-09-23 07:02:17 +00:00
|
|
|
#if !CONFIG_FREERTOS_UNICORE
|
2016-09-26 04:29:00 +00:00
|
|
|
static void IRAM_ATTR call_start_cpu1();
|
2016-09-26 07:58:58 +00:00
|
|
|
void start_cpu1(void) __attribute__((weak, alias("start_cpu1_default")));
|
2016-09-26 06:35:09 +00:00
|
|
|
void start_cpu1_default(void) IRAM_ATTR;
|
2016-09-23 07:02:17 +00:00
|
|
|
static bool app_cpu_started = false;
|
2016-09-26 06:35:09 +00:00
|
|
|
#endif //!CONFIG_FREERTOS_UNICORE
|
|
|
|
|
2016-09-26 04:29:00 +00:00
|
|
|
static void do_global_ctors(void);
|
|
|
|
static void main_task(void* args);
|
2016-09-27 09:30:43 +00:00
|
|
|
extern void app_main(void);
|
2016-08-17 15:08:22 +00:00
|
|
|
|
|
|
|
extern int _bss_start;
|
|
|
|
extern int _bss_end;
|
2016-10-13 00:46:51 +00:00
|
|
|
extern int _rtc_bss_start;
|
|
|
|
extern int _rtc_bss_end;
|
2016-08-17 15:08:22 +00:00
|
|
|
extern int _init_start;
|
2016-09-14 17:59:42 +00:00
|
|
|
extern void (*__init_array_start)(void);
|
|
|
|
extern void (*__init_array_end)(void);
|
|
|
|
extern volatile int port_xSchedulerRunning[2];
|
2016-08-17 15:08:22 +00:00
|
|
|
|
2016-09-14 16:53:33 +00:00
|
|
|
static const char* TAG = "cpu_start";
|
2016-08-17 15:08:22 +00:00
|
|
|
|
2017-02-21 03:48:42 +00:00
|
|
|
|
2017-02-21 06:00:05 +00:00
|
|
|
#if CONFIG_MEMMAP_SMP
|
2017-02-21 03:48:42 +00:00
|
|
|
#define PSRAM_MODE PSRAM_VADDR_MODE_EVENODD
|
2017-02-21 06:00:05 +00:00
|
|
|
#else
|
|
|
|
#define PSRAM_MODE PSRAM_VADDR_MODE_NORMAL
|
2017-02-21 03:48:42 +00:00
|
|
|
#endif
|
|
|
|
|
2016-08-17 15:08:22 +00:00
|
|
|
/*
|
2016-09-14 17:59:42 +00:00
|
|
|
* We arrive here after the bootloader finished loading the program from flash. The hardware is mostly uninitialized,
|
|
|
|
* and the app CPU is in reset. We do have a stack, so we can do the initialization in C.
|
|
|
|
*/
|
2016-08-17 15:08:22 +00:00
|
|
|
|
2016-09-26 04:29:00 +00:00
|
|
|
void IRAM_ATTR call_start_cpu0()
|
2016-09-14 17:59:42 +00:00
|
|
|
{
|
|
|
|
cpu_configure_region_protection();
|
|
|
|
|
|
|
|
//Move exception vectors to IRAM
|
|
|
|
asm volatile (\
|
|
|
|
"wsr %0, vecbase\n" \
|
|
|
|
::"r"(&_init_start));
|
|
|
|
|
|
|
|
memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));
|
|
|
|
|
2016-10-13 00:46:51 +00:00
|
|
|
/* Unless waking from deep sleep (implying RTC memory is intact), clear RTC bss */
|
|
|
|
if (rtc_get_reset_reason(0) != DEEPSLEEP_RESET) {
|
|
|
|
memset(&_rtc_bss_start, 0, (&_rtc_bss_end - &_rtc_bss_start) * sizeof(_rtc_bss_start));
|
|
|
|
}
|
|
|
|
|
2017-02-21 03:48:42 +00:00
|
|
|
#if CONFIG_MEMMAP_SPIRAM_ENABLE
|
|
|
|
if ( psram_enable(PSRAM_CACHE_F40M_S40M, PSRAM_MODE) != ESP_OK) {
|
|
|
|
ESP_EARLY_LOGE(TAG, "PSRAM enabled but initialization failed. Bailing out.");
|
|
|
|
abort();
|
|
|
|
}
|
|
|
|
#endif
|
2016-09-14 17:59:42 +00:00
|
|
|
|
|
|
|
ESP_EARLY_LOGI(TAG, "Pro cpu up.");
|
2016-08-24 08:21:28 +00:00
|
|
|
|
2017-02-21 03:48:42 +00:00
|
|
|
|
2016-09-26 06:35:09 +00:00
|
|
|
#if !CONFIG_FREERTOS_UNICORE
|
2016-09-26 04:29:00 +00:00
|
|
|
ESP_EARLY_LOGI(TAG, "Starting app cpu, entry point is %p", call_start_cpu1);
|
2016-11-04 04:18:57 +00:00
|
|
|
//Flush and enable icache for APP CPU
|
2017-02-21 03:48:42 +00:00
|
|
|
|
|
|
|
CLEAR_PERI_REG_MASK(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DRAM1);
|
|
|
|
|
|
|
|
cache_sram_mmu_set( 1, 0, 0x3f800000, 0, 32, 128 );
|
2016-11-04 04:18:57 +00:00
|
|
|
Cache_Flush(1);
|
|
|
|
Cache_Read_Enable(1);
|
2017-02-20 11:33:17 +00:00
|
|
|
|
2016-11-21 09:15:37 +00:00
|
|
|
esp_cpu_unstall(1);
|
2016-10-27 03:17:24 +00:00
|
|
|
//Enable clock gating and reset the app cpu.
|
2016-09-14 18:17:08 +00:00
|
|
|
SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN);
|
|
|
|
CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_C_REG, DPORT_APPCPU_RUNSTALL);
|
|
|
|
SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_A_REG, DPORT_APPCPU_RESETTING);
|
|
|
|
CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_A_REG, DPORT_APPCPU_RESETTING);
|
2016-09-26 04:29:00 +00:00
|
|
|
ets_set_appcpu_boot_addr((uint32_t)call_start_cpu1);
|
2016-08-17 15:08:22 +00:00
|
|
|
|
2017-02-21 03:48:42 +00:00
|
|
|
|
2016-09-14 17:59:42 +00:00
|
|
|
while (!app_cpu_started) {
|
|
|
|
ets_delay_us(100);
|
|
|
|
}
|
2016-08-17 15:08:22 +00:00
|
|
|
#else
|
2016-09-14 17:59:42 +00:00
|
|
|
ESP_EARLY_LOGI(TAG, "Single core mode");
|
2016-09-14 18:17:08 +00:00
|
|
|
CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN);
|
2016-08-17 15:08:22 +00:00
|
|
|
#endif
|
2017-01-25 09:25:50 +00:00
|
|
|
|
|
|
|
/* Initialize heap allocator. WARNING: This *needs* to happen *after* the app cpu has booted.
|
|
|
|
If the heap allocator is initialized first, it will put free memory linked list items into
|
|
|
|
memory also used by the ROM. Starting the app cpu will let its ROM initialize that memory,
|
|
|
|
corrupting those linked lists. Initializing the allocator *after* the app cpu has booted
|
|
|
|
works around this problem. */
|
|
|
|
heap_alloc_caps_init();
|
|
|
|
|
2016-09-14 17:59:42 +00:00
|
|
|
ESP_EARLY_LOGI(TAG, "Pro cpu start user code");
|
2016-09-26 04:29:00 +00:00
|
|
|
start_cpu0();
|
2016-08-17 15:08:22 +00:00
|
|
|
}
|
|
|
|
|
2016-09-23 07:02:17 +00:00
|
|
|
#if !CONFIG_FREERTOS_UNICORE
|
2016-09-26 04:29:00 +00:00
|
|
|
void IRAM_ATTR call_start_cpu1()
|
2016-09-14 17:59:42 +00:00
|
|
|
{
|
|
|
|
asm volatile (\
|
|
|
|
"wsr %0, vecbase\n" \
|
|
|
|
::"r"(&_init_start));
|
2016-08-17 15:08:22 +00:00
|
|
|
|
2016-09-14 17:59:42 +00:00
|
|
|
cpu_configure_region_protection();
|
2016-08-17 15:08:22 +00:00
|
|
|
|
2016-10-27 08:17:28 +00:00
|
|
|
#if CONFIG_CONSOLE_UART_NONE
|
|
|
|
ets_install_putc1(NULL);
|
|
|
|
ets_install_putc2(NULL);
|
|
|
|
#else // CONFIG_CONSOLE_UART_NONE
|
|
|
|
uartAttach();
|
|
|
|
ets_install_uart_printf();
|
|
|
|
uart_tx_switch(CONFIG_CONSOLE_UART_NUM);
|
|
|
|
#endif
|
|
|
|
|
2016-09-14 17:59:42 +00:00
|
|
|
ESP_EARLY_LOGI(TAG, "App cpu up.");
|
|
|
|
app_cpu_started = 1;
|
2016-09-26 04:29:00 +00:00
|
|
|
start_cpu1();
|
|
|
|
}
|
2016-09-26 06:35:09 +00:00
|
|
|
#endif //!CONFIG_FREERTOS_UNICORE
|
2016-09-26 04:29:00 +00:00
|
|
|
|
|
|
|
void start_cpu0_default(void)
|
|
|
|
{
|
2016-11-21 14:56:11 +00:00
|
|
|
esp_setup_syscall_table();
|
2016-10-17 04:18:17 +00:00
|
|
|
//Enable trace memory and immediately start trace.
|
|
|
|
#if CONFIG_MEMMAP_TRACEMEM
|
|
|
|
#if CONFIG_MEMMAP_TRACEMEM_TWOBANKS
|
|
|
|
trax_enable(TRAX_ENA_PRO_APP);
|
|
|
|
#else
|
|
|
|
trax_enable(TRAX_ENA_PRO);
|
|
|
|
#endif
|
|
|
|
trax_start_trace(TRAX_DOWNCOUNT_WORDS);
|
|
|
|
#endif
|
2016-09-26 04:29:00 +00:00
|
|
|
esp_set_cpu_freq(); // set CPU frequency configured in menuconfig
|
2017-01-18 13:36:10 +00:00
|
|
|
#ifndef CONFIG_CONSOLE_UART_NONE
|
2016-12-08 02:20:12 +00:00
|
|
|
uart_div_modify(CONFIG_CONSOLE_UART_NUM, (APB_CLK_FREQ << 4) / CONFIG_CONSOLE_UART_BAUDRATE);
|
2017-01-18 13:36:10 +00:00
|
|
|
#endif
|
2016-10-21 09:59:57 +00:00
|
|
|
#if CONFIG_BROWNOUT_DET
|
|
|
|
esp_brownout_init();
|
|
|
|
#endif
|
2017-03-19 15:59:19 +00:00
|
|
|
rtc_gpio_force_hold_dis_all();
|
2016-11-02 09:17:28 +00:00
|
|
|
esp_setup_time_syscalls();
|
2016-10-25 14:16:08 +00:00
|
|
|
esp_vfs_dev_uart_register();
|
|
|
|
esp_reent_init(_GLOBAL_REENT);
|
2016-10-27 08:17:28 +00:00
|
|
|
#ifndef CONFIG_CONSOLE_UART_NONE
|
|
|
|
const char* default_uart_dev = "/dev/uart/" STRINGIFY(CONFIG_CONSOLE_UART_NUM);
|
2016-11-08 01:08:23 +00:00
|
|
|
_GLOBAL_REENT->_stdin = fopen(default_uart_dev, "r");
|
2016-10-26 06:05:56 +00:00
|
|
|
_GLOBAL_REENT->_stdout = fopen(default_uart_dev, "w");
|
|
|
|
_GLOBAL_REENT->_stderr = fopen(default_uart_dev, "w");
|
2016-10-27 08:17:28 +00:00
|
|
|
#else
|
|
|
|
_GLOBAL_REENT->_stdin = (FILE*) &__sf_fake_stdin;
|
|
|
|
_GLOBAL_REENT->_stdout = (FILE*) &__sf_fake_stdout;
|
|
|
|
_GLOBAL_REENT->_stderr = (FILE*) &__sf_fake_stderr;
|
|
|
|
#endif
|
2016-10-26 04:23:01 +00:00
|
|
|
do_global_ctors();
|
2016-11-25 09:33:51 +00:00
|
|
|
#if CONFIG_INT_WDT
|
|
|
|
esp_int_wdt_init();
|
|
|
|
#endif
|
|
|
|
#if CONFIG_TASK_WDT
|
|
|
|
esp_task_wdt_init();
|
|
|
|
#endif
|
2016-10-27 08:50:28 +00:00
|
|
|
#if !CONFIG_FREERTOS_UNICORE
|
2016-10-27 04:37:19 +00:00
|
|
|
esp_crosscore_int_init();
|
2016-10-27 08:50:28 +00:00
|
|
|
#endif
|
2016-10-26 04:23:01 +00:00
|
|
|
esp_ipc_init();
|
|
|
|
spi_flash_init();
|
2017-01-03 19:01:40 +00:00
|
|
|
/* init default OS-aware flash access critical section */
|
|
|
|
spi_flash_guard_set(&g_flash_guard_default_ops);
|
2016-10-21 09:59:57 +00:00
|
|
|
|
2017-01-19 17:24:55 +00:00
|
|
|
#if CONFIG_ESP32_ENABLE_COREDUMP
|
|
|
|
esp_core_dump_init();
|
|
|
|
#endif
|
|
|
|
|
2016-09-26 04:29:00 +00:00
|
|
|
xTaskCreatePinnedToCore(&main_task, "main",
|
|
|
|
ESP_TASK_MAIN_STACK, NULL,
|
|
|
|
ESP_TASK_MAIN_PRIO, NULL, 0);
|
|
|
|
ESP_LOGI(TAG, "Starting scheduler on PRO CPU.");
|
|
|
|
vTaskStartScheduler();
|
2016-08-17 15:08:22 +00:00
|
|
|
}
|
|
|
|
|
2016-09-26 06:35:09 +00:00
|
|
|
#if !CONFIG_FREERTOS_UNICORE
|
2016-09-26 04:29:00 +00:00
|
|
|
void start_cpu1_default(void)
|
2016-09-14 17:59:42 +00:00
|
|
|
{
|
2016-10-17 04:18:17 +00:00
|
|
|
#if CONFIG_MEMMAP_TRACEMEM_TWOBANKS
|
|
|
|
trax_start_trace(TRAX_DOWNCOUNT_WORDS);
|
|
|
|
#endif
|
2016-09-14 17:59:42 +00:00
|
|
|
// Wait for FreeRTOS initialization to finish on PRO CPU
|
|
|
|
while (port_xSchedulerRunning[0] == 0) {
|
|
|
|
;
|
|
|
|
}
|
2016-12-12 12:05:58 +00:00
|
|
|
//Take care putting stuff here: if asked, FreeRTOS will happily tell you the scheduler
|
|
|
|
//has started, but it isn't active *on this CPU* yet.
|
2016-10-27 04:37:19 +00:00
|
|
|
esp_crosscore_int_init();
|
2016-12-12 12:05:58 +00:00
|
|
|
|
|
|
|
ESP_EARLY_LOGI(TAG, "Starting scheduler on APP CPU.");
|
2016-09-14 17:59:42 +00:00
|
|
|
xPortStartScheduler();
|
|
|
|
}
|
2016-09-26 06:35:09 +00:00
|
|
|
#endif //!CONFIG_FREERTOS_UNICORE
|
2016-08-17 15:08:22 +00:00
|
|
|
|
2016-09-14 17:59:42 +00:00
|
|
|
static void do_global_ctors(void)
|
|
|
|
{
|
2016-08-17 15:08:22 +00:00
|
|
|
void (**p)(void);
|
2016-09-25 19:05:25 +00:00
|
|
|
for (p = &__init_array_end - 1; p >= &__init_array_start; --p) {
|
2016-08-17 15:08:22 +00:00
|
|
|
(*p)();
|
2016-09-14 17:59:42 +00:00
|
|
|
}
|
2016-08-17 15:08:22 +00:00
|
|
|
}
|
|
|
|
|
2016-09-26 04:29:00 +00:00
|
|
|
static void main_task(void* args)
|
2016-09-25 16:50:57 +00:00
|
|
|
{
|
2016-12-07 17:41:27 +00:00
|
|
|
// Now that the application is about to start, disable boot watchdogs
|
|
|
|
REG_CLR_BIT(TIMG_WDTCONFIG0_REG(0), TIMG_WDT_FLASHBOOT_MOD_EN_S);
|
|
|
|
REG_CLR_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN);
|
2017-01-25 09:25:50 +00:00
|
|
|
//Enable allocation in region where the startup stacks were located.
|
|
|
|
heap_alloc_enable_nonos_stack_tag();
|
2016-09-26 06:48:41 +00:00
|
|
|
app_main();
|
2016-09-25 16:50:57 +00:00
|
|
|
vTaskDelete(NULL);
|
|
|
|
}
|
|
|
|
|